1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_i2c.h 4 * @author MCD Application Team 5 * @brief Header file of I2C HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_I2C_H 21 #define STM32L4xx_HAL_I2C_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup I2C 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup I2C_Exported_Types I2C Exported Types 40 * @{ 41 */ 42 43 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition 44 * @brief I2C Configuration Structure definition 45 * @{ 46 */ 47 typedef struct 48 { 49 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. 50 This parameter calculated by referring to I2C initialization section 51 in Reference manual */ 52 53 uint32_t OwnAddress1; /*!< Specifies the first device own address. 54 This parameter can be a 7-bit or 10-bit address. */ 55 56 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 57 This parameter can be a value of @ref I2C_ADDRESSING_MODE */ 58 59 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 60 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ 61 62 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 63 This parameter can be a 7-bit address. */ 64 65 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing 66 mode is selected. 67 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ 68 69 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 70 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ 71 72 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 73 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ 74 75 } I2C_InitTypeDef; 76 77 /** 78 * @} 79 */ 80 81 /** @defgroup HAL_state_structure_definition HAL state structure definition 82 * @brief HAL State structure definition 83 * @note HAL I2C State value coding follow below described bitmap :\n 84 * b7-b6 Error information\n 85 * 00 : No Error\n 86 * 01 : Abort (Abort user request on going)\n 87 * 10 : Timeout\n 88 * 11 : Error\n 89 * b5 Peripheral initialization status\n 90 * 0 : Reset (peripheral not initialized)\n 91 * 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n 92 * b4 (not used)\n 93 * x : Should be set to 0\n 94 * b3\n 95 * 0 : Ready or Busy (No Listen mode ongoing)\n 96 * 1 : Listen (peripheral in Address Listen Mode)\n 97 * b2 Intrinsic process state\n 98 * 0 : Ready\n 99 * 1 : Busy (peripheral busy with some configuration or internal operations)\n 100 * b1 Rx state\n 101 * 0 : Ready (no Rx operation ongoing)\n 102 * 1 : Busy (Rx operation ongoing)\n 103 * b0 Tx state\n 104 * 0 : Ready (no Tx operation ongoing)\n 105 * 1 : Busy (Tx operation ongoing) 106 * @{ 107 */ 108 typedef enum 109 { 110 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 111 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 112 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 113 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 114 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 115 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 116 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 117 process is ongoing */ 118 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 119 process is ongoing */ 120 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 121 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 122 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ 123 124 } HAL_I2C_StateTypeDef; 125 126 /** 127 * @} 128 */ 129 130 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 131 * @brief HAL Mode structure definition 132 * @note HAL I2C Mode value coding follow below described bitmap :\n 133 * b7 (not used)\n 134 * x : Should be set to 0\n 135 * b6\n 136 * 0 : None\n 137 * 1 : Memory (HAL I2C communication is in Memory Mode)\n 138 * b5\n 139 * 0 : None\n 140 * 1 : Slave (HAL I2C communication is in Slave Mode)\n 141 * b4\n 142 * 0 : None\n 143 * 1 : Master (HAL I2C communication is in Master Mode)\n 144 * b3-b2-b1-b0 (not used)\n 145 * xxxx : Should be set to 0000 146 * @{ 147 */ 148 typedef enum 149 { 150 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ 151 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ 152 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ 153 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ 154 155 } HAL_I2C_ModeTypeDef; 156 157 /** 158 * @} 159 */ 160 161 /** @defgroup I2C_Error_Code_definition I2C Error Code definition 162 * @brief I2C Error Code definition 163 * @{ 164 */ 165 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ 166 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 167 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 168 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 169 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 170 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 171 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 172 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 173 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ 174 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 175 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ 176 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 177 #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ 178 /** 179 * @} 180 */ 181 182 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition 183 * @brief I2C handle Structure definition 184 * @{ 185 */ 186 typedef struct __I2C_HandleTypeDef 187 { 188 I2C_TypeDef *Instance; /*!< I2C registers base address */ 189 190 I2C_InitTypeDef Init; /*!< I2C communication parameters */ 191 192 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ 193 194 uint16_t XferSize; /*!< I2C transfer size */ 195 196 __IO uint16_t XferCount; /*!< I2C transfer counter */ 197 198 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can 199 be a value of @ref I2C_XFEROPTIONS */ 200 201 __IO uint32_t PreviousState; /*!< I2C communication Previous state */ 202 203 HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); 204 /*!< I2C transfer IRQ handler function pointer */ 205 206 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ 207 208 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ 209 210 HAL_LockTypeDef Lock; /*!< I2C locking object */ 211 212 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ 213 214 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ 215 216 __IO uint32_t ErrorCode; /*!< I2C Error code */ 217 218 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ 219 220 __IO uint32_t Devaddress; /*!< I2C Target device address */ 221 222 __IO uint32_t Memaddress; /*!< I2C Target memory address */ 223 224 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 225 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 226 /*!< I2C Master Tx Transfer completed callback */ 227 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 228 /*!< I2C Master Rx Transfer completed callback */ 229 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 230 /*!< I2C Slave Tx Transfer completed callback */ 231 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 232 /*!< I2C Slave Rx Transfer completed callback */ 233 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 234 /*!< I2C Listen Complete callback */ 235 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 236 /*!< I2C Memory Tx Transfer completed callback */ 237 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 238 /*!< I2C Memory Rx Transfer completed callback */ 239 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); 240 /*!< I2C Error callback */ 241 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 242 /*!< I2C Abort callback */ 243 244 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 245 /*!< I2C Slave Address Match callback */ 246 247 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); 248 /*!< I2C Msp Init callback */ 249 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); 250 /*!< I2C Msp DeInit callback */ 251 252 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 253 } I2C_HandleTypeDef; 254 255 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 256 /** 257 * @brief HAL I2C Callback ID enumeration definition 258 */ 259 typedef enum 260 { 261 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ 262 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ 263 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ 264 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ 265 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ 266 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ 267 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ 268 HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ 269 HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ 270 271 HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ 272 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ 273 274 } HAL_I2C_CallbackIDTypeDef; 275 276 /** 277 * @brief HAL I2C Callback pointer definition 278 */ 279 typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); 280 /*!< pointer to an I2C callback function */ 281 typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, 282 uint16_t AddrMatchCode); 283 /*!< pointer to an I2C Address Match callback function */ 284 285 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 286 /** 287 * @} 288 */ 289 290 /** 291 * @} 292 */ 293 /* Exported constants --------------------------------------------------------*/ 294 295 /** @defgroup I2C_Exported_Constants I2C Exported Constants 296 * @{ 297 */ 298 299 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options 300 * @{ 301 */ 302 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) 303 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 304 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 305 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 306 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 307 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE) 308 309 /* List of XferOptions in usage of : 310 * 1- Restart condition in all use cases (direction change or not) 311 */ 312 #define I2C_OTHER_FRAME (0x000000AAU) 313 #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U) 314 /** 315 * @} 316 */ 317 318 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode 319 * @{ 320 */ 321 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) 322 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) 323 /** 324 * @} 325 */ 326 327 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode 328 * @{ 329 */ 330 #define I2C_DUALADDRESS_DISABLE (0x00000000U) 331 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN 332 /** 333 * @} 334 */ 335 336 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks 337 * @{ 338 */ 339 #define I2C_OA2_NOMASK ((uint8_t)0x00U) 340 #define I2C_OA2_MASK01 ((uint8_t)0x01U) 341 #define I2C_OA2_MASK02 ((uint8_t)0x02U) 342 #define I2C_OA2_MASK03 ((uint8_t)0x03U) 343 #define I2C_OA2_MASK04 ((uint8_t)0x04U) 344 #define I2C_OA2_MASK05 ((uint8_t)0x05U) 345 #define I2C_OA2_MASK06 ((uint8_t)0x06U) 346 #define I2C_OA2_MASK07 ((uint8_t)0x07U) 347 /** 348 * @} 349 */ 350 351 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode 352 * @{ 353 */ 354 #define I2C_GENERALCALL_DISABLE (0x00000000U) 355 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN 356 /** 357 * @} 358 */ 359 360 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode 361 * @{ 362 */ 363 #define I2C_NOSTRETCH_DISABLE (0x00000000U) 364 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 365 /** 366 * @} 367 */ 368 369 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size 370 * @{ 371 */ 372 #define I2C_MEMADD_SIZE_8BIT (0x00000001U) 373 #define I2C_MEMADD_SIZE_16BIT (0x00000002U) 374 /** 375 * @} 376 */ 377 378 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View 379 * @{ 380 */ 381 #define I2C_DIRECTION_TRANSMIT (0x00000000U) 382 #define I2C_DIRECTION_RECEIVE (0x00000001U) 383 /** 384 * @} 385 */ 386 387 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode 388 * @{ 389 */ 390 #define I2C_RELOAD_MODE I2C_CR2_RELOAD 391 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND 392 #define I2C_SOFTEND_MODE (0x00000000U) 393 /** 394 * @} 395 */ 396 397 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode 398 * @{ 399 */ 400 #define I2C_NO_STARTSTOP (0x00000000U) 401 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) 402 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) 403 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) 404 /** 405 * @} 406 */ 407 408 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition 409 * @brief I2C Interrupt definition 410 * Elements values convention: 0xXXXXXXXX 411 * - XXXXXXXX : Interrupt control mask 412 * @{ 413 */ 414 #define I2C_IT_ERRI I2C_CR1_ERRIE 415 #define I2C_IT_TCI I2C_CR1_TCIE 416 #define I2C_IT_STOPI I2C_CR1_STOPIE 417 #define I2C_IT_NACKI I2C_CR1_NACKIE 418 #define I2C_IT_ADDRI I2C_CR1_ADDRIE 419 #define I2C_IT_RXI I2C_CR1_RXIE 420 #define I2C_IT_TXI I2C_CR1_TXIE 421 /** 422 * @} 423 */ 424 425 /** @defgroup I2C_Flag_definition I2C Flag definition 426 * @{ 427 */ 428 #define I2C_FLAG_TXE I2C_ISR_TXE 429 #define I2C_FLAG_TXIS I2C_ISR_TXIS 430 #define I2C_FLAG_RXNE I2C_ISR_RXNE 431 #define I2C_FLAG_ADDR I2C_ISR_ADDR 432 #define I2C_FLAG_AF I2C_ISR_NACKF 433 #define I2C_FLAG_STOPF I2C_ISR_STOPF 434 #define I2C_FLAG_TC I2C_ISR_TC 435 #define I2C_FLAG_TCR I2C_ISR_TCR 436 #define I2C_FLAG_BERR I2C_ISR_BERR 437 #define I2C_FLAG_ARLO I2C_ISR_ARLO 438 #define I2C_FLAG_OVR I2C_ISR_OVR 439 #define I2C_FLAG_PECERR I2C_ISR_PECERR 440 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT 441 #define I2C_FLAG_ALERT I2C_ISR_ALERT 442 #define I2C_FLAG_BUSY I2C_ISR_BUSY 443 #define I2C_FLAG_DIR I2C_ISR_DIR 444 /** 445 * @} 446 */ 447 448 /** 449 * @} 450 */ 451 452 /* Exported macros -----------------------------------------------------------*/ 453 454 /** @defgroup I2C_Exported_Macros I2C Exported Macros 455 * @{ 456 */ 457 458 /** @brief Reset I2C handle state. 459 * @param __HANDLE__ specifies the I2C Handle. 460 * @retval None 461 */ 462 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 463 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 464 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ 465 (__HANDLE__)->MspInitCallback = NULL; \ 466 (__HANDLE__)->MspDeInitCallback = NULL; \ 467 } while(0) 468 #else 469 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 470 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 471 472 /** @brief Enable the specified I2C interrupt. 473 * @param __HANDLE__ specifies the I2C Handle. 474 * @param __INTERRUPT__ specifies the interrupt source to enable. 475 * This parameter can be one of the following values: 476 * @arg @ref I2C_IT_ERRI Errors interrupt enable 477 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 478 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 479 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 480 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 481 * @arg @ref I2C_IT_RXI RX interrupt enable 482 * @arg @ref I2C_IT_TXI TX interrupt enable 483 * 484 * @retval None 485 */ 486 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 487 488 /** @brief Disable the specified I2C interrupt. 489 * @param __HANDLE__ specifies the I2C Handle. 490 * @param __INTERRUPT__ specifies the interrupt source to disable. 491 * This parameter can be one of the following values: 492 * @arg @ref I2C_IT_ERRI Errors interrupt enable 493 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 494 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 495 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 496 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 497 * @arg @ref I2C_IT_RXI RX interrupt enable 498 * @arg @ref I2C_IT_TXI TX interrupt enable 499 * 500 * @retval None 501 */ 502 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 503 504 /** @brief Check whether the specified I2C interrupt source is enabled or not. 505 * @param __HANDLE__ specifies the I2C Handle. 506 * @param __INTERRUPT__ specifies the I2C interrupt source to check. 507 * This parameter can be one of the following values: 508 * @arg @ref I2C_IT_ERRI Errors interrupt enable 509 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 510 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 511 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 512 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 513 * @arg @ref I2C_IT_RXI RX interrupt enable 514 * @arg @ref I2C_IT_TXI TX interrupt enable 515 * 516 * @retval The new state of __INTERRUPT__ (SET or RESET). 517 */ 518 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \ 519 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 520 521 /** @brief Check whether the specified I2C flag is set or not. 522 * @param __HANDLE__ specifies the I2C Handle. 523 * @param __FLAG__ specifies the flag to check. 524 * This parameter can be one of the following values: 525 * @arg @ref I2C_FLAG_TXE Transmit data register empty 526 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status 527 * @arg @ref I2C_FLAG_RXNE Receive data register not empty 528 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 529 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 530 * @arg @ref I2C_FLAG_STOPF STOP detection flag 531 * @arg @ref I2C_FLAG_TC Transfer complete (master mode) 532 * @arg @ref I2C_FLAG_TCR Transfer complete reload 533 * @arg @ref I2C_FLAG_BERR Bus error 534 * @arg @ref I2C_FLAG_ARLO Arbitration lost 535 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 536 * @arg @ref I2C_FLAG_PECERR PEC error in reception 537 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 538 * @arg @ref I2C_FLAG_ALERT SMBus alert 539 * @arg @ref I2C_FLAG_BUSY Bus busy 540 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) 541 * 542 * @retval The new state of __FLAG__ (SET or RESET). 543 */ 544 #define I2C_FLAG_MASK (0x0001FFFFU) 545 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \ 546 (__FLAG__)) == (__FLAG__)) ? SET : RESET) 547 548 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. 549 * @param __HANDLE__ specifies the I2C Handle. 550 * @param __FLAG__ specifies the flag to clear. 551 * This parameter can be any combination of the following values: 552 * @arg @ref I2C_FLAG_TXE Transmit data register empty 553 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 554 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 555 * @arg @ref I2C_FLAG_STOPF STOP detection flag 556 * @arg @ref I2C_FLAG_BERR Bus error 557 * @arg @ref I2C_FLAG_ARLO Arbitration lost 558 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 559 * @arg @ref I2C_FLAG_PECERR PEC error in reception 560 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 561 * @arg @ref I2C_FLAG_ALERT SMBus alert 562 * 563 * @retval None 564 */ 565 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \ 566 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \ 567 ((__HANDLE__)->Instance->ICR = (__FLAG__))) 568 569 /** @brief Enable the specified I2C peripheral. 570 * @param __HANDLE__ specifies the I2C Handle. 571 * @retval None 572 */ 573 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 574 575 /** @brief Disable the specified I2C peripheral. 576 * @param __HANDLE__ specifies the I2C Handle. 577 * @retval None 578 */ 579 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 580 581 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. 582 * @param __HANDLE__ specifies the I2C Handle. 583 * @retval None 584 */ 585 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) 586 /** 587 * @} 588 */ 589 590 /* Include I2C HAL Extended module */ 591 #include "stm32l4xx_hal_i2c_ex.h" 592 593 /* Exported functions --------------------------------------------------------*/ 594 /** @addtogroup I2C_Exported_Functions 595 * @{ 596 */ 597 598 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions 599 * @{ 600 */ 601 /* Initialization and de-initialization functions******************************/ 602 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 603 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); 604 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); 605 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); 606 607 /* Callbacks Register/UnRegister functions ***********************************/ 608 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 609 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, 610 pI2C_CallbackTypeDef pCallback); 611 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); 612 613 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); 614 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); 615 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 616 /** 617 * @} 618 */ 619 620 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions 621 * @{ 622 */ 623 /* IO operation functions ****************************************************/ 624 /******* Blocking mode: Polling */ 625 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 626 uint16_t Size, uint32_t Timeout); 627 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 628 uint16_t Size, uint32_t Timeout); 629 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 630 uint32_t Timeout); 631 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 632 uint32_t Timeout); 633 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 634 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 635 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 636 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 637 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, 638 uint32_t Timeout); 639 640 /******* Non-Blocking mode: Interrupt */ 641 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 642 uint16_t Size); 643 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 644 uint16_t Size); 645 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 646 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 647 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 648 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 649 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 650 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 651 652 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 653 uint16_t Size, uint32_t XferOptions); 654 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 655 uint16_t Size, uint32_t XferOptions); 656 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 657 uint32_t XferOptions); 658 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 659 uint32_t XferOptions); 660 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); 661 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); 662 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); 663 664 /******* Non-Blocking mode: DMA */ 665 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 666 uint16_t Size); 667 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 668 uint16_t Size); 669 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 670 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 671 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 672 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 673 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 674 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 675 676 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 677 uint16_t Size, uint32_t XferOptions); 678 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 679 uint16_t Size, uint32_t XferOptions); 680 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 681 uint32_t XferOptions); 682 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 683 uint32_t XferOptions); 684 /** 685 * @} 686 */ 687 688 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 689 * @{ 690 */ 691 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 692 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); 693 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); 694 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); 695 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); 696 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); 697 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); 698 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 699 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); 700 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); 701 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); 702 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); 703 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); 704 /** 705 * @} 706 */ 707 708 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 709 * @{ 710 */ 711 /* Peripheral State, Mode and Error functions *********************************/ 712 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); 713 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); 714 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); 715 716 /** 717 * @} 718 */ 719 720 /** 721 * @} 722 */ 723 724 /* Private constants ---------------------------------------------------------*/ 725 /** @defgroup I2C_Private_Constants I2C Private Constants 726 * @{ 727 */ 728 729 /** 730 * @} 731 */ 732 733 /* Private macros ------------------------------------------------------------*/ 734 /** @defgroup I2C_Private_Macro I2C Private Macros 735 * @{ 736 */ 737 738 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 739 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 740 741 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 742 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 743 744 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ 745 ((MASK) == I2C_OA2_MASK01) || \ 746 ((MASK) == I2C_OA2_MASK02) || \ 747 ((MASK) == I2C_OA2_MASK03) || \ 748 ((MASK) == I2C_OA2_MASK04) || \ 749 ((MASK) == I2C_OA2_MASK05) || \ 750 ((MASK) == I2C_OA2_MASK06) || \ 751 ((MASK) == I2C_OA2_MASK07)) 752 753 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 754 ((CALL) == I2C_GENERALCALL_ENABLE)) 755 756 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 757 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 758 759 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 760 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 761 762 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ 763 ((MODE) == I2C_AUTOEND_MODE) || \ 764 ((MODE) == I2C_SOFTEND_MODE)) 765 766 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ 767 ((REQUEST) == I2C_GENERATE_START_READ) || \ 768 ((REQUEST) == I2C_GENERATE_START_WRITE) || \ 769 ((REQUEST) == I2C_NO_STARTSTOP)) 770 771 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 772 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ 773 ((REQUEST) == I2C_NEXT_FRAME) || \ 774 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 775 ((REQUEST) == I2C_LAST_FRAME) || \ 776 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ 777 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) 778 779 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ 780 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) 781 782 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \ 783 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \ 784 I2C_CR2_NBYTES | I2C_CR2_RELOAD | \ 785 I2C_CR2_RD_WRN))) 786 787 #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \ 788 >> 16U)) 789 #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \ 790 >> 16U)) 791 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) 792 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)) 793 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)) 794 795 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 796 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 797 798 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \ 799 (uint16_t)(0xFF00U))) >> 8U))) 800 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 801 802 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \ 803 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ 804 (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \ 805 (~I2C_CR2_RD_WRN)) : \ 806 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ 807 (I2C_CR2_ADD10) | (I2C_CR2_START)) & \ 808 (~I2C_CR2_RD_WRN))) 809 810 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \ 811 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) 812 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) 813 /** 814 * @} 815 */ 816 817 /* Private Functions ---------------------------------------------------------*/ 818 /** @defgroup I2C_Private_Functions I2C Private Functions 819 * @{ 820 */ 821 /* Private functions are defined in stm32l4xx_hal_i2c.c file */ 822 /** 823 * @} 824 */ 825 826 /** 827 * @} 828 */ 829 830 /** 831 * @} 832 */ 833 834 #ifdef __cplusplus 835 } 836 #endif 837 838 839 #endif /* STM32L4xx_HAL_I2C_H */ 840
