1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef STM32L4xx_HAL_DAC_H 38 #define STM32L4xx_HAL_DAC_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /** @addtogroup STM32L4xx_HAL_Driver 45 * @{ 46 */ 47 48 /* Includes ------------------------------------------------------------------*/ 49 #include "stm32l4xx_hal_def.h" 50 51 #if defined(DAC1) 52 53 /** @addtogroup DAC 54 * @{ 55 */ 56 57 /* Exported types ------------------------------------------------------------*/ 58 59 /** @defgroup DAC_Exported_Types DAC Exported Types 60 * @{ 61 */ 62 63 /** 64 * @brief HAL State structures definition 65 */ 66 typedef enum 67 { 68 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ 69 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ 70 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ 71 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ 72 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ 73 74 }HAL_DAC_StateTypeDef; 75 76 /** 77 * @brief DAC handle Structure definition 78 */ 79 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 80 typedef struct __DAC_HandleTypeDef 81 #else 82 typedef struct DAC_HandleTypeDef 83 #endif 84 { 85 DAC_TypeDef *Instance; /*!< Register base address */ 86 87 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 88 89 HAL_LockTypeDef Lock; /*!< DAC locking object */ 90 91 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 92 93 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 94 95 __IO uint32_t ErrorCode; /*!< DAC Error code */ 96 97 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 98 void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 99 void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 100 void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 101 void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 102 void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 103 void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 104 void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 105 void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 106 107 void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac); 108 void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef *hdac); 109 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 110 111 }DAC_HandleTypeDef; 112 113 /** 114 * @brief DAC Configuration sample and hold Channel structure definition 115 */ 116 typedef struct 117 { 118 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 119 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 120 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 121 122 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 123 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 124 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 125 126 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 127 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 128 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 129 } 130 DAC_SampleAndHoldConfTypeDef; 131 132 /** 133 * @brief DAC Configuration regular Channel structure definition 134 */ 135 typedef struct 136 { 137 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 138 uint32_t DAC_HighFrequency; /*!< Specifies the frequency interface mode 139 This parameter can be a value of @ref DAC_HighFrequency */ 140 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 141 142 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 143 This parameter can be a value of @ref DAC_SampleAndHold */ 144 145 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 146 This parameter can be a value of @ref DAC_trigger_selection */ 147 148 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 149 This parameter can be a value of @ref DAC_output_buffer */ 150 151 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . 152 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 153 154 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 155 This parameter must be a value of @ref DAC_UserTrimming 156 DAC_UserTrimming is either factory or user trimming */ 157 158 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 159 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 160 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 161 162 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 163 164 }DAC_ChannelConfTypeDef; 165 166 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 167 /** 168 * @brief HAL DAC Callback ID enumeration definition 169 */ 170 typedef enum 171 { 172 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 173 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 174 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 175 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 176 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 177 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 178 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 179 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 180 HAL_DAC_MSP_INIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 181 HAL_DAC_MSP_DEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 182 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 183 }HAL_DAC_CallbackIDTypeDef; 184 185 /** 186 * @brief HAL DAC Callback pointer definition 187 */ 188 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 189 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 190 191 /** 192 * @} 193 */ 194 195 /* Exported constants --------------------------------------------------------*/ 196 197 /** @defgroup DAC_Exported_Constants DAC Exported Constants 198 * @{ 199 */ 200 201 /** @defgroup DAC_Error_Code DAC Error Code 202 * @{ 203 */ 204 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 205 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 206 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 207 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 208 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 209 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 210 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 211 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 212 213 /** 214 * @} 215 */ 216 217 /** @defgroup DAC_trigger_selection DAC trigger selection 218 * @{ 219 */ 220 221 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) 222 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register 223 has been loaded, and not by external trigger */ 224 #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 225 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 226 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 227 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 228 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 229 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 230 231 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 232 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register 233 has been loaded, and not by external trigger */ 234 #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 235 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 236 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 237 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 238 #endif /* STM32L451xx STM32L452xx STM32L462xx */ 239 240 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) 241 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register 242 has been loaded, and not by external trigger */ 243 #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 244 #define DAC_TRIGGER_T4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 245 #define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 246 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 247 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 248 #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 249 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 250 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 251 #endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx*/ 252 253 254 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 255 #define DAC_TRIGGER_NONE 0x00000000U /*!< conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 256 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TEN1) /*!< conversion started by software trigger for DAC channel */ 257 #define DAC_TRIGGER_T1_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel. */ 258 #define DAC_TRIGGER_T2_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 259 #define DAC_TRIGGER_T4_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 260 #define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 261 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 262 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 263 #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 264 #define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 265 #define DAC_TRIGGER_LPTIM1_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1 OUT TRGO selected as external conversion trigger for DAC channel */ 266 #define DAC_TRIGGER_LPTIM2_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LPTIM2 OUT TRGO selected as external conversion trigger for DAC channel */ 267 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 268 269 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 270 271 272 /** 273 * @} 274 */ 275 276 /** @defgroup DAC_output_buffer DAC output buffer 277 * @{ 278 */ 279 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U 280 #define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1) 281 282 /** 283 * @} 284 */ 285 286 /** @defgroup DAC_Channel_selection DAC Channel selection 287 * @{ 288 */ 289 #define DAC_CHANNEL_1 0x00000000U 290 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ 291 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ 292 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 293 #define DAC_CHANNEL_2 0x00000010U 294 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 295 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ 296 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 297 298 /** 299 * @} 300 */ 301 302 /** @defgroup DAC_data_alignment DAC data alignment 303 * @{ 304 */ 305 #define DAC_ALIGN_12B_R 0x00000000U 306 #define DAC_ALIGN_12B_L 0x00000004U 307 #define DAC_ALIGN_8B_R 0x00000008U 308 309 /** 310 * @} 311 */ 312 313 /** @defgroup DAC_flags_definition DAC flags definition 314 * @{ 315 */ 316 #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) 317 #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) 318 319 /** 320 * @} 321 */ 322 323 /** @defgroup DAC_IT_definition DAC IT definition 324 * @{ 325 */ 326 #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) 327 #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2) 328 329 /** 330 * @} 331 */ 332 333 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 334 * @{ 335 */ 336 #define DAC_CHIPCONNECT_DISABLE 0x00000000U 337 #define DAC_CHIPCONNECT_ENABLE (DAC_MCR_MODE1_0) 338 339 /** 340 * @} 341 */ 342 343 /** @defgroup DAC_UserTrimming DAC User Trimming 344 * @{ 345 */ 346 347 #define DAC_TRIMMING_FACTORY 0x00000000U /*!< Factory trimming */ 348 #define DAC_TRIMMING_USER 0x00000001U /*!< User trimming */ 349 350 /** 351 * @} 352 */ 353 354 /** @defgroup DAC_SampleAndHold DAC power mode 355 * @{ 356 */ 357 #define DAC_SAMPLEANDHOLD_DISABLE 0x00000000U 358 #define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2) 359 360 /** 361 * @} 362 */ 363 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 364 /** @defgroup DAC_HighFrequency DAC high frequency interface mode 365 * @{ 366 */ 367 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE ((uint32_t)0x00000000) /*!< High frequency interface mode disabled */ 368 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ ((uint32_t)DAC_CR_HFSEL) /*!< High frequency interface mode enabled */ 369 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC ((uint32_t)0x00000002) /*!< High frequency interface mode automatic */ 370 371 /** 372 * @} 373 */ 374 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 375 376 /** 377 * @} 378 */ 379 380 /* Exported macro ------------------------------------------------------------*/ 381 382 /** @defgroup DAC_Exported_Macros DAC Exported Macros 383 * @{ 384 */ 385 386 /** @brief Reset DAC handle state. 387 * @param __HANDLE__ specifies the DAC handle. 388 * @retval None 389 */ 390 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 391 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 392 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 393 (__HANDLE__)->MspInitCallback = NULL; \ 394 (__HANDLE__)->MspDeInitCallback = NULL; \ 395 } while(0) 396 #else 397 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 398 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 399 400 /** @brief Enable the DAC channel. 401 * @param __HANDLE__ specifies the DAC handle. 402 * @param __DAC_Channel__ specifies the DAC channel 403 * @retval None 404 */ 405 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 406 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 407 408 /** @brief Disable the DAC channel. 409 * @param __HANDLE__ specifies the DAC handle 410 * @param __DAC_Channel__ specifies the DAC channel. 411 * @retval None 412 */ 413 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 414 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 415 416 /** @brief Set DHR12R1 alignment. 417 * @param __ALIGNMENT__ specifies the DAC alignment 418 * @retval None 419 */ 420 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__)) 421 422 /** @brief Set DHR12R2 alignment. 423 * @param __ALIGNMENT__ specifies the DAC alignment 424 * @retval None 425 */ 426 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__)) 427 428 /** @brief Set DHR12RD alignment. 429 * @param __ALIGNMENT__ specifies the DAC alignment 430 * @retval None 431 */ 432 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__)) 433 434 /** @brief Enable the DAC interrupt. 435 * @param __HANDLE__ specifies the DAC handle 436 * @param __INTERRUPT__ specifies the DAC interrupt. 437 * This parameter can be any combination of the following values: 438 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 439 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 440 * @retval None 441 */ 442 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 443 444 /** @brief Disable the DAC interrupt. 445 * @param __HANDLE__ specifies the DAC handle 446 * @param __INTERRUPT__ specifies the DAC interrupt. 447 * This parameter can be any combination of the following values: 448 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 449 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 450 * @retval None 451 */ 452 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 453 454 /** @brief Check whether the specified DAC interrupt source is enabled or not. 455 * @param __HANDLE__ DAC handle 456 * @param __INTERRUPT__ DAC interrupt source to check 457 * This parameter can be any combination of the following values: 458 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 459 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 460 * @retval State of interruption (SET or RESET) 461 */ 462 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 463 464 /** @brief Get the selected DAC's flag status. 465 * @param __HANDLE__ specifies the DAC handle. 466 * @param __FLAG__ specifies the DAC flag to get. 467 * This parameter can be any combination of the following values: 468 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 469 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 470 * @retval None 471 */ 472 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 473 474 /** @brief Clear the DAC's flag. 475 * @param __HANDLE__ specifies the DAC handle. 476 * @param __FLAG__ specifies the DAC flag to clear. 477 * This parameter can be any combination of the following values: 478 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 479 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 480 * @retval None 481 */ 482 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 483 484 /** 485 * @} 486 */ 487 488 /* Private macro -------------------------------------------------------------*/ 489 490 /** @defgroup DAC_Private_Macros DAC Private Macros 491 * @{ 492 */ 493 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 494 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 495 496 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ 497 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ 498 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 499 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 500 ((CHANNEL) == DAC_CHANNEL_2)) 501 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 502 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ 503 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 504 505 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 506 #define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1) 507 #endif /* STM32L451xx STM32L452xx STM32L462xx */ 508 509 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 510 ((ALIGN) == DAC_ALIGN_12B_L) || \ 511 ((ALIGN) == DAC_ALIGN_8B_R)) 512 513 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) 514 515 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFU) 516 517 /** 518 * @} 519 */ 520 521 /* Include DAC HAL Extended module */ 522 #include "stm32l4xx_hal_dac_ex.h" 523 524 /* Exported functions --------------------------------------------------------*/ 525 526 /** @addtogroup DAC_Exported_Functions 527 * @{ 528 */ 529 530 /** @addtogroup DAC_Exported_Functions_Group1 531 * @{ 532 */ 533 /* Initialization and de-initialization functions *****************************/ 534 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); 535 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); 536 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); 537 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); 538 539 /** 540 * @} 541 */ 542 543 /** @addtogroup DAC_Exported_Functions_Group2 544 * @{ 545 */ 546 /* IO operation functions *****************************************************/ 547 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); 548 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); 549 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); 550 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); 551 552 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); 553 554 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 555 556 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); 557 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); 558 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 559 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 560 561 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 562 /* DAC callback registering/unregistering */ 563 HAL_StatusTypeDef HAL_DAC_RegisterCallback (DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, pDAC_CallbackTypeDef pCallback); 564 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback (DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); 565 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 566 567 /** 568 * @} 569 */ 570 571 /** @addtogroup DAC_Exported_Functions_Group3 572 * @{ 573 */ 574 /* Peripheral Control functions ***********************************************/ 575 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); 576 577 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); 578 /** 579 * @} 580 */ 581 582 /** @addtogroup DAC_Exported_Functions_Group4 583 * @{ 584 */ 585 /* Peripheral State and Error functions ***************************************/ 586 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); 587 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 588 589 /** 590 * @} 591 */ 592 593 /** 594 * @} 595 */ 596 597 /** 598 * @} 599 */ 600 601 #endif /* DAC1 */ 602 603 /** 604 * @} 605 */ 606 607 #ifdef __cplusplus 608 } 609 #endif 610 611 612 #endif /*STM32L4xx_HAL_DAC_H */ 613 614 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 615 616
