1 /** 2 ****************************************************************************** 3 * @file stm32l1xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L1xx_HAL_PWR_H 38 #define __STM32L1xx_HAL_PWR_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l1xx_hal_def.h" 46 47 /** @addtogroup STM32L1xx_HAL_Driver 48 * @{ 49 */ 50 51 /** @addtogroup PWR 52 * @{ 53 */ 54 55 /* Exported types ------------------------------------------------------------*/ 56 57 /** @defgroup PWR_Exported_Types PWR Exported Types 58 * @{ 59 */ 60 61 /** 62 * @brief PWR PVD configuration structure definition 63 */ 64 typedef struct 65 { 66 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 67 This parameter can be a value of @ref PWR_PVD_detection_level */ 68 69 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 70 This parameter can be a value of @ref PWR_PVD_Mode */ 71 }PWR_PVDTypeDef; 72 73 /** 74 * @} 75 */ 76 77 /* Internal constants --------------------------------------------------------*/ 78 79 /** @addtogroup PWR_Private_Constants 80 * @{ 81 */ 82 #define PWR_EXTI_LINE_PVD (0x00010000U) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 83 84 /** 85 * @} 86 */ 87 88 89 90 /* Exported constants --------------------------------------------------------*/ 91 92 /** @defgroup PWR_Exported_Constants PWR Exported Constants 93 * @{ 94 */ 95 96 /** @defgroup PWR_register_alias_address PWR Register alias address 97 * @{ 98 */ 99 /* ------------- PWR registers bit address in the alias region ---------------*/ 100 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 101 #define PWR_CR_OFFSET 0x00 102 #define PWR_CSR_OFFSET 0x04 103 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) 104 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) 105 /** 106 * @} 107 */ 108 109 /** @defgroup PWR_CR_register_alias PWR CR Register alias address 110 * @{ 111 */ 112 /* --- CR Register ---*/ 113 /* Alias word address of LPSDSR bit */ 114 #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR) 115 #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4))) 116 117 /* Alias word address of DBP bit */ 118 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP) 119 #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4))) 120 121 /* Alias word address of LPRUN bit */ 122 #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN) 123 #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4))) 124 125 /* Alias word address of PVDE bit */ 126 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE) 127 #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4))) 128 129 /* Alias word address of FWU bit */ 130 #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU) 131 #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4))) 132 133 /* Alias word address of ULP bit */ 134 #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP) 135 #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4))) 136 /** 137 * @} 138 */ 139 140 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address 141 * @{ 142 */ 143 144 /* --- CSR Register ---*/ 145 /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */ 146 #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4))) 147 /** 148 * @} 149 */ 150 151 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 152 * @{ 153 */ 154 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 155 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 156 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 157 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 158 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 159 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 160 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 161 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage 162 (Compare internally to VREFINT) */ 163 164 /** 165 * @} 166 */ 167 168 /** @defgroup PWR_PVD_Mode PWR PVD Mode 169 * @{ 170 */ 171 #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */ 172 #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */ 173 #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */ 174 #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 175 #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */ 176 #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */ 177 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */ 178 179 /** 180 * @} 181 */ 182 183 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode 184 * @{ 185 */ 186 #define PWR_MAINREGULATOR_ON (0x00000000U) 187 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR 188 189 /** 190 * @} 191 */ 192 193 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 194 * @{ 195 */ 196 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 197 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 198 199 /** 200 * @} 201 */ 202 203 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 204 * @{ 205 */ 206 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 207 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 208 209 /** 210 * @} 211 */ 212 213 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale 214 * @{ 215 */ 216 217 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0 218 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 219 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS 220 221 222 /** 223 * @} 224 */ 225 226 /** @defgroup PWR_Flag PWR Flag 227 * @{ 228 */ 229 #define PWR_FLAG_WU PWR_CSR_WUF 230 #define PWR_FLAG_SB PWR_CSR_SBF 231 #define PWR_FLAG_PVDO PWR_CSR_PVDO 232 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF 233 #define PWR_FLAG_VOS PWR_CSR_VOSF 234 #define PWR_FLAG_REGLP PWR_CSR_REGLPF 235 236 /** 237 * @} 238 */ 239 240 /** 241 * @} 242 */ 243 244 /* Exported macro ------------------------------------------------------------*/ 245 /** @defgroup PWR_Exported_Macros PWR Exported Macros 246 * @{ 247 */ 248 249 /** @brief macros configure the main internal regulator output voltage. 250 * @param __REGULATOR__: specifies the regulator output voltage to achieve 251 * a tradeoff between performance and power consumption when the device does 252 * not operate at the maximum frequency (refer to the datasheets for more details). 253 * This parameter can be one of the following values: 254 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode, 255 * System frequency up to 32 MHz. 256 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode, 257 * System frequency up to 16 MHz. 258 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode, 259 * System frequency up to 4.2 MHz 260 * @retval None 261 */ 262 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) 263 264 /** @brief Check PWR flag is set or not. 265 * @param __FLAG__: specifies the flag to check. 266 * This parameter can be one of the following values: 267 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 268 * was received from the WKUP pin or from the RTC alarm (Alarm B), 269 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 270 * An additional wakeup event is detected if the WKUP pin is enabled 271 * (by setting the EWUP bit) when the WKUP pin level is already high. 272 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 273 * resumed from StandBy mode. 274 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 275 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 276 * For this reason, this bit is equal to 0 after Standby or reset 277 * until the PVDE bit is set. 278 * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag. 279 * This bit indicates the state of the internal voltage reference, VREFINT. 280 * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for 281 * the internal regulator to be ready after the voltage range is changed. 282 * The VOSF bit indicates that the regulator has reached the voltage level 283 * defined with bits VOS of PWR_CR register. 284 * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run 285 * mode, this bit stays at 1 until the regulator is ready in main mode. 286 * A polling on this bit is recommended to wait for the regulator main mode. 287 * This bit is reset by hardware when the regulator is ready. 288 * @retval The new state of __FLAG__ (TRUE or FALSE). 289 */ 290 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 291 292 /** @brief Clear the PWR's pending flags. 293 * @param __FLAG__: specifies the flag to clear. 294 * This parameter can be one of the following values: 295 * @arg PWR_FLAG_WU: Wake Up flag 296 * @arg PWR_FLAG_SB: StandBy flag 297 */ 298 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2)) 299 300 /** 301 * @brief Enable interrupt on PVD Exti Line 16. 302 * @retval None. 303 */ 304 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) 305 306 /** 307 * @brief Disable interrupt on PVD Exti Line 16. 308 * @retval None. 309 */ 310 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) 311 312 /** 313 * @brief Enable event on PVD Exti Line 16. 314 * @retval None. 315 */ 316 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) 317 318 /** 319 * @brief Disable event on PVD Exti Line 16. 320 * @retval None. 321 */ 322 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) 323 324 325 /** 326 * @brief PVD EXTI line configuration: set falling edge trigger. 327 * @retval None. 328 */ 329 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 330 331 332 /** 333 * @brief Disable the PVD Extended Interrupt Falling Trigger. 334 * @retval None. 335 */ 336 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 337 338 339 /** 340 * @brief PVD EXTI line configuration: set rising edge trigger. 341 * @retval None. 342 */ 343 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 344 345 /** 346 * @brief Disable the PVD Extended Interrupt Rising Trigger. 347 * @retval None. 348 */ 349 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 350 351 /** 352 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 353 * @retval None. 354 */ 355 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 356 do { \ 357 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 358 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 359 } while(0) 360 361 /** 362 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 363 * @retval None. 364 */ 365 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 366 do { \ 367 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 368 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 369 } while(0) 370 371 372 373 /** 374 * @brief Check whether the specified PVD EXTI interrupt flag is set or not. 375 * @retval EXTI PVD Line Status. 376 */ 377 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 378 379 /** 380 * @brief Clear the PVD EXTI flag. 381 * @retval None. 382 */ 383 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 384 385 /** 386 * @brief Generate a Software interrupt on selected EXTI line. 387 * @retval None. 388 */ 389 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD) 390 391 /** 392 * @} 393 */ 394 395 /* Private macro -------------------------------------------------------------*/ 396 /** @defgroup PWR_Private_Macros PWR Private Macros 397 * @{ 398 */ 399 400 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 401 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 402 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 403 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 404 405 406 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 407 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 408 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 409 ((MODE) == PWR_PVD_MODE_NORMAL)) 410 411 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 412 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 413 414 415 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 416 417 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) 418 419 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ 420 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ 421 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) 422 423 424 /** 425 * @} 426 */ 427 428 429 430 /* Include PWR HAL Extension module */ 431 #include "stm32l1xx_hal_pwr_ex.h" 432 433 /* Exported functions --------------------------------------------------------*/ 434 435 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 436 * @{ 437 */ 438 439 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 440 * @{ 441 */ 442 443 /* Initialization and de-initialization functions *******************************/ 444 void HAL_PWR_DeInit(void); 445 void HAL_PWR_EnableBkUpAccess(void); 446 void HAL_PWR_DisableBkUpAccess(void); 447 448 /** 449 * @} 450 */ 451 452 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 453 * @{ 454 */ 455 456 /* Peripheral Control functions ************************************************/ 457 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 458 void HAL_PWR_EnablePVD(void); 459 void HAL_PWR_DisablePVD(void); 460 461 /* WakeUp pins configuration functions ****************************************/ 462 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 463 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 464 465 /* Low Power modes configuration functions ************************************/ 466 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 467 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 468 void HAL_PWR_EnterSTANDBYMode(void); 469 470 void HAL_PWR_EnableSleepOnExit(void); 471 void HAL_PWR_DisableSleepOnExit(void); 472 void HAL_PWR_EnableSEVOnPend(void); 473 void HAL_PWR_DisableSEVOnPend(void); 474 475 476 477 void HAL_PWR_PVD_IRQHandler(void); 478 void HAL_PWR_PVDCallback(void); 479 /** 480 * @} 481 */ 482 483 /** 484 * @} 485 */ 486 487 /** 488 * @} 489 */ 490 491 /** 492 * @} 493 */ 494 495 #ifdef __cplusplus 496 } 497 #endif 498 499 500 #endif /* __STM32L1xx_HAL_PWR_H */ 501 502 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 503
