1 /**
2 ******************************************************************************
3 * @file stm32l1xx_hal_adc_ex.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Convertor (ADC)
7 * peripheral:
8 * + Peripheral Control functions
9 * Other functions (generic functions) are available in file
10 * "stm32l1xx_hal_adc.c".
11 *
12 @verbatim
13 [..]
14 (@) Sections "ADC peripheral features" and "How to use this driver" are
15 available in file of generic functions "stm32l1xx_hal_adc.c".
16 [..]
17 @endverbatim
18 ******************************************************************************
19 * @attention
20 *
21 * Copyright (c) 2017 STMicroelectronics.
22 * All rights reserved.
23 *
24 * This software is licensed under terms that can be found in the LICENSE file
25 * in the root directory of this software component.
26 * If no LICENSE file comes with this software, it is provided AS-IS.
27 *
28 ******************************************************************************
29 */
30
31 /* Includes ------------------------------------------------------------------*/
32 #include "stm32l1xx_hal.h"
33
34 /** @addtogroup STM32L1xx_HAL_Driver
35 * @{
36 */
37
38 /** @defgroup ADCEx ADCEx
39 * @brief ADC Extension HAL module driver
40 * @{
41 */
42
43 #ifdef HAL_ADC_MODULE_ENABLED
44
45 /* Private typedef -----------------------------------------------------------*/
46 /* Private define ------------------------------------------------------------*/
47 /** @defgroup ADCEx_Private_Constants ADCEx Private Constants
48 * @{
49 */
50
51 /* ADC conversion cycles (unit: ADC clock cycles) */
52 /* (selected sampling time + conversion time of 12 ADC clock cycles, with */
53 /* resolution 12 bits) */
54 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_4CYCLE5 ( 16U)
55 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_9CYCLES ( 21U)
56 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_16CYCLES ( 28U)
57 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES ( 36U)
58 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_48CYCLES ( 60U)
59 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_96CYCLES (108U)
60 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_192CYCLES (204U)
61 #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES (396U)
62
63 /* Delay for temperature sensor stabilization time. */
64 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
65 /* Unit: us */
66 #define ADC_TEMPSENSOR_DELAY_US (10U)
67
68 /**
69 * @}
70 */
71
72 /* Private macro -------------------------------------------------------------*/
73 /* Private variables ---------------------------------------------------------*/
74 /* Private function prototypes -----------------------------------------------*/
75 /* Private functions ---------------------------------------------------------*/
76
77 /** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
78 * @{
79 */
80
81 /** @defgroup ADCEx_Exported_Functions_Group1 ADC Extended IO operation functions
82 * @brief ADC Extended Input and Output operation functions
83 *
84 @verbatim
85 ===============================================================================
86 ##### IO operation functions #####
87 ===============================================================================
88 [..] This section provides functions allowing to:
89 (+) Start conversion of injected group.
90 (+) Stop conversion of injected group.
91 (+) Poll for conversion complete on injected group.
92 (+) Get result of injected channel conversion.
93 (+) Start conversion of injected group and enable interruptions.
94 (+) Stop conversion of injected group and disable interruptions.
95
96 @endverbatim
97 * @{
98 */
99
100 /**
101 * @brief Enables ADC, starts conversion of injected group.
102 * Interruptions enabled in this function: None.
103 * @param hadc ADC handle
104 * @retval HAL status
105 */
HAL_ADCEx_InjectedStart(ADC_HandleTypeDef * hadc)106 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
107 {
108 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
109
110 /* Check the parameters */
111 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
112
113 /* Process locked */
114 __HAL_LOCK(hadc);
115
116 /* Enable the ADC peripheral */
117 tmp_hal_status = ADC_Enable(hadc);
118
119 /* Start conversion if ADC is effectively enabled */
120 if (tmp_hal_status == HAL_OK)
121 {
122 /* Set ADC state */
123 /* - Clear state bitfield related to injected group conversion results */
124 /* - Set state bitfield related to injected operation */
125 ADC_STATE_CLR_SET(hadc->State,
126 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
127 HAL_ADC_STATE_INJ_BUSY);
128
129 /* Check if a regular conversion is ongoing */
130 /* Note: On this device, there is no ADC error code fields related to */
131 /* conversions on group injected only. In case of conversion on */
132 /* going on group regular, no error code is reset. */
133 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
134 {
135 /* Reset ADC all error code fields */
136 ADC_CLEAR_ERRORCODE(hadc);
137 }
138
139 /* Process unlocked */
140 /* Unlock before starting ADC conversions: in case of potential */
141 /* interruption, to let the process to ADC IRQ Handler. */
142 __HAL_UNLOCK(hadc);
143
144 /* Clear injected group conversion flag */
145 /* (To ensure of no unknown state from potential previous ADC operations) */
146 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
147
148 /* Enable conversion of injected group. */
149 /* If software start has been selected, conversion starts immediately. */
150 /* If external trigger has been selected, conversion will start at next */
151 /* trigger event. */
152 /* If automatic injected conversion is enabled, conversion will start */
153 /* after next regular group conversion. */
154 if (ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
155 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
156 {
157 /* Enable ADC software conversion for injected channels */
158 SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
159 }
160 }
161
162 /* Return function status */
163 return tmp_hal_status;
164 }
165
166 /**
167 * @brief Stop conversion of injected channels. Disable ADC peripheral if
168 * no regular conversion is on going.
169 * @note If ADC must be disabled and if conversion is on going on
170 * regular group, function HAL_ADC_Stop must be used to stop both
171 * injected and regular groups, and disable the ADC.
172 * @note If injected group mode auto-injection is enabled,
173 * function HAL_ADC_Stop must be used.
174 * @note In case of auto-injection mode, HAL_ADC_Stop must be used.
175 * @param hadc ADC handle
176 * @retval None
177 */
HAL_ADCEx_InjectedStop(ADC_HandleTypeDef * hadc)178 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
179 {
180 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
181
182 /* Check the parameters */
183 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
184
185 /* Process locked */
186 __HAL_LOCK(hadc);
187
188 /* Stop potential conversion and disable ADC peripheral */
189 /* Conditioned to: */
190 /* - No conversion on the other group (regular group) is intended to */
191 /* continue (injected and regular groups stop conversion and ADC disable */
192 /* are common) */
193 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
194 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
195 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
196 {
197 /* Stop potential conversion on going, on regular and injected groups */
198 /* Disable ADC peripheral */
199 tmp_hal_status = ADC_ConversionStop_Disable(hadc);
200
201 /* Check if ADC is effectively disabled */
202 if (tmp_hal_status == HAL_OK)
203 {
204 /* Set ADC state */
205 ADC_STATE_CLR_SET(hadc->State,
206 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
207 HAL_ADC_STATE_READY);
208 }
209 }
210 else
211 {
212 /* Update ADC state machine to error */
213 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
214
215 tmp_hal_status = HAL_ERROR;
216 }
217
218 /* Process unlocked */
219 __HAL_UNLOCK(hadc);
220
221 /* Return function status */
222 return tmp_hal_status;
223 }
224
225 /**
226 * @brief Wait for injected group conversion to be completed.
227 * @param hadc ADC handle
228 * @param Timeout Timeout value in millisecond.
229 * @retval HAL status
230 */
HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)231 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
232 {
233 uint32_t tickstart;
234
235 /* Variables for polling in case of scan mode enabled and polling for each */
236 /* conversion. */
237 /* Note: Variable "conversion_timeout_cpu_cycles" set to offset 28 CPU */
238 /* cycles to compensate number of CPU cycles for processing of variable */
239 /* "conversion_timeout_cpu_cycles_max" */
240 uint32_t conversion_timeout_cpu_cycles = 28;
241 uint32_t conversion_timeout_cpu_cycles_max = 0;
242
243 /* Check the parameters */
244 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
245
246 /* Get timeout */
247 tickstart = HAL_GetTick();
248
249 /* Polling for end of conversion: differentiation if single/sequence */
250 /* conversion. */
251 /* For injected group, flag JEOC is set only at the end of the sequence, */
252 /* not for each conversion within the sequence. */
253 /* If setting "EOCSelection" is set to poll for each single conversion, */
254 /* management of polling depends on setting of injected group sequencer: */
255 /* - If single conversion for injected group (scan mode disabled or */
256 /* InjectedNbrOfConversion ==1), flag JEOC is used to determine the */
257 /* conversion completion. */
258 /* - If sequence conversion for injected group (scan mode enabled and */
259 /* InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
260 /* sequence. */
261 /* To poll for each conversion, the maximum conversion time is computed */
262 /* from ADC conversion time (selected sampling time + conversion time of */
263 /* 12 ADC clock cycles) and APB2/ADC clock prescalers (depending on */
264 /* settings, conversion time range can vary from 8 to several thousands */
265 /* of CPU cycles). */
266
267 /* Note: On STM32L1, setting "EOCSelection" is related to regular group */
268 /* only, by hardware. For compatibility with other STM32 devices, */
269 /* this setting is related also to injected group by software. */
270 if (((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET) ||
271 (hadc->Init.EOCSelection != ADC_EOC_SINGLE_CONV) )
272 {
273 /* Wait until End of Conversion flag is raised */
274 while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
275 {
276 /* Check if timeout is disabled (set to infinite wait) */
277 if(Timeout != HAL_MAX_DELAY)
278 {
279 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
280 {
281 /* New check to avoid false timeout detection in case of preemption */
282 if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
283 {
284 /* Update ADC state machine to timeout */
285 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
286
287 /* Process unlocked */
288 __HAL_UNLOCK(hadc);
289
290 return HAL_TIMEOUT;
291 }
292 }
293 }
294 }
295 }
296 else
297 {
298 /* Computation of CPU cycles corresponding to ADC conversion cycles. */
299 /* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all */
300 /* channels. */
301 conversion_timeout_cpu_cycles_max = ADC_GET_CLOCK_PRESCALER_DECIMAL(hadc);
302 conversion_timeout_cpu_cycles_max *= ADC_CONVCYCLES_MAX_RANGE(hadc);
303
304 /* Poll with maximum conversion time */
305 while(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
306 {
307 /* Check if timeout is disabled (set to infinite wait) */
308 if(Timeout != HAL_MAX_DELAY)
309 {
310 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
311 {
312 /* New check to avoid false timeout detection in case of preemption */
313 if(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
314 {
315 /* Update ADC state machine to timeout */
316 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
317
318 /* Process unlocked */
319 __HAL_UNLOCK(hadc);
320
321 return HAL_TIMEOUT;
322 }
323 }
324 }
325 conversion_timeout_cpu_cycles ++;
326 }
327 }
328
329 /* Clear end of conversion flag of injected group if low power feature */
330 /* "Auto Wait" is disabled, to not interfere with this feature until data */
331 /* register is read using function HAL_ADCEx_InjectedGetValue(). */
332 if (hadc->Init.LowPowerAutoWait == DISABLE)
333 {
334 /* Clear injected group conversion flag */
335 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
336 }
337
338 /* Update ADC state machine */
339 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
340
341 /* Determine whether any further conversion upcoming on group injected */
342 /* by external trigger, continuous mode or scan sequence on going. */
343 /* Note: On STM32L1, there is no independent flag of end of sequence. */
344 /* The test of scan sequence on going is done either with scan */
345 /* sequence disabled or with end of conversion flag set to */
346 /* of end of sequence. */
347 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
348 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) ||
349 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
350 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
351 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
352 (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
353 {
354 /* Set ADC state */
355 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
356
357 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
358 {
359 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
360 }
361 }
362
363 /* Return ADC state */
364 return HAL_OK;
365 }
366
367 /**
368 * @brief Enables ADC, starts conversion of injected group with interruption.
369 * - JEOC (end of conversion of injected group)
370 * Each of these interruptions has its dedicated callback function.
371 * @param hadc ADC handle
372 * @retval HAL status.
373 */
HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef * hadc)374 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
375 {
376 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
377
378 /* Check the parameters */
379 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
380
381 /* Process locked */
382 __HAL_LOCK(hadc);
383
384 /* Enable the ADC peripheral */
385 tmp_hal_status = ADC_Enable(hadc);
386
387 /* Start conversion if ADC is effectively enabled */
388 if (tmp_hal_status == HAL_OK)
389 {
390 /* Set ADC state */
391 /* - Clear state bitfield related to injected group conversion results */
392 /* - Set state bitfield related to injected operation */
393 ADC_STATE_CLR_SET(hadc->State,
394 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
395 HAL_ADC_STATE_INJ_BUSY);
396
397 /* Check if a regular conversion is ongoing */
398 /* Note: On this device, there is no ADC error code fields related to */
399 /* conversions on group injected only. In case of conversion on */
400 /* going on group regular, no error code is reset. */
401 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
402 {
403 /* Reset ADC all error code fields */
404 ADC_CLEAR_ERRORCODE(hadc);
405 }
406
407 /* Process unlocked */
408 /* Unlock before starting ADC conversions: in case of potential */
409 /* interruption, to let the process to ADC IRQ Handler. */
410 __HAL_UNLOCK(hadc);
411
412 /* Clear injected group conversion flag */
413 /* (To ensure of no unknown state from potential previous ADC operations) */
414 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
415
416 /* Enable end of conversion interrupt for injected channels */
417 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
418
419 /* Enable conversion of injected group. */
420 /* If software start has been selected, conversion starts immediately. */
421 /* If external trigger has been selected, conversion will start at next */
422 /* trigger event. */
423 /* If automatic injected conversion is enabled, conversion will start */
424 /* after next regular group conversion. */
425 if (ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
426 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
427 {
428 /* Enable ADC software conversion for injected channels */
429 SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
430 }
431 }
432
433 /* Return function status */
434 return tmp_hal_status;
435 }
436
437 /**
438 * @brief Stop conversion of injected channels, disable interruption of
439 * end-of-conversion. Disable ADC peripheral if no regular conversion
440 * is on going.
441 * @note If ADC must be disabled and if conversion is on going on
442 * regular group, function HAL_ADC_Stop must be used to stop both
443 * injected and regular groups, and disable the ADC.
444 * @note If injected group mode auto-injection is enabled,
445 * function HAL_ADC_Stop must be used.
446 * @param hadc ADC handle
447 * @retval None
448 */
HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef * hadc)449 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
450 {
451 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
452
453 /* Check the parameters */
454 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
455
456 /* Process locked */
457 __HAL_LOCK(hadc);
458
459 /* Stop potential conversion and disable ADC peripheral */
460 /* Conditioned to: */
461 /* - No conversion on the other group (regular group) is intended to */
462 /* continue (injected and regular groups stop conversion and ADC disable */
463 /* are common) */
464 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
465 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
466 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
467 {
468 /* Stop potential conversion on going, on regular and injected groups */
469 /* Disable ADC peripheral */
470 tmp_hal_status = ADC_ConversionStop_Disable(hadc);
471
472 /* Check if ADC is effectively disabled */
473 if (tmp_hal_status == HAL_OK)
474 {
475 /* Disable ADC end of conversion interrupt for injected channels */
476 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
477
478 /* Set ADC state */
479 ADC_STATE_CLR_SET(hadc->State,
480 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
481 HAL_ADC_STATE_READY);
482 }
483 }
484 else
485 {
486 /* Update ADC state machine to error */
487 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
488
489 tmp_hal_status = HAL_ERROR;
490 }
491
492 /* Process unlocked */
493 __HAL_UNLOCK(hadc);
494
495 /* Return function status */
496 return tmp_hal_status;
497 }
498
499 /**
500 * @brief Get ADC injected group conversion result.
501 * @note Reading register JDRx automatically clears ADC flag JEOC
502 * (ADC group injected end of unitary conversion).
503 * @note This function does not clear ADC flag JEOS
504 * (ADC group injected end of sequence conversion)
505 * Occurrence of flag JEOS rising:
506 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
507 * to flag JEOC.
508 * - If sequencer is composed of several ranks, during the scan
509 * sequence flag JEOC only is raised, at the end of the scan sequence
510 * both flags JEOC and EOS are raised.
511 * Flag JEOS must not be cleared by this function because
512 * it would not be compliant with low power features
513 * (feature low power auto-wait, not available on all STM32 families).
514 * To clear this flag, either use function:
515 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
516 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
517 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
518 * @param hadc ADC handle
519 * @param InjectedRank the converted ADC injected rank.
520 * This parameter can be one of the following values:
521 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
522 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
523 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
524 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
525 * @retval ADC group injected conversion data
526 */
HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef * hadc,uint32_t InjectedRank)527 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
528 {
529 uint32_t tmp_jdr = 0;
530
531 /* Check the parameters */
532 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
533 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
534
535 /* Get ADC converted value */
536 switch(InjectedRank)
537 {
538 case ADC_INJECTED_RANK_4:
539 tmp_jdr = hadc->Instance->JDR4;
540 break;
541 case ADC_INJECTED_RANK_3:
542 tmp_jdr = hadc->Instance->JDR3;
543 break;
544 case ADC_INJECTED_RANK_2:
545 tmp_jdr = hadc->Instance->JDR2;
546 break;
547 case ADC_INJECTED_RANK_1:
548 default:
549 tmp_jdr = hadc->Instance->JDR1;
550 break;
551 }
552
553 /* Return ADC converted value */
554 return tmp_jdr;
555 }
556
557 /**
558 * @brief Injected conversion complete callback in non blocking mode
559 * @param hadc ADC handle
560 * @retval None
561 */
HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef * hadc)562 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
563 {
564 /* Prevent unused argument(s) compilation warning */
565 UNUSED(hadc);
566
567 /* NOTE : This function Should not be modified, when the callback is needed,
568 the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
569 */
570 }
571
572 /**
573 * @}
574 */
575
576 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
577 * @brief ADC Extended Peripheral Control functions
578 *
579 @verbatim
580 ===============================================================================
581 ##### Peripheral Control functions #####
582 ===============================================================================
583 [..] This section provides functions allowing to:
584 (+) Configure channels on injected group
585
586 @endverbatim
587 * @{
588 */
589
590 /**
591 * @brief Configures the ADC injected group and the selected channel to be
592 * linked to the injected group.
593 * @note Possibility to update parameters on the fly:
594 * This function initializes injected group, following calls to this
595 * function can be used to reconfigure some parameters of structure
596 * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
597 * The setting of these parameters is conditioned to ADC state:
598 * this function must be called when ADC is not under conversion.
599 * @param hadc ADC handle
600 * @param sConfigInjected Structure of ADC injected group and ADC channel for
601 * injected group.
602 * @retval None
603 */
HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef * hadc,ADC_InjectionConfTypeDef * sConfigInjected)604 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
605 {
606 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
607 __IO uint32_t wait_loop_index = 0;
608
609 /* Check the parameters */
610 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
611 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
612 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
613 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
614 assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
615 assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, sConfigInjected->InjectedOffset));
616
617 if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
618 {
619 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
620 assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
621 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
622 }
623
624 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
625 {
626 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
627 }
628
629 /* Process locked */
630 __HAL_LOCK(hadc);
631
632 /* Configuration of injected group sequencer: */
633 /* - if scan mode is disabled, injected channels sequence length is set to */
634 /* 0x00: 1 channel converted (channel on regular rank 1) */
635 /* Parameter "InjectedNbrOfConversion" is discarded. */
636 /* Note: Scan mode is present by hardware on this device and, if */
637 /* disabled, discards automatically nb of conversions. Anyway, nb of */
638 /* conversions is forced to 0x00 for alignment over all STM32 devices. */
639 /* - if scan mode is enabled, injected channels sequence length is set to */
640 /* parameter ""InjectedNbrOfConversion". */
641 if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
642 {
643 if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
644 {
645 /* Clear the old SQx bits for all injected ranks */
646 MODIFY_REG(hadc->Instance->JSQR ,
647 ADC_JSQR_JL |
648 ADC_JSQR_JSQ4 |
649 ADC_JSQR_JSQ3 |
650 ADC_JSQR_JSQ2 |
651 ADC_JSQR_JSQ1 ,
652 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
653 ADC_INJECTED_RANK_1,
654 0x01) );
655 }
656 /* If another injected rank than rank1 was intended to be set, and could */
657 /* not due to ScanConvMode disabled, error is reported. */
658 else
659 {
660 /* Update ADC state machine to error */
661 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
662
663 tmp_hal_status = HAL_ERROR;
664 }
665 }
666 else
667 {
668 /* Since injected channels rank conv. order depends on total number of */
669 /* injected conversions, selected rank must be below or equal to total */
670 /* number of injected conversions to be updated. */
671 if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
672 {
673 /* Clear the old SQx bits for the selected rank */
674 /* Set the SQx bits for the selected rank */
675 MODIFY_REG(hadc->Instance->JSQR ,
676
677 ADC_JSQR_JL |
678 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
679 sConfigInjected->InjectedRank,
680 sConfigInjected->InjectedNbrOfConversion) ,
681
682 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion) |
683 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
684 sConfigInjected->InjectedRank,
685 sConfigInjected->InjectedNbrOfConversion) );
686 }
687 else
688 {
689 /* Clear the old SQx bits for the selected rank */
690 MODIFY_REG(hadc->Instance->JSQR ,
691
692 ADC_JSQR_JL |
693 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
694 sConfigInjected->InjectedRank,
695 sConfigInjected->InjectedNbrOfConversion) ,
696
697 0x00000000 );
698 }
699 }
700
701 /* Enable external trigger if trigger selection is different of software */
702 /* start. */
703 /* Note: This configuration keeps the hardware feature of parameter */
704 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
705 /* software start. */
706
707 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
708 {
709 MODIFY_REG(hadc->Instance->CR2 ,
710 ADC_CR2_JEXTEN |
711 ADC_CR2_JEXTSEL ,
712 sConfigInjected->ExternalTrigInjecConv |
713 sConfigInjected->ExternalTrigInjecConvEdge );
714 }
715 else
716 {
717 MODIFY_REG(hadc->Instance->CR2,
718 ADC_CR2_JEXTEN |
719 ADC_CR2_JEXTSEL ,
720 0x00000000 );
721 }
722
723 /* Configuration of injected group */
724 /* Parameters update conditioned to ADC state: */
725 /* Parameters that can be updated only when ADC is disabled: */
726 /* - Automatic injected conversion */
727 /* - Injected discontinuous mode */
728 if ((ADC_IS_ENABLE(hadc) == RESET))
729 {
730 hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO |
731 ADC_CR1_JDISCEN );
732
733 /* Automatic injected conversion can be enabled if injected group */
734 /* external triggers are disabled. */
735 if (sConfigInjected->AutoInjectedConv == ENABLE)
736 {
737 if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
738 {
739 SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
740 }
741 else
742 {
743 /* Update ADC state machine to error */
744 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
745
746 tmp_hal_status = HAL_ERROR;
747 }
748 }
749
750 /* Injected discontinuous can be enabled only if auto-injected mode is */
751 /* disabled. */
752 if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
753 {
754 if (sConfigInjected->AutoInjectedConv == DISABLE)
755 {
756 SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
757 }
758 else
759 {
760 /* Update ADC state machine to error */
761 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
762
763 tmp_hal_status = HAL_ERROR;
764 }
765 }
766 }
767
768 /* Channel sampling time configuration */
769 /* For InjectedChannels 0 to 9 */
770 if (sConfigInjected->InjectedChannel < ADC_CHANNEL_10)
771 {
772 MODIFY_REG(hadc->Instance->SMPR3,
773 ADC_SMPR3(ADC_SMPR3_SMP0, sConfigInjected->InjectedChannel),
774 ADC_SMPR3(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
775 }
776 /* For InjectedChannels 10 to 19 */
777 else if (sConfigInjected->InjectedChannel < ADC_CHANNEL_20)
778 {
779 MODIFY_REG(hadc->Instance->SMPR2,
780 ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel),
781 ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
782 }
783 /* For InjectedChannels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
784 /* For InjectedChannels 20 to 29 for devices Cat4, Cat.5 */
785 else if (sConfigInjected->InjectedChannel <= ADC_SMPR1_CHANNEL_MAX)
786 {
787 MODIFY_REG(hadc->Instance->SMPR1,
788 ADC_SMPR1(ADC_SMPR1_SMP20, sConfigInjected->InjectedChannel),
789 ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
790 }
791 /* For InjectedChannels 30 to 31 for devices Cat4, Cat.5 */
792 else
793 {
794 ADC_SMPR0_CHANNEL_SET(hadc, sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
795 }
796
797
798 /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
799 switch(sConfigInjected->InjectedRank)
800 {
801 case 1:
802 /* Set injected channel 1 offset */
803 MODIFY_REG(hadc->Instance->JOFR1,
804 ADC_JOFR1_JOFFSET1,
805 sConfigInjected->InjectedOffset);
806 break;
807 case 2:
808 /* Set injected channel 2 offset */
809 MODIFY_REG(hadc->Instance->JOFR2,
810 ADC_JOFR2_JOFFSET2,
811 sConfigInjected->InjectedOffset);
812 break;
813 case 3:
814 /* Set injected channel 3 offset */
815 MODIFY_REG(hadc->Instance->JOFR3,
816 ADC_JOFR3_JOFFSET3,
817 sConfigInjected->InjectedOffset);
818 break;
819 case 4:
820 default:
821 MODIFY_REG(hadc->Instance->JOFR4,
822 ADC_JOFR4_JOFFSET4,
823 sConfigInjected->InjectedOffset);
824 break;
825 }
826
827 /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
828 /* and VREFINT measurement path. */
829 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
830 (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) )
831 {
832 SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
833
834 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
835 {
836 /* Delay for temperature sensor stabilization time */
837 /* Compute number of CPU cycles to wait for */
838 wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
839 while(wait_loop_index != 0)
840 {
841 wait_loop_index--;
842 }
843 }
844 }
845
846 /* Process unlocked */
847 __HAL_UNLOCK(hadc);
848
849 /* Return function status */
850 return tmp_hal_status;
851 }
852
853 /**
854 * @}
855 */
856
857 /**
858 * @}
859 */
860
861 #endif /* HAL_ADC_MODULE_ENABLED */
862 /**
863 * @}
864 */
865
866 /**
867 * @}
868 */
869
