1 /** 2 ****************************************************************************** 3 * @file stm32l0xx_hal_spi.h 4 * @author MCD Application Team 5 * @brief Header file of SPI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L0xx_HAL_SPI_H 38 #define __STM32L0xx_HAL_SPI_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l0xx_hal_def.h" 46 47 /** @addtogroup STM32L0xx_HAL_Driver 48 * @{ 49 */ 50 51 /** @defgroup SPI SPI 52 * @{ 53 */ 54 55 /* Exported types ------------------------------------------------------------*/ 56 /** @defgroup SPI_Exported_Types SPI Exported Types 57 * @{ 58 */ 59 60 /** 61 * @brief SPI Configuration Structure definition 62 */ 63 typedef struct 64 { 65 uint32_t Mode; /*!< Specifies the SPI operating mode. 66 This parameter can be a value of @ref SPI_mode */ 67 68 uint32_t Direction; /*!< Specifies the SPI Directional mode state. 69 This parameter can be a value of @ref SPI_Direction_mode */ 70 71 uint32_t DataSize; /*!< Specifies the SPI data size. 72 This parameter can be a value of @ref SPI_data_size */ 73 74 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 75 This parameter can be a value of @ref SPI_Clock_Polarity */ 76 77 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 78 This parameter can be a value of @ref SPI_Clock_Phase */ 79 80 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 81 hardware (NSS pin) or by software using the SSI bit. 82 This parameter can be a value of @ref SPI_Slave_Select_management */ 83 84 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 85 used to configure the transmit and receive SCK clock. 86 This parameter can be a value of @ref SPI_BaudRate_Prescaler 87 @note The communication clock is derived from the master 88 clock. The slave clock does not need to be set */ 89 90 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 91 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 92 93 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 94 This parameter can be a value of @ref SPI_TI_mode */ 95 96 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 97 This parameter can be a value of @ref SPI_CRC_Calculation */ 98 99 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 100 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ 101 102 }SPI_InitTypeDef; 103 104 /** 105 * @brief HAL SPI State structure definition 106 */ 107 typedef enum 108 { 109 HAL_SPI_STATE_RESET = 0x00U, /*!< SPI not yet initialized or disabled */ 110 HAL_SPI_STATE_READY = 0x01U, /*!< SPI initialized and ready for use */ 111 HAL_SPI_STATE_BUSY = 0x02U, /*!< SPI process is ongoing */ 112 HAL_SPI_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ 113 HAL_SPI_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 114 HAL_SPI_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */ 115 HAL_SPI_STATE_ERROR = 0x03U /*!< SPI error state */ 116 117 }HAL_SPI_StateTypeDef; 118 119 /** 120 * @brief SPI handle Structure definition 121 */ 122 typedef struct __SPI_HandleTypeDef 123 { 124 SPI_TypeDef *Instance; /*!< SPI registers base address */ 125 126 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 127 128 uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 129 130 uint16_t TxXferSize; /*!< SPI Tx transfer size */ 131 132 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 133 134 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 135 136 uint16_t RxXferSize; /*!< SPI Rx transfer size */ 137 138 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 139 140 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA handle parameters */ 141 142 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA handle parameters */ 143 144 void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */ 145 146 void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */ 147 148 HAL_LockTypeDef Lock; /*!< SPI locking object */ 149 150 __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 151 152 __IO uint32_t ErrorCode; /*!< SPI Error code */ 153 154 }SPI_HandleTypeDef; 155 /** 156 * @} 157 */ 158 159 160 /* Exported constants --------------------------------------------------------*/ 161 162 /** @defgroup SPI_Exported_Constants SPI Exported Constants 163 * @{ 164 */ 165 166 /** 167 * @defgroup SPI_ErrorCode SPI Error Code 168 * @{ 169 */ 170 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ 171 #define HAL_SPI_ERROR_MODF ((uint32_t)0x01U) /*!< MODF error */ 172 #define HAL_SPI_ERROR_CRC ((uint32_t)0x02U) /*!< CRC error */ 173 #define HAL_SPI_ERROR_OVR ((uint32_t)0x04U) /*!< OVR error */ 174 #define HAL_SPI_ERROR_FRE ((uint32_t)0x08U) /*!< FRE error */ 175 #define HAL_SPI_ERROR_DMA ((uint32_t)0x10U) /*!< DMA transfer error */ 176 #define HAL_SPI_ERROR_FLAG ((uint32_t)0x20U) /*!< Flag: RXNE,TXE, BSY */ 177 /** 178 * @} 179 */ 180 181 /** @defgroup SPI_mode SPI mode 182 * @{ 183 */ 184 #define SPI_MODE_SLAVE ((uint32_t)0x00000000U) 185 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 186 187 /** 188 * @} 189 */ 190 191 /** @defgroup SPI_Direction_mode SPI Direction mode 192 * @{ 193 */ 194 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000U) 195 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 196 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 197 198 /** 199 * @} 200 */ 201 202 /** @defgroup SPI_data_size SPI data size 203 * @{ 204 */ 205 #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000U) 206 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 207 208 /** 209 * @} 210 */ 211 212 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 213 * @{ 214 */ 215 #define SPI_POLARITY_LOW ((uint32_t)0x00000000U) 216 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 217 218 /** 219 * @} 220 */ 221 222 /** @defgroup SPI_Clock_Phase SPI Clock Phase 223 * @{ 224 */ 225 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000U) 226 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 227 228 /** 229 * @} 230 */ 231 232 /** @defgroup SPI_Slave_Select_management SPI Slave Select management 233 * @{ 234 */ 235 #define SPI_NSS_SOFT SPI_CR1_SSM 236 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U) 237 #define SPI_NSS_HARD_OUTPUT ((uint32_t)(SPI_CR2_SSOE << 16U)) 238 239 /** 240 * @} 241 */ 242 243 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 244 * @{ 245 */ 246 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000U) 247 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)SPI_CR1_BR_0) 248 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)SPI_CR1_BR_1) 249 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)SPI_CR1_BR_1 | SPI_CR1_BR_0) 250 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)SPI_CR1_BR_2) 251 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_0) 252 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1) 253 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 254 255 /** 256 * @} 257 */ 258 259 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission 260 * @{ 261 */ 262 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000U) 263 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 264 265 /** 266 * @} 267 */ 268 269 /** @defgroup SPI_TI_mode SPI TI mode 270 * @{ 271 */ 272 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000U) 273 #define SPI_TIMODE_ENABLE SPI_CR2_FRF 274 275 /** 276 * @} 277 */ 278 279 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 280 * @{ 281 */ 282 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U) 283 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 284 285 /** 286 * @} 287 */ 288 289 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition 290 * @{ 291 */ 292 #define SPI_IT_TXE SPI_CR2_TXEIE 293 #define SPI_IT_RXNE SPI_CR2_RXNEIE 294 #define SPI_IT_ERR SPI_CR2_ERRIE 295 /** 296 * @} 297 */ 298 299 /** @defgroup SPI_Flag_definition SPI Flag definition 300 * @{ 301 */ 302 #define SPI_FLAG_RXNE SPI_SR_RXNE 303 #define SPI_FLAG_TXE SPI_SR_TXE 304 #define SPI_FLAG_CRCERR SPI_SR_CRCERR 305 #define SPI_FLAG_MODF SPI_SR_MODF 306 #define SPI_FLAG_OVR SPI_SR_OVR 307 #define SPI_FLAG_BSY SPI_SR_BSY 308 #define SPI_FLAG_FRE SPI_SR_FRE 309 310 /** 311 * @} 312 */ 313 314 /** 315 * @} 316 */ 317 318 319 /* Exported macro ------------------------------------------------------------*/ 320 /** @defgroup SPI_Exported_Macros SPI Exported Macros 321 * @{ 322 */ 323 324 /** @brief Reset SPI handle state 325 * @param __HANDLE__: specifies the SPI handle. 326 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 327 * @retval None 328 */ 329 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 330 331 /** @brief Enable the specified SPI interrupts. 332 * @param __HANDLE__: specifies the SPI handle. 333 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 334 * @param __INTERRUPT__: specifies the interrupt source to enable. 335 * This parameter can be one of the following values: 336 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 337 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 338 * @arg SPI_IT_ERR: Error interrupt enable 339 * @retval None 340 */ 341 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 342 343 /** @brief Disable the specified SPI interrupts. 344 * @param __HANDLE__: specifies the SPI handle. 345 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 346 * @param __INTERRUPT__: specifies the interrupt source to disable. 347 * This parameter can be one of the following values: 348 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 349 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 350 * @arg SPI_IT_ERR: Error interrupt enable 351 * @retval None 352 */ 353 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 354 355 /** @brief Check if the specified SPI interrupt source is enabled or disabled. 356 * @param __HANDLE__: specifies the SPI handle. 357 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 358 * @param __INTERRUPT__: specifies the SPI interrupt source to check. 359 * This parameter can be one of the following values: 360 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 361 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 362 * @arg SPI_IT_ERR: Error interrupt enable 363 * @retval The new state of __IT__ (TRUE or FALSE). 364 */ 365 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 366 367 /** @brief Check whether the specified SPI flag is set or not. 368 * @param __HANDLE__: specifies the SPI handle. 369 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 370 * @param __FLAG__: specifies the flag to check. 371 * This parameter can be one of the following values: 372 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 373 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 374 * @arg SPI_FLAG_CRCERR: CRC error flag 375 * @arg SPI_FLAG_MODF: Mode fault flag 376 * @arg SPI_FLAG_OVR: Overrun flag 377 * @arg SPI_FLAG_BSY: Busy flag 378 * @arg SPI_FLAG_FRE: Frame format error flag 379 * @retval The new state of __FLAG__ (TRUE or FALSE). 380 */ 381 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 382 383 /** @brief Clear the SPI CRCERR pending flag. 384 * @param __HANDLE__: specifies the SPI handle. 385 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 386 * @retval None 387 */ 388 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR)) 389 390 /** @brief Clear the SPI MODF pending flag. 391 * @param __HANDLE__: specifies the SPI handle. 392 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 393 * @retval None 394 */ 395 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 396 do{ \ 397 __IO uint32_t tmpreg_modf; \ 398 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 399 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \ 400 UNUSED(tmpreg_modf); \ 401 } while(0) 402 403 /** @brief Clear the SPI OVR pending flag. 404 * @param __HANDLE__: specifies the SPI handle. 405 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 406 * @retval None 407 */ 408 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 409 do{ \ 410 __IO uint32_t tmpreg_ovr; \ 411 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 412 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 413 UNUSED(tmpreg_ovr); \ 414 } while(0) 415 416 /** @brief Clear the SPI FRE pending flag. 417 * @param __HANDLE__: specifies the SPI handle. 418 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 419 * @retval None 420 */ 421 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ 422 do{ \ 423 __IO uint32_t tmpreg_fre; \ 424 tmpreg_fre = (__HANDLE__)->Instance->SR; \ 425 UNUSED(tmpreg_fre); \ 426 } while(0) 427 428 /** @brief Enables the SPI. 429 * @param __HANDLE__: specifies the SPI Handle. 430 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 431 * @retval None 432 */ 433 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 434 435 /** @brief Disables the SPI. 436 * @param __HANDLE__: specifies the SPI Handle. 437 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 438 * @retval None 439 */ 440 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 441 /** 442 * @} 443 */ 444 445 446 /* Private macros -----------------------------------------------------------*/ 447 /** @defgroup SPI_Private_Macros SPI Private Macros 448 * @{ 449 */ 450 451 /** @brief Checks if SPI Mode parameter is in allowed range. 452 * @param __MODE__: specifies the SPI Mode. 453 * This parameter can be a value of @ref SPI_mode 454 * @retval None 455 */ 456 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || ((__MODE__) == SPI_MODE_MASTER)) 457 458 /** @brief Checks if SPI Direction Mode parameter is in allowed range. 459 * @param __MODE__: specifies the SPI Direction Mode. 460 * This parameter can be a value of @ref SPI_Direction_mode 461 * @retval None 462 */ 463 #define IS_SPI_DIRECTION_MODE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 464 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ 465 ((__MODE__) == SPI_DIRECTION_1LINE)) 466 467 /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. 468 * @param __MODE__: specifies the SPI Direction Mode. 469 * @retval None 470 */ 471 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 472 ((__MODE__) == SPI_DIRECTION_1LINE)) 473 474 /** @brief Checks if SPI Direction Mode parameter is 2 lines. 475 * @param __MODE__: specifies the SPI Direction Mode. 476 * @retval None 477 */ 478 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) 479 480 /** @brief Checks if SPI Data Size parameter is in allowed range. 481 * @param __DATASIZE__: specifies the SPI Data Size. 482 * This parameter can be a value of @ref SPI_data_size 483 * @retval None 484 */ 485 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ 486 ((__DATASIZE__) == SPI_DATASIZE_8BIT)) 487 488 /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. 489 * @param __CPOL__: specifies the SPI serial clock steady state. 490 * This parameter can be a value of @ref SPI_Clock_Polarity 491 * @retval None 492 */ 493 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ 494 ((__CPOL__) == SPI_POLARITY_HIGH)) 495 496 /** @brief Checks if SPI Clock Phase parameter is in allowed range. 497 * @param __CPHA__: specifies the SPI Clock Phase. 498 * This parameter can be a value of @ref SPI_Clock_Phase 499 * @retval None 500 */ 501 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ 502 ((__CPHA__) == SPI_PHASE_2EDGE)) 503 504 /** @brief Checks if SPI Slave select parameter is in allowed range. 505 * @param __NSS__: specifies the SPI Slave Slelect management parameter. 506 * This parameter can be a value of @ref SPI_Slave_Select_management 507 * @retval None 508 */ 509 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 510 ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 511 ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 512 513 /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. 514 * @param __PRESCALER__: specifies the SPI Baudrate prescaler. 515 * This parameter can be a value of @ref SPI_BaudRate_Prescaler 516 * @retval None 517 */ 518 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ 519 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ 520 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ 521 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ 522 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ 523 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ 524 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ 525 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) 526 527 /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. 528 * @param __BIT__: specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). 529 * This parameter can be a value of @ref SPI_MSB_LSB_transmission 530 * @retval None 531 */ 532 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ 533 ((__BIT__) == SPI_FIRSTBIT_LSB)) 534 535 /** @brief Checks if SPI TI mode parameter is in allowed range. 536 * @param __MODE__: specifies the SPI TI mode. 537 * This parameter can be a value of @ref SPI_TI_mode 538 * @retval None 539 */ 540 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \ 541 ((__MODE__) == SPI_TIMODE_ENABLE)) 542 /** @brief Checks if SPI CRC calculation enabled state is in allowed range. 543 * @param __CALCULATION__: specifies the SPI CRC calculation enable state. 544 * This parameter can be a value of @ref SPI_CRC_Calculation 545 * @retval None 546 */ 547 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ 548 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) 549 550 /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. 551 * @param __POLYNOMIAL__: specifies the SPI polynomial value to be used for the CRC calculation. 552 * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 553 * @retval None 554 */ 555 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && ((__POLYNOMIAL__) <= 0xFFFFU)) 556 /** @brief Sets the SPI transmit-only mode. 557 * @param __HANDLE__: specifies the SPI Handle. 558 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 559 * @retval None 560 */ 561 #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 562 563 /** @brief Sets the SPI receive-only mode. 564 * @param __HANDLE__: specifies the SPI Handle. 565 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 566 * @retval None 567 */ 568 #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 569 570 /** @brief Resets the CRC calculation of the SPI. 571 * @param __HANDLE__: specifies the SPI Handle. 572 * This parameter can be SPIx where x: 1 or 2 to select the SPI peripheral. 573 * @retval None 574 */ 575 #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ 576 SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0) 577 /** 578 * @} 579 */ 580 581 /* Exported functions --------------------------------------------------------*/ 582 /** @defgroup SPI_Exported_Functions SPI Exported Functions 583 * @{ 584 */ 585 586 /* Initialization/de-initialization functions **********************************/ 587 /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions 588 * @{ 589 */ 590 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 591 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); 592 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 593 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 594 /** 595 * @} 596 */ 597 598 /* I/O operation functions *****************************************************/ 599 /** @defgroup SPI_Exported_Functions_Group2 IO operation functions 600 * @{ 601 */ 602 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 603 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 604 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); 605 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 606 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 607 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); 608 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 609 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 610 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); 611 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 612 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 613 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 614 615 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 616 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 617 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 618 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 619 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 620 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 621 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 622 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 623 /** 624 * @} 625 */ 626 627 628 /* Peripheral State and Control functions **************************************/ 629 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions 630 * @{ 631 */ 632 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); 633 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); 634 635 /** 636 * @} 637 */ 638 639 /** 640 * @} 641 */ 642 643 /* Private group definition ------------------------------------------------------*/ 644 /** @defgroup SPI_Private_Macros SPI Private Macros 645 * @{ 646 */ 647 /** 648 * @} 649 */ 650 651 /* Define the private group ***********************************/ 652 /**************************************************************/ 653 /** @defgroup SPI_Private SPI Private 654 * @{ 655 */ 656 /** 657 * @} 658 */ 659 /**************************************************************/ 660 661 /** 662 * @} 663 */ 664 665 /** 666 * @} 667 */ 668 669 #ifdef __cplusplus 670 } 671 #endif 672 673 #endif /* __STM32L0xx_HAL_SPI_H */ 674 675 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 676 677
