1 /** 2 ****************************************************************************** 3 * @file stm32l0xx_hal_i2s.h 4 * @author MCD Application Team 5 * @brief Header file of I2S HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L0xx_HAL_I2S_H 38 #define __STM32L0xx_HAL_I2S_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 #if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L011xx) && !defined (STM32L021xx) 45 /* Includes ------------------------------------------------------------------*/ 46 #include "stm32l0xx_hal_def.h" 47 48 /** @addtogroup STM32L0xx_HAL_Driver 49 * @{ 50 */ 51 52 /** @defgroup I2S I2S 53 * @{ 54 */ 55 56 /* Exported types ------------------------------------------------------------*/ 57 /** @defgroup I2S_Exported_Types I2S Exported Types 58 * @{ 59 */ 60 61 /** 62 * @brief I2S Init structure definition 63 */ 64 typedef struct 65 { 66 uint32_t Mode; /*!< Specifies the I2S operating mode. 67 This parameter can be a value of @ref I2S_Mode */ 68 69 uint32_t Standard; /*!< Specifies the standard used for the I2S communication. 70 This parameter can be a value of @ref I2S_Standard */ 71 72 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. 73 This parameter can be a value of @ref I2S_Data_Format */ 74 75 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. 76 This parameter can be a value of @ref I2S_MCLK_Output */ 77 78 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. 79 This parameter can be a value of @ref I2S_Audio_Frequency */ 80 81 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. 82 This parameter can be a value of @ref I2S_Clock_Polarity */ 83 84 }I2S_InitTypeDef; 85 86 /** 87 * @brief HAL State structures definition 88 */ 89 typedef enum 90 { 91 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ 92 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ 93 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ 94 HAL_I2S_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ 95 HAL_I2S_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 96 HAL_I2S_STATE_TIMEOUT = 0x03U, /*!< I2S timeout state */ 97 HAL_I2S_STATE_ERROR = 0x04U /*!< I2S error state */ 98 }HAL_I2S_StateTypeDef; 99 100 /** 101 * @brief I2S handle Structure definition 102 */ 103 typedef struct 104 { 105 SPI_TypeDef *Instance; /* I2S registers base address */ 106 107 I2S_InitTypeDef Init; /* I2S communication parameters */ 108 109 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ 110 111 __IO uint16_t TxXferSize; /* I2S Tx transfer size */ 112 113 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ 114 115 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ 116 117 __IO uint16_t RxXferSize; /* I2S Rx transfer size */ 118 119 __IO uint16_t RxXferCount; /* I2S Rx transfer counter 120 (This field is initialized at the 121 same value as transfer size at the 122 beginning of the transfer and 123 decremented when a sample is received. 124 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 125 126 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ 127 128 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ 129 130 __IO HAL_LockTypeDef Lock; /* I2S locking object */ 131 132 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */ 133 134 __IO uint32_t ErrorCode; /* I2S Error code */ 135 136 }I2S_HandleTypeDef; 137 /** 138 * @} 139 */ 140 141 /* Exported constants --------------------------------------------------------*/ 142 /** @defgroup I2S_Exported_Constants I2S Exported Constants 143 * @{ 144 */ 145 146 /** 147 * @defgroup I2S_ErrorCode I2S Error Code 148 * @{ 149 */ 150 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00U) /*!< No error */ 151 #define HAL_I2S_ERROR_UDR ((uint32_t)0x01U) /*!< I2S Underrun error */ 152 #define HAL_I2S_ERROR_OVR ((uint32_t)0x02U) /*!< I2S Overrun error */ 153 #define HAL_I2S_ERROR_FRE ((uint32_t)0x04U) /*!< I2S Frame format error */ 154 #define HAL_I2S_ERROR_DMA ((uint32_t)0x08U) /*!< DMA transfer error */ 155 /** 156 * @} 157 */ 158 159 /** @defgroup I2S_Mode I2S Mode 160 * @{ 161 */ 162 #define I2S_MODE_SLAVE_TX ((uint32_t) 0x00000000U) 163 #define I2S_MODE_SLAVE_RX ((uint32_t) SPI_I2SCFGR_I2SCFG_0) 164 #define I2S_MODE_MASTER_TX ((uint32_t) SPI_I2SCFGR_I2SCFG_1) 165 #define I2S_MODE_MASTER_RX ((uint32_t)(SPI_I2SCFGR_I2SCFG_0 |\ 166 SPI_I2SCFGR_I2SCFG_1)) 167 /** 168 * @} 169 */ 170 171 /** @defgroup I2S_Standard I2S Standard 172 * @{ 173 */ 174 #define I2S_STANDARD_PHILIPS ((uint32_t) 0x00000000U) 175 #define I2S_STANDARD_MSB ((uint32_t) SPI_I2SCFGR_I2SSTD_0) 176 #define I2S_STANDARD_LSB ((uint32_t) SPI_I2SCFGR_I2SSTD_1) 177 #define I2S_STANDARD_PCM_SHORT ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ 178 SPI_I2SCFGR_I2SSTD_1)) 179 #define I2S_STANDARD_PCM_LONG ((uint32_t)(SPI_I2SCFGR_I2SSTD_0 |\ 180 SPI_I2SCFGR_I2SSTD_1 |\ 181 SPI_I2SCFGR_PCMSYNC)) 182 /** @defgroup I2S_Legacy I2S Legacy 183 * @{ 184 */ 185 #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS 186 /** 187 * @} 188 */ 189 190 /** 191 * @} 192 */ 193 194 /** @defgroup I2S_Data_Format I2S Data Format 195 * @{ 196 */ 197 #define I2S_DATAFORMAT_16B ((uint32_t) 0x00000000U) 198 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t) SPI_I2SCFGR_CHLEN) 199 #define I2S_DATAFORMAT_24B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) 200 #define I2S_DATAFORMAT_32B ((uint32_t)(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) 201 /** 202 * @} 203 */ 204 205 /** @defgroup I2S_MCLK_Output I2S MCLK Output 206 * @{ 207 */ 208 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) 209 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000U) 210 /** 211 * @} 212 */ 213 214 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency 215 * @{ 216 */ 217 #define I2S_AUDIOFREQ_192K ((uint32_t)192000U) 218 #define I2S_AUDIOFREQ_96K ((uint32_t)96000U) 219 #define I2S_AUDIOFREQ_48K ((uint32_t)48000U) 220 #define I2S_AUDIOFREQ_44K ((uint32_t)44100U) 221 #define I2S_AUDIOFREQ_32K ((uint32_t)32000U) 222 #define I2S_AUDIOFREQ_22K ((uint32_t)22050U) 223 #define I2S_AUDIOFREQ_16K ((uint32_t)16000U) 224 #define I2S_AUDIOFREQ_11K ((uint32_t)11025U) 225 #define I2S_AUDIOFREQ_8K ((uint32_t)8000U) 226 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2U) 227 /** 228 * @} 229 */ 230 231 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity 232 * @{ 233 */ 234 #define I2S_CPOL_LOW ((uint32_t)0x00000000U) 235 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) 236 /** 237 * @} 238 */ 239 240 /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition 241 * @{ 242 */ 243 #define I2S_IT_TXE SPI_CR2_TXEIE 244 #define I2S_IT_RXNE SPI_CR2_RXNEIE 245 #define I2S_IT_ERR SPI_CR2_ERRIE 246 /** 247 * @} 248 */ 249 250 /** @defgroup I2S_Flag_definition I2S Flag definition 251 * @{ 252 */ 253 #define I2S_FLAG_TXE SPI_SR_TXE 254 #define I2S_FLAG_RXNE SPI_SR_RXNE 255 256 #define I2S_FLAG_UDR SPI_SR_UDR 257 #define I2S_FLAG_OVR SPI_SR_OVR 258 #define I2S_FLAG_FRE SPI_SR_FRE 259 260 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE 261 #define I2S_FLAG_BSY SPI_SR_BSY 262 /** 263 * @} 264 */ 265 266 /** 267 * @} 268 */ 269 270 /* Exported macro ------------------------------------------------------------*/ 271 /** @defgroup I2S_Exported_Macros I2S Exported Macros 272 * @{ 273 */ 274 275 /** @brief Reset I2S handle state 276 * @param __HANDLE__: specifies the I2S Handle. 277 * @retval None 278 */ 279 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) 280 281 /** @brief Enable the specified SPI peripheral (in I2S mode). 282 * @param __HANDLE__: specifies the I2S Handle. 283 * @retval None 284 */ 285 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) 286 287 /** @brief Disable the specified SPI peripheral (in I2S mode). 288 * @param __HANDLE__: specifies the I2S Handle. 289 * @retval None 290 */ 291 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) 292 293 /** @brief Enable the specified I2S interrupts. 294 * @param __HANDLE__: specifies the I2S Handle. 295 * @param __INTERRUPT__: specifies the interrupt source to enable or disable. 296 * This parameter can be one of the following values: 297 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 298 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 299 * @arg I2S_IT_ERR: Error interrupt enable 300 * @retval None 301 */ 302 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) 303 304 /** @brief Disable the specified I2S interrupts. 305 * @param __HANDLE__: specifies the I2S Handle. 306 * @param __INTERRUPT__: specifies the interrupt source to enable or disable. 307 * This parameter can be one of the following values: 308 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 309 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 310 * @arg I2S_IT_ERR: Error interrupt enable 311 * @retval None 312 */ 313 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) 314 315 /** @brief Checks if the specified I2S interrupt source is enabled or disabled. 316 * @param __HANDLE__: specifies the I2S Handle. 317 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. 318 * @param __INTERRUPT__: specifies the I2S interrupt source to check. 319 * This parameter can be one of the following values: 320 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 321 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 322 * @arg I2S_IT_ERR: Error interrupt enable 323 * @retval The new state of __IT__ (TRUE or FALSE). 324 */ 325 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 326 327 /** @brief Checks whether the specified I2S flag is set or not. 328 * @param __HANDLE__: specifies the I2S Handle. 329 * @param __FLAG__: specifies the flag to check. 330 * This parameter can be one of the following values: 331 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag 332 * @arg I2S_FLAG_TXE: Transmit buffer empty flag 333 * @arg I2S_FLAG_UDR: Underrun flag 334 * @arg I2S_FLAG_OVR: Overrun flag 335 * @arg I2S_FLAG_CHSIDE: Channel Side flag 336 * @arg I2S_FLAG_BSY: Busy flag 337 * @retval The new state of __FLAG__ (TRUE or FALSE). 338 */ 339 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 340 341 /** @brief Clears the I2S OVR pending flag. 342 * @param __HANDLE__: specifies the I2S Handle. 343 * @retval None 344 */ 345 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{__IO uint32_t tmpreg = (__HANDLE__)->Instance->DR;\ 346 tmpreg = (__HANDLE__)->Instance->SR;\ 347 UNUSED(tmpreg);\ 348 }while(0) 349 /** @brief Clears the I2S UDR pending flag. 350 * @param __HANDLE__: specifies the I2S Handle. 351 * @retval None 352 */ 353 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR) 354 /** 355 * @} 356 */ 357 358 /* Exported functions --------------------------------------------------------*/ 359 /** @defgroup I2S_Exported_Functions I2S Exported Functions 360 * @{ 361 */ 362 363 /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions 364 * @{ 365 */ 366 /* Initialization/de-initialization functions ********************************/ 367 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); 368 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); 369 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); 370 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); 371 /** 372 * @} 373 */ 374 375 /** @defgroup I2S_Exported_Functions_Group2 IO operation functions 376 * @{ 377 */ 378 /* I/O operation functions ***************************************************/ 379 /* Blocking mode: Polling */ 380 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 381 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 382 383 /* Non-Blocking mode: Interrupt */ 384 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 385 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 386 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); 387 388 /* Non-Blocking mode: DMA */ 389 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 390 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 391 392 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); 393 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); 394 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); 395 396 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 397 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 398 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); 399 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 400 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); 401 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); 402 /** 403 * @} 404 */ 405 406 /** @defgroup I2S_Exported_Functions_Group3 Peripheral Control and State functions 407 * @{ 408 */ 409 /* Peripheral Control and State functions ************************************/ 410 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); 411 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); 412 /** 413 * @} 414 */ 415 416 /** 417 * @} 418 */ 419 420 /* Private macros ------------------------------------------------------------*/ 421 /** @defgroup I2S_Private I2S Private 422 * @{ 423 */ 424 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ 425 ((MODE) == I2S_MODE_SLAVE_RX) || \ 426 ((MODE) == I2S_MODE_MASTER_TX) || \ 427 ((MODE) == I2S_MODE_MASTER_RX)) 428 429 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ 430 ((STANDARD) == I2S_STANDARD_MSB) || \ 431 ((STANDARD) == I2S_STANDARD_LSB) || \ 432 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ 433 ((STANDARD) == I2S_STANDARD_PCM_LONG)) 434 435 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ 436 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ 437 ((FORMAT) == I2S_DATAFORMAT_24B) || \ 438 ((FORMAT) == I2S_DATAFORMAT_32B)) 439 440 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ 441 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) 442 443 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ 444 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ 445 ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) 446 447 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ 448 ((CPOL) == I2S_CPOL_HIGH)) 449 /** 450 * @} 451 */ 452 453 /* Define the private group ***********************************/ 454 /**************************************************************/ 455 /** @defgroup I2S_Private I2S Private 456 * @{ 457 */ 458 /** 459 * @} 460 */ 461 /**************************************************************/ 462 463 /** 464 * @} 465 */ 466 467 /** 468 * @} 469 */ 470 471 #endif /* !STM32L031xx && !STM32L041xx && !STM32L011xx && !STM32L021xx */ 472 473 #ifdef __cplusplus 474 } 475 #endif 476 477 #endif /* __STM32L0xx_HAL_I2S_H */ 478 479 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 480
