1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_ramecc.h 4 * @author MCD Application Team 5 * @brief Header file of RAMECC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_RAMECC_H 21 #define STM32H7xx_HAL_RAMECC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_hal_def.h" 29 30 /** @addtogroup STM32H7xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup RAMECC 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup RAMECC_Exported_Types RAMECC Exported Types 41 * @brief RAMECC Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL RAMECC State structures definition 47 */ 48 typedef enum 49 { 50 HAL_RAMECC_STATE_RESET = 0x00U, /*!< RAMECC not yet initialized or disabled */ 51 HAL_RAMECC_STATE_READY = 0x01U, /*!< RAMECC initialized and ready for use */ 52 HAL_RAMECC_STATE_BUSY = 0x02U, /*!< RAMECC process is ongoing */ 53 HAL_RAMECC_STATE_ERROR = 0x03U, /*!< RAMECC error state */ 54 }HAL_RAMECC_StateTypeDef; 55 56 57 /** 58 * @brief RAMECC handle Structure definition 59 */ 60 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 61 typedef struct __RAMECC_HandleTypeDef 62 #else 63 typedef struct 64 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */ 65 { 66 RAMECC_MonitorTypeDef *Instance; /*!< Register base address */ 67 __IO HAL_RAMECC_StateTypeDef State; /*!< RAMECC state */ 68 __IO uint32_t ErrorCode; /*!< RAMECC Error Code */ 69 __IO uint32_t RAMECCErrorCode; /*!< RAMECC Detected Error Code */ 70 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 71 void (* DetectErrorCallback)( struct __RAMECC_HandleTypeDef *hramecc); /*!< RAMECC Error Detect callback */ 72 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */ 73 }RAMECC_HandleTypeDef; 74 75 /** 76 * @} 77 */ 78 79 80 /* Exported constants --------------------------------------------------------*/ 81 /** @defgroup RAMECC_Exported_Constants RAMECC Exported Constants 82 * @{ 83 */ 84 /** @defgroup RAMECC_Error_Codes RAMECC Error Codes 85 * @{ 86 */ 87 #define HAL_RAMECC_ERROR_NONE 0x00000000U /*!< RAMECC No Error */ 88 #define HAL_RAMECC_ERROR_TIMEOUT 0x00000001U /*!< RAMECC Timeout Error */ 89 #define HAL_RAMECC_ERROR_BUSY 0x00000002U /*!< RAMECC Busy Error */ 90 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 91 #define HAL_RAMECC_ERROR_INVALID_CALLBACK 0x00000003U /*!< Invalid Callback error */ 92 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */ 93 94 /** 95 * @} 96 */ 97 98 /** @defgroup RAMECC_Error_Codes RAMECC Error Detected Codes 99 * @{ 100 */ 101 #define HAL_RAMECC_NO_ERROR 0x00000000U /*!< RAMECC No Error Detected */ 102 #define HAL_RAMECC_SINGLEERROR_DETECTED 0x00000001U /*!< RAMECC Single Error Detected */ 103 #define HAL_RAMECC_DOUBLEERROR_DETECTED 0x00000002U /*!< RAMECC Double Error Detected */ 104 /** 105 * @} 106 */ 107 108 /** @defgroup RAMECC_Interrupt RAMECC interrupts 109 * @{ 110 */ 111 #define RAMECC_IT_GLOBAL_ID 0x10000000UL 112 #define RAMECC_IT_MONITOR_ID 0x20000000UL 113 114 #define RAMECC_IT_GLOBAL_ENABLE (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE) 115 #define RAMECC_IT_GLOBAL_SINGLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCSEIE) 116 #define RAMECC_IT_GLOBAL_DOUBLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEIE) 117 #define RAMECC_IT_GLOBAL_DOUBLEERR_W (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEBWIE) 118 #define RAMECC_IT_GLOBAL_ALL (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE | RAMECC_IER_GECCSEIE | RAMECC_IER_GECCDEIE | RAMECC_IER_GECCDEBWIE) 119 120 121 #define RAMECC_IT_MONITOR_SINGLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCSEIE) 122 #define RAMECC_IT_MONITOR_DOUBLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEIE) 123 #define RAMECC_IT_MONITOR_DOUBLEERR_W (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE) 124 #define RAMECC_IT_MONITOR_ALL (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE | RAMECC_CR_ECCDEIE | RAMECC_CR_ECCSEIE) 125 /** 126 * @} 127 */ 128 129 /** @defgroup RAMECC_FLAG RAMECC Monitor flags 130 * @{ 131 */ 132 #define RAMECC_FLAG_SINGLEERR_R RAMECC_SR_SEDCF 133 #define RAMECC_FLAG_DOUBLEERR_R RAMECC_SR_DEDF 134 #define RAMECC_FLAG_DOUBLEERR_W RAMECC_SR_DEBWDF 135 #define RAMECC_FLAGS_ALL (RAMECC_SR_SEDCF | RAMECC_SR_DEDF | RAMECC_SR_DEBWDF) 136 137 /** 138 * @} 139 */ 140 /** 141 * @} 142 */ 143 144 /* Exported macro ------------------------------------------------------------*/ 145 /** @defgroup RAMECC_Exported_Macros RAMECC Exported Macros 146 * @{ 147 */ 148 149 #define __HAL_RAMECC_ENABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) |= ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) 150 #define __HAL_RAMECC_ENABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= ((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID)) 151 152 /** 153 * @brief Enable the specified RAMECC interrupts. 154 * @param __HANDLE__ : RAMECC handle. 155 * @param __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled. 156 * This parameter can be one of the following values: 157 * @arg RAMECC_IT_GLOBAL_ENABLE : Global interrupt enable mask. 158 * @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt enable. 159 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt enable. 160 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt enable. 161 * @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask. 162 * @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt enable. 163 * @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt enable. 164 * @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt enable. 165 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask. 166 * @retval None 167 */ 168 #define __HAL_RAMECC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( \ 169 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_ENABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\ 170 (__HAL_RAMECC_ENABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__)))) 171 172 173 #define __HAL_RAMECC_DISABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) &= ~((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) 174 #define __HAL_RAMECC_DISABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID)) 175 176 /** 177 * @brief Disable the specified RAMECC interrupts. 178 * @param __HANDLE__ : RAMECC handle. 179 * @param __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled. 180 * This parameter can be one of the following values: 181 * @arg RAMECC_IT_GLOBAL_ENABLE : Global interrupt enable mask. 182 * @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt enable. 183 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt enable. 184 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt enable. 185 * @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask. 186 * @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt enable. 187 * @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt enable. 188 * @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt enable. 189 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask. 190 * @retval None 191 */ 192 #define __HAL_RAMECC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ( \ 193 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_DISABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\ 194 (__HAL_RAMECC_DISABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__)))) 195 196 197 #define __HAL_RAMECC_GET_GLOBAL_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET) 198 #define __HAL_RAMECC_GET_MONITOR_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET) 199 200 /** 201 * @brief Check whether the specified RAMECC interrupt source is enabled or not. 202 * @param __HANDLE__ : Specifies the RAMECC Handle. 203 * @param __INTERRUPT__ : Specifies the RAMECC interrupt source to check. 204 * This parameter can be one of the following values: 205 * @arg RAMECC_IT_GLOBAL_ENABLE : Global interrupt enable mask. 206 * @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt enable. 207 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt enable. 208 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt enable. 209 * @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask. 210 * @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt enable. 211 * @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt enable. 212 * @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt enable. 213 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask. 214 * @retval The new state of __INTERRUPT__ (SET or RESET). 215 */ 216 #define __HAL_RAMECC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ( \ 217 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_GET_GLOBAL_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\ 218 (__HAL_RAMECC_GET_MONITOR_IT_SOURCE((__HANDLE__), (__INTERRUPT__)))) 219 220 221 /** 222 * @brief Get the RAMECC pending flags. 223 * @param __HANDLE__ : RAMECC handle. 224 * @param __FLAG__ : specifies the flag to clear. 225 * This parameter can be any combination of the following values: 226 * @arg RAMECC_FLAG_SINGLEERR_R : RAMECC instance ECC single error detected and corrected flag. 227 * @arg RAMECC_FLAG_DOUBLEERR_R : RAMECC instance ECC double error detected flag. 228 * @arg RAMECC_FLAG_DOUBLEERR_W : RAMECC instance ECC double error on byte write (BW) detected flag. 229 * @arg RAMECC_FLAGS_ALL : RAMECC instance all flag. 230 * @retval The state of __FLAG__ (SET or RESET). 231 */ 232 #define __HAL_RAMECC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= (__FLAG__)) 233 234 235 /** 236 * @brief Clear the RAMECC pending flags. 237 * @param __HANDLE__ : RAMECC handle. 238 * @param __FLAG__ : specifies the flag to clear. 239 * This parameter can be any combination of the following values: 240 * @arg RAMECC_FLAG_SINGLEERR_R : RAMECC instance ECC single error detected and corrected flag. 241 * @arg RAMECC_FLAG_DOUBLEERR_R : RAMECC instance ECC double error detected flag. 242 * @arg RAMECC_FLAG_DOUBLEERR_W : RAMECC instance ECC double error on byte write (BW) detected flag. 243 * @arg RAMECC_FLAGS_ALL : RAMECC instance all flag. 244 * @retval None. 245 */ 246 #define __HAL_RAMECC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__)) 247 248 /** 249 * @brief Reset the RAMECC handle state. 250 * @param __HANDLE__ : Specifies the RAMECC Handle. 251 * @retval None. 252 */ 253 #define __HAL_RAMECC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RAMECC_STATE_RESET) 254 /** 255 * @} 256 */ 257 258 /* Exported functions --------------------------------------------------------*/ 259 260 /** @defgroup RAMECC_Exported_Functions RAMECC Exported Functions 261 * @brief RAMECC Exported functions 262 * @{ 263 */ 264 265 /** @defgroup RAMECC_Exported_Functions_Group1 Initialization and de-initialization functions 266 * @brief Initialization and de-initialization functions 267 * @{ 268 */ 269 HAL_StatusTypeDef HAL_RAMECC_Init(RAMECC_HandleTypeDef *hramecc); 270 HAL_StatusTypeDef HAL_RAMECC_DeInit(RAMECC_HandleTypeDef *hramecc); 271 /** 272 * @} 273 */ 274 275 /** @defgroup RAMECC_Exported_Functions_Group2 monitoring operation functions 276 * @brief monitoring operation functions 277 * @{ 278 */ 279 HAL_StatusTypeDef HAL_RAMECC_StartMonitor(RAMECC_HandleTypeDef *hramecc); 280 HAL_StatusTypeDef HAL_RAMECC_StopMonitor(RAMECC_HandleTypeDef *hramecc); 281 HAL_StatusTypeDef HAL_RAMECC_EnableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications); 282 HAL_StatusTypeDef HAL_RAMECC_DisableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications); 283 284 /** 285 * @} 286 */ 287 288 /** @defgroup RAMECC_Exported_Functions_Group3 handle Interrupt and Callbacks Functions 289 * @brief handle Interrupt and Callbacks Functions 290 * @{ 291 */ 292 void HAL_RAMECC_IRQHandler(RAMECC_HandleTypeDef *hramecc); 293 void HAL_RAMECC_DetectErrorCallback(RAMECC_HandleTypeDef *hramecc); 294 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 295 HAL_StatusTypeDef HAL_RAMECC_RegisterCallback(RAMECC_HandleTypeDef *hramecc, void (* pCallback)(RAMECC_HandleTypeDef *_hramecc)); 296 HAL_StatusTypeDef HAL_RAMECC_UnRegisterCallback(RAMECC_HandleTypeDef *hramecc); 297 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */ 298 /** 299 * @} 300 */ 301 302 /** @defgroup RAMECC_Exported_Functions_Group4 Error information functions 303 * @brief Error information functions 304 * @{ 305 */ 306 uint32_t HAL_RAMECC_GetFailingAddress(const RAMECC_HandleTypeDef *hramecc); 307 uint32_t HAL_RAMECC_GetFailingDataLow(const RAMECC_HandleTypeDef *hramecc); 308 uint32_t HAL_RAMECC_GetFailingDataHigh(const RAMECC_HandleTypeDef *hramecc); 309 uint32_t HAL_RAMECC_GetHammingErrorCode(const RAMECC_HandleTypeDef *hramecc); 310 uint32_t HAL_RAMECC_IsECCSingleErrorDetected(const RAMECC_HandleTypeDef *hramecc); 311 uint32_t HAL_RAMECC_IsECCDoubleErrorDetected(const RAMECC_HandleTypeDef *hramecc); 312 /** 313 * @} 314 */ 315 316 /** @defgroup RAMECC_Exported_Functions_Group5 State and Error Functions 317 * @brief State and Error Functions 318 * @{ 319 */ 320 HAL_RAMECC_StateTypeDef HAL_RAMECC_GetState(const RAMECC_HandleTypeDef *hramecc); 321 uint32_t HAL_RAMECC_GetError(const RAMECC_HandleTypeDef *hramecc); 322 uint32_t HAL_RAMECC_GetRAMECCError(const RAMECC_HandleTypeDef *hramecc); 323 /** 324 * @} 325 */ 326 327 /** 328 * @} 329 */ 330 /* Private Constants -------------------------------------------------------------*/ 331 /** @defgroup RAMECC_Private_Constants RAMECC Private Constants 332 * @brief RAMECC private defines and constants 333 * @{ 334 */ 335 /** 336 * @} 337 */ 338 339 /* Private macros ------------------------------------------------------------*/ 340 /** @defgroup RAMECC_Private_Macros RAMECC Private Macros 341 * @brief RAMECC private macros 342 * @{ 343 */ 344 345 #define IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_GLOBAL_ENABLE) || \ 346 ((INTERRUPT) == RAMECC_IT_GLOBAL_SINGLEERR_R) || \ 347 ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_R) || \ 348 ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_W) || \ 349 ((INTERRUPT) == RAMECC_IT_GLOBAL_ALL)) 350 351 352 #define IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_MONITOR_SINGLEERR_R) || \ 353 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_R) || \ 354 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_W) || \ 355 ((INTERRUPT) == RAMECC_IT_MONITOR_ALL)) 356 357 #define IS_RAMECC_INTERRUPT(INTERRUPT) ((IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT)) || \ 358 (IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT))) 359 360 /** 361 * @} 362 */ 363 364 /* Private functions ---------------------------------------------------------*/ 365 /** @defgroup RAMECC_Private_Functions RAMECC Private Functions 366 * @brief RAMECC private functions 367 * @{ 368 */ 369 /** 370 * @} 371 */ 372 373 /** 374 * @} 375 */ 376 377 /** 378 * @} 379 */ 380 #ifdef __cplusplus 381 } 382 #endif 383 384 #endif /* STM32H7xx_HAL_RAMECC_H */ 385
