1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_lptim.h 4 * @author MCD Application Team 5 * @brief Header file of LPTIM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_LPTIM_H 21 #define STM32H7xx_HAL_LPTIM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_hal_def.h" 29 30 /** @addtogroup STM32H7xx_HAL_Driver 31 * @{ 32 */ 33 34 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5) 35 36 /** @addtogroup LPTIM 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief LPTIM Clock configuration definition 47 */ 48 typedef struct 49 { 50 uint32_t Source; /*!< Selects the clock source. 51 This parameter can be a value of @ref LPTIM_Clock_Source */ 52 53 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. 54 This parameter can be a value of @ref LPTIM_Clock_Prescaler */ 55 56 } LPTIM_ClockConfigTypeDef; 57 58 /** 59 * @brief LPTIM Clock configuration definition 60 */ 61 typedef struct 62 { 63 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit 64 if the ULPTIM input is selected. 65 Note: This parameter is used only when Ultra low power clock source is used. 66 Note: If the polarity is configured on 'both edges', an auxiliary clock 67 (one of the Low power oscillator) must be active. 68 This parameter can be a value of @ref LPTIM_Clock_Polarity */ 69 70 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. 71 Note: This parameter is used only when Ultra low power clock source is used. 72 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ 73 74 } LPTIM_ULPClockConfigTypeDef; 75 76 /** 77 * @brief LPTIM Trigger configuration definition 78 */ 79 typedef struct 80 { 81 uint32_t Source; /*!< Selects the Trigger source. 82 This parameter can be a value of @ref LPTIM_Trigger_Source */ 83 84 uint32_t ActiveEdge; /*!< Selects the Trigger active edge. 85 Note: This parameter is used only when an external trigger is used. 86 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ 87 88 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. 89 Note: This parameter is used only when an external trigger is used. 90 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ 91 } LPTIM_TriggerConfigTypeDef; 92 93 /** 94 * @brief LPTIM Initialization Structure definition 95 */ 96 typedef struct 97 { 98 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ 99 100 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ 101 102 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ 103 104 uint32_t OutputPolarity; /*!< Specifies the Output polarity. 105 This parameter can be a value of @ref LPTIM_Output_Polarity */ 106 107 uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare 108 values is done immediately or after the end of current period. 109 This parameter can be a value of @ref LPTIM_Updating_Mode */ 110 111 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event 112 or each external event. 113 This parameter can be a value of @ref LPTIM_Counter_Source */ 114 115 uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). 116 This parameter can be a value of @ref LPTIM_Input1_Source */ 117 118 uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). 119 Note: This parameter is used only for encoder feature so is used only 120 for LPTIM1 instance. 121 This parameter can be a value of @ref LPTIM_Input2_Source */ 122 } LPTIM_InitTypeDef; 123 124 /** 125 * @brief HAL LPTIM State structure definition 126 */ 127 typedef enum 128 { 129 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ 130 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 131 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ 132 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 133 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ 134 } HAL_LPTIM_StateTypeDef; 135 136 /** 137 * @brief LPTIM handle Structure definition 138 */ 139 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 140 typedef struct __LPTIM_HandleTypeDef 141 #else 142 typedef struct 143 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 144 { 145 LPTIM_TypeDef *Instance; /*!< Register base address */ 146 147 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ 148 149 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ 150 151 HAL_LockTypeDef Lock; /*!< LPTIM locking object */ 152 153 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ 154 155 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 156 void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */ 157 void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */ 158 void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */ 159 void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */ 160 void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */ 161 void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */ 162 void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */ 163 void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */ 164 void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */ 165 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 166 } LPTIM_HandleTypeDef; 167 168 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 169 /** 170 * @brief HAL LPTIM Callback ID enumeration definition 171 */ 172 typedef enum 173 { 174 HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */ 175 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */ 176 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */ 177 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */ 178 HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */ 179 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */ 180 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */ 181 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */ 182 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */ 183 } HAL_LPTIM_CallbackIDTypeDef; 184 185 /** 186 * @brief HAL TIM Callback pointer definition 187 */ 188 typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */ 189 190 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 191 /** 192 * @} 193 */ 194 195 /* Exported constants --------------------------------------------------------*/ 196 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants 197 * @{ 198 */ 199 200 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source 201 * @{ 202 */ 203 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U 204 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL 205 /** 206 * @} 207 */ 208 209 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler 210 * @{ 211 */ 212 #define LPTIM_PRESCALER_DIV1 0x00000000U 213 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 214 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 215 #define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1) 216 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 217 #define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2) 218 #define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2) 219 #define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC 220 /** 221 * @} 222 */ 223 224 /** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity 225 * @{ 226 */ 227 228 #define LPTIM_OUTPUTPOLARITY_HIGH 0x00000000U 229 #define LPTIM_OUTPUTPOLARITY_LOW LPTIM_CFGR_WAVPOL 230 /** 231 * @} 232 */ 233 234 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time 235 * @{ 236 */ 237 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U 238 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 239 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 240 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT 241 /** 242 * @} 243 */ 244 245 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity 246 * @{ 247 */ 248 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U 249 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 250 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 251 /** 252 * @} 253 */ 254 255 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source 256 * @{ 257 */ 258 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU 259 #define LPTIM_TRIGSOURCE_0 0x00000000U 260 #define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0 261 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 262 #define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) 263 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 264 #define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) 265 #define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) 266 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL 267 /** 268 * @} 269 */ 270 271 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity 272 * @{ 273 */ 274 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 275 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 276 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN 277 /** 278 * @} 279 */ 280 281 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time 282 * @{ 283 */ 284 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U 285 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 286 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 287 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT 288 /** 289 * @} 290 */ 291 292 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode 293 * @{ 294 */ 295 296 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U 297 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD 298 /** 299 * @} 300 */ 301 302 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source 303 * @{ 304 */ 305 306 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U 307 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE 308 /** 309 * @} 310 */ 311 312 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source 313 * @{ 314 */ 315 316 #define LPTIM_INPUT1SOURCE_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */ 317 #define LPTIM_INPUT1SOURCE_COMP1 LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM1 and LPTIM2 */ 318 #define LPTIM_INPUT1SOURCE_COMP2 LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM2 */ 319 #define LPTIM_INPUT1SOURCE_COMP1_COMP2 (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0) /*!< For LPTIM2 */ 320 #define LPTIM_INPUT1SOURCE_NOT_CONNECTED 0x00000000U /*!< For LPTIM3 */ 321 #define LPTIM_INPUT1SOURCE_SAI4_FSA LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM3 */ 322 #define LPTIM_INPUT1SOURCE_SAI4_FSB LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM3 */ 323 /** 324 * @} 325 */ 326 327 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source 328 * @{ 329 */ 330 331 #define LPTIM_INPUT2SOURCE_GPIO 0x00000000U /*!< For LPTIM1 */ 332 #define LPTIM_INPUT2SOURCE_COMP2 LPTIM_CFGR2_IN2SEL_0 /*!< For LPTIM1 */ 333 /** 334 * @} 335 */ 336 337 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition 338 * @{ 339 */ 340 341 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN 342 #define LPTIM_FLAG_UP LPTIM_ISR_UP 343 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK 344 #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK 345 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG 346 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM 347 #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM 348 /** 349 * @} 350 */ 351 352 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition 353 * @{ 354 */ 355 #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE 356 #define LPTIM_IT_UP LPTIM_IER_UPIE 357 #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE 358 #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE 359 #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE 360 #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE 361 #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE 362 /** 363 * @} 364 */ 365 366 /** 367 * @} 368 */ 369 370 /* Exported macros -----------------------------------------------------------*/ 371 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros 372 * @{ 373 */ 374 375 /** @brief Reset LPTIM handle state. 376 * @param __HANDLE__ LPTIM handle 377 * @retval None 378 */ 379 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 380 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 381 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 382 (__HANDLE__)->MspInitCallback = NULL; \ 383 (__HANDLE__)->MspDeInitCallback = NULL; \ 384 } while(0) 385 #else 386 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) 387 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 388 389 /** 390 * @brief Enable the LPTIM peripheral. 391 * @param __HANDLE__ LPTIM handle 392 * @retval None 393 */ 394 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) 395 396 /** 397 * @brief Disable the LPTIM peripheral. 398 * @param __HANDLE__ LPTIM handle 399 * @note The following sequence is required to solve LPTIM disable HW limitation. 400 * Please check Errata Sheet ES0335 for more details under "MCU may remain 401 * stuck in LPTIM interrupt when entering Stop mode" section. 402 * @note Please call @ref HAL_LPTIM_GetState() after a call to __HAL_LPTIM_DISABLE to 403 * check for TIMEOUT. 404 * @retval None 405 */ 406 #define __HAL_LPTIM_DISABLE(__HANDLE__) LPTIM_Disable(__HANDLE__) 407 408 /** 409 * @brief Start the LPTIM peripheral in Continuous mode. 410 * @param __HANDLE__ LPTIM handle 411 * @retval None 412 */ 413 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) 414 /** 415 * @brief Start the LPTIM peripheral in single mode. 416 * @param __HANDLE__ LPTIM handle 417 * @retval None 418 */ 419 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) 420 421 /** 422 * @brief Reset the LPTIM Counter register in synchronous mode. 423 * @param __HANDLE__ LPTIM handle 424 * @retval None 425 */ 426 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST) 427 428 /** 429 * @brief Reset after read of the LPTIM Counter register in asynchronous mode. 430 * @param __HANDLE__ LPTIM handle 431 * @retval None 432 */ 433 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE) 434 435 /** 436 * @brief Write the passed parameter in the Autoreload register. 437 * @param __HANDLE__ LPTIM handle 438 * @param __VALUE__ Autoreload value 439 * This parameter must be a value between Min_Data = 0x0001 and Max_Data = 0xFFFF. 440 * @retval None 441 * @note The ARR register can only be modified when the LPTIM instance is enabled. 442 */ 443 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) 444 445 /** 446 * @brief Write the passed parameter in the Compare register. 447 * @param __HANDLE__ LPTIM handle 448 * @param __VALUE__ Compare value 449 * @retval None 450 * @note The CMP register can only be modified when the LPTIM instance is enabled. 451 */ 452 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) 453 454 /** 455 * @brief Check whether the specified LPTIM flag is set or not. 456 * @param __HANDLE__ LPTIM handle 457 * @param __FLAG__ LPTIM flag to check 458 * This parameter can be a value of: 459 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 460 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 461 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 462 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. 463 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 464 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 465 * @arg LPTIM_FLAG_CMPM : Compare match Flag. 466 * @retval The state of the specified flag (SET or RESET). 467 */ 468 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) 469 470 /** 471 * @brief Clear the specified LPTIM flag. 472 * @param __HANDLE__ LPTIM handle. 473 * @param __FLAG__ LPTIM flag to clear. 474 * This parameter can be a value of: 475 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 476 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 477 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 478 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. 479 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 480 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 481 * @arg LPTIM_FLAG_CMPM : Compare match Flag. 482 * @retval None. 483 */ 484 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 485 486 /** 487 * @brief Enable the specified LPTIM interrupt. 488 * @param __HANDLE__ LPTIM handle. 489 * @param __INTERRUPT__ LPTIM interrupt to set. 490 * This parameter can be a value of: 491 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 492 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 493 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 494 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. 495 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 496 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 497 * @arg LPTIM_IT_CMPM : Compare match Interrupt. 498 * @retval None. 499 * @note The LPTIM interrupts can only be enabled when the LPTIM instance is disabled. 500 */ 501 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 502 503 /** 504 * @brief Disable the specified LPTIM interrupt. 505 * @param __HANDLE__ LPTIM handle. 506 * @param __INTERRUPT__ LPTIM interrupt to set. 507 * This parameter can be a value of: 508 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 509 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 510 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 511 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. 512 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 513 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 514 * @arg LPTIM_IT_CMPM : Compare match Interrupt. 515 * @retval None. 516 * @note The LPTIM interrupts can only be disabled when the LPTIM instance is disabled. 517 */ 518 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) 519 520 /** 521 * @brief Check whether the specified LPTIM interrupt source is enabled or not. 522 * @param __HANDLE__ LPTIM handle. 523 * @param __INTERRUPT__ LPTIM interrupt to check. 524 * This parameter can be a value of: 525 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 526 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 527 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 528 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. 529 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 530 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 531 * @arg LPTIM_IT_CMPM : Compare match Interrupt. 532 * @retval Interrupt status. 533 */ 534 535 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\ 536 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 537 538 /** 539 * @} 540 */ 541 542 /* Exported functions --------------------------------------------------------*/ 543 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions 544 * @{ 545 */ 546 547 /** @addtogroup LPTIM_Exported_Functions_Group1 548 * @brief Initialization and Configuration functions. 549 * @{ 550 */ 551 /* Initialization/de-initialization functions ********************************/ 552 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); 553 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); 554 555 /* MSP functions *************************************************************/ 556 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); 557 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); 558 /** 559 * @} 560 */ 561 562 /** @addtogroup LPTIM_Exported_Functions_Group2 563 * @brief Start-Stop operation functions. 564 * @{ 565 */ 566 /* Start/Stop operation functions *********************************************/ 567 /* ################################# PWM Mode ################################*/ 568 /* Blocking mode: Polling */ 569 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 570 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); 571 /* Non-Blocking mode: Interrupt */ 572 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 573 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); 574 575 /* ############################# One Pulse Mode ##############################*/ 576 /* Blocking mode: Polling */ 577 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 578 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); 579 /* Non-Blocking mode: Interrupt */ 580 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 581 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); 582 583 /* ############################## Set once Mode ##############################*/ 584 /* Blocking mode: Polling */ 585 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 586 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); 587 /* Non-Blocking mode: Interrupt */ 588 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 589 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); 590 591 /* ############################### Encoder Mode ##############################*/ 592 /* Blocking mode: Polling */ 593 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); 594 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); 595 /* Non-Blocking mode: Interrupt */ 596 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); 597 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); 598 599 /* ############################# Time out Mode ##############################*/ 600 /* Blocking mode: Polling */ 601 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); 602 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); 603 /* Non-Blocking mode: Interrupt */ 604 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); 605 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); 606 607 /* ############################## Counter Mode ###############################*/ 608 /* Blocking mode: Polling */ 609 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); 610 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); 611 /* Non-Blocking mode: Interrupt */ 612 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); 613 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); 614 /** 615 * @} 616 */ 617 618 /** @addtogroup LPTIM_Exported_Functions_Group3 619 * @brief Read operation functions. 620 * @{ 621 */ 622 /* Reading operation functions ************************************************/ 623 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim); 624 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim); 625 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim); 626 /** 627 * @} 628 */ 629 630 /** @addtogroup LPTIM_Exported_Functions_Group4 631 * @brief LPTIM IRQ handler and callback functions. 632 * @{ 633 */ 634 /* LPTIM IRQ functions *******************************************************/ 635 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); 636 637 /* CallBack functions ********************************************************/ 638 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); 639 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); 640 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); 641 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); 642 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); 643 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); 644 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); 645 646 /* Callbacks Register/UnRegister functions ***********************************/ 647 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 648 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, 649 pLPTIM_CallbackTypeDef pCallback); 650 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); 651 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 652 /** 653 * @} 654 */ 655 656 /** @addtogroup LPTIM_Group5 657 * @brief Peripheral State functions. 658 * @{ 659 */ 660 /* Peripheral State functions ************************************************/ 661 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim); 662 /** 663 * @} 664 */ 665 666 /** 667 * @} 668 */ 669 670 /* Private types -------------------------------------------------------------*/ 671 /** @defgroup LPTIM_Private_Types LPTIM Private Types 672 * @{ 673 */ 674 675 /** 676 * @} 677 */ 678 679 /* Private variables ---------------------------------------------------------*/ 680 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables 681 * @{ 682 */ 683 684 /** 685 * @} 686 */ 687 688 /* Private constants ---------------------------------------------------------*/ 689 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants 690 * @{ 691 */ 692 693 /** 694 * @} 695 */ 696 697 /* Private macros ------------------------------------------------------------*/ 698 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros 699 * @{ 700 */ 701 702 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ 703 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) 704 705 706 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ 707 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ 708 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ 709 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ 710 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ 711 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ 712 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ 713 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) 714 715 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) 716 717 #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \ 718 ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH)) 719 720 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ 721 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ 722 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ 723 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) 724 725 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ 726 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ 727 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) 728 729 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ 730 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ 731 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ 732 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ 733 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ 734 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ 735 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ 736 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ 737 ((__TRIG__) == LPTIM_TRIGSOURCE_7)) 738 739 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ 740 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ 741 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) 742 743 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ 744 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ 745 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ 746 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) 747 748 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ 749 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) 750 751 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ 752 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) 753 754 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) 755 756 #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ 757 ((__PERIOD__) <= 0x0000FFFFUL)) 758 759 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL) 760 761 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 762 ((((__INSTANCE__) == LPTIM1) && \ 763 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 764 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) \ 765 || \ 766 (((__INSTANCE__) == LPTIM2) && \ 767 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 768 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) || \ 769 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP2) || \ 770 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1_COMP2))) \ 771 || \ 772 (((__INSTANCE__) == LPTIM3) && \ 773 (((__SOURCE__) == LPTIM_INPUT1SOURCE_NOT_CONNECTED) || \ 774 ((__SOURCE__) == LPTIM_INPUT1SOURCE_SAI4_FSA) || \ 775 ((__SOURCE__) == LPTIM_INPUT1SOURCE_SAI4_FSB)))) 776 777 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 778 ((((__INSTANCE__) == LPTIM1) || \ 779 ((__INSTANCE__) == LPTIM2)) && \ 780 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \ 781 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2))) 782 783 /** 784 * @} 785 */ 786 787 /* Private functions ---------------------------------------------------------*/ 788 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 789 * @{ 790 */ 791 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim); 792 /** 793 * @} 794 */ 795 796 /** 797 * @} 798 */ 799 800 #endif /* LPTIM1 || LPTIM2 || LPTIM3 || LPTIM4 || LPTIM5 */ 801 /** 802 * @} 803 */ 804 805 #ifdef __cplusplus 806 } 807 #endif 808 809 #endif /* STM32H7xx_HAL_LPTIM_H */ 810
