1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2017 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### How to use this driver #####
28 ==============================================================================
29 [..]
30 The LPTIM HAL driver can be used as follows:
31
32 (#)Initialize the LPTIM low level resources by implementing the
33 HAL_LPTIM_MspInit():
34 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39
40 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41 configures mainly:
42 (++) The instance: LPTIM1 or LPTIM2.
43 (++) Clock: the counter clock.
44 (+++) Source : it can be either the ULPTIM input (IN1) or one of
45 the internal clock; (APB, LSE, LSI or MSI).
46 (+++) Prescaler: select the clock divider.
47 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
48 as counter clock source.
49 (+++) Polarity: polarity of the active edge for the counter unit
50 if the ULPTIM input is selected.
51 (+++) SampleTime: clock sampling time to configure the clock glitch
52 filter.
53 (++) Trigger: How the counter start.
54 (+++) Source: trigger can be software or one of the hardware triggers.
55 (+++) ActiveEdge : only for hardware trigger.
56 (+++) SampleTime : trigger sampling time to configure the trigger
57 glitch filter.
58 (++) OutputPolarity : 2 opposite polarities are possible.
59 (++) UpdateMode: specifies whether the update of the autoreload and
60 the compare values is done immediately or after the end of current
61 period.
62 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
63 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
64 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
65
66 (#)Six modes are available:
67
68 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
69 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
70 mode.
71
72 (++) One Pulse Mode: To generate pulse with specified width in response
73 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
74 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
75
76 (++) Set once Mode: In this mode, the output changes the level (from
77 low level to high level if the output polarity is configured high, else
78 the opposite) when a compare match occurs. To start this mode, call
79 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
80 interruption mode.
81
82 (++) Encoder Mode: To use the encoder interface call
83 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
84 interruption mode. Only available for LPTIM1 instance.
85
86 (++) Time out Mode: an active edge on one selected trigger input rests
87 the counter. The first trigger event will start the timer, any
88 successive trigger event will reset the counter and the timer will
89 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
90 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
91
92 (++) Counter Mode: counter can be used to count external events on
93 the LPTIM Input1 or it can be used to count internal clock cycles.
94 To start this mode, call HAL_LPTIM_Counter_Start() or
95 HAL_LPTIM_Counter_Start_IT() for interruption mode.
96
97
98 (#) User can stop any process by calling the corresponding API:
99 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
100 already started in interruption mode.
101
102 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
103
104 *** Callback registration ***
105 =============================================
106 [..]
107 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
108 allows the user to configure dynamically the driver callbacks.
109 [..]
110 Use Function HAL_LPTIM_RegisterCallback() to register a callback.
111 HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
112 the Callback ID and a pointer to the user callback function.
113 [..]
114 Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
115 default weak function.
116 HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
117 and the Callback ID.
118 [..]
119 These functions allow to register/unregister following callbacks:
120
121 (+) MspInitCallback : LPTIM Base Msp Init Callback.
122 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
123 (+) CompareMatchCallback : Compare match Callback.
124 (+) AutoReloadMatchCallback : Auto-reload match Callback.
125 (+) TriggerCallback : External trigger event detection Callback.
126 (+) CompareWriteCallback : Compare register write complete Callback.
127 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
128 (+) DirectionUpCallback : Up-counting direction change Callback.
129 (+) DirectionDownCallback : Down-counting direction change Callback.
130
131 [..]
132 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
133 all interrupt callbacks are set to the corresponding weak functions:
134 examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
135
136 [..]
137 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
138 functionalities in the Init/DeInit only when these callbacks are null
139 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
140 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
141
142 [..]
143 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
144 Exception done MspInit/MspDeInit that can be registered/unregistered
145 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
146 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
147 In that case first register the MspInit/MspDeInit user callbacks
148 using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
149
150 [..]
151 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
152 not defined, the callback registration feature is not available and all callbacks
153 are set to the corresponding weak functions.
154
155 @endverbatim
156 ******************************************************************************
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32h7xx_hal.h"
161
162 /** @addtogroup STM32H7xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup LPTIM LPTIM
167 * @brief LPTIM HAL module driver.
168 * @{
169 */
170
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172
173 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5)
174
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /** @addtogroup LPTIM_Private_Constants
178 * @{
179 */
180 #define TIMEOUT 1000UL /* Timeout is 1s */
181 /**
182 * @}
183 */
184
185 /* Private macro -------------------------------------------------------------*/
186 /* Private variables ---------------------------------------------------------*/
187 /* Private function prototypes -----------------------------------------------*/
188 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
189 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
190 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
191 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
192
193 /* Exported functions --------------------------------------------------------*/
194
195 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
196 * @{
197 */
198
199 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
200 * @brief Initialization and Configuration functions.
201 *
202 @verbatim
203 ==============================================================================
204 ##### Initialization and de-initialization functions #####
205 ==============================================================================
206 [..] This section provides functions allowing to:
207 (+) Initialize the LPTIM according to the specified parameters in the
208 LPTIM_InitTypeDef and initialize the associated handle.
209 (+) DeInitialize the LPTIM peripheral.
210 (+) Initialize the LPTIM MSP.
211 (+) DeInitialize the LPTIM MSP.
212
213 @endverbatim
214 * @{
215 */
216
217 /**
218 * @brief Initialize the LPTIM according to the specified parameters in the
219 * LPTIM_InitTypeDef and initialize the associated handle.
220 * @param hlptim LPTIM handle
221 * @retval HAL status
222 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)223 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
224 {
225 uint32_t tmpcfgr;
226
227 /* Check the LPTIM handle allocation */
228 if (hlptim == NULL)
229 {
230 return HAL_ERROR;
231 }
232
233 /* Check the parameters */
234 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
235
236 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
237 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
238 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
239 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
240 {
241 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
242 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
243 }
244 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
245 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
246 {
247 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
248 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
249 }
250 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
251 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
252 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
253
254 if (hlptim->State == HAL_LPTIM_STATE_RESET)
255 {
256 /* Allocate lock resource and initialize it */
257 hlptim->Lock = HAL_UNLOCKED;
258
259 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
260 /* Reset interrupt callbacks to legacy weak callbacks */
261 LPTIM_ResetCallback(hlptim);
262
263 if (hlptim->MspInitCallback == NULL)
264 {
265 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
266 }
267
268 /* Init the low level hardware : GPIO, CLOCK, NVIC */
269 hlptim->MspInitCallback(hlptim);
270 #else
271 /* Init the low level hardware : GPIO, CLOCK, NVIC */
272 HAL_LPTIM_MspInit(hlptim);
273 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
274 }
275
276 /* Change the LPTIM state */
277 hlptim->State = HAL_LPTIM_STATE_BUSY;
278
279 /* Get the LPTIMx CFGR value */
280 tmpcfgr = hlptim->Instance->CFGR;
281
282 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
283 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
284 {
285 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
286 }
287 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
288 {
289 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
290 }
291
292 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
293 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
294 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
295
296 /* Set initialization parameters */
297 tmpcfgr |= (hlptim->Init.Clock.Source |
298 hlptim->Init.Clock.Prescaler |
299 hlptim->Init.OutputPolarity |
300 hlptim->Init.UpdateMode |
301 hlptim->Init.CounterSource);
302
303 /* Glitch filters for internal triggers and external inputs are configured
304 * only if an internal clock source is provided to the LPTIM
305 */
306 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
307 {
308 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
309 hlptim->Init.UltraLowPowerClock.SampleTime);
310 }
311
312 /* Configure LPTIM external clock polarity and digital filter */
313 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
314 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
315 {
316 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
317 hlptim->Init.UltraLowPowerClock.SampleTime);
318 }
319
320 /* Configure LPTIM external trigger */
321 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
322 {
323 /* Enable External trigger and set the trigger source */
324 tmpcfgr |= (hlptim->Init.Trigger.Source |
325 hlptim->Init.Trigger.ActiveEdge |
326 hlptim->Init.Trigger.SampleTime);
327 }
328
329 /* Write to LPTIMx CFGR */
330 hlptim->Instance->CFGR = tmpcfgr;
331
332 /* Configure LPTIM input sources */
333 if ((hlptim->Instance == LPTIM1) || (hlptim->Instance == LPTIM2))
334 {
335 /* Check LPTIM Input1 and Input2 sources */
336 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
337 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
338
339 /* Configure LPTIM Input1 and Input2 sources */
340 hlptim->Instance->CFGR2 = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
341 }
342 else
343 {
344 if (hlptim->Instance == LPTIM3)
345 {
346 /* Check LPTIM3 Input1 source */
347 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
348
349 /* Configure LPTIM3 Input1 source */
350 hlptim->Instance->CFGR2 = hlptim->Init.Input1Source;
351 }
352 }
353
354 /* Change the LPTIM state */
355 hlptim->State = HAL_LPTIM_STATE_READY;
356
357 /* Return function status */
358 return HAL_OK;
359 }
360
361 /**
362 * @brief DeInitialize the LPTIM peripheral.
363 * @param hlptim LPTIM handle
364 * @retval HAL status
365 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)366 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
367 {
368 /* Check the LPTIM handle allocation */
369 if (hlptim == NULL)
370 {
371 return HAL_ERROR;
372 }
373
374 /* Change the LPTIM state */
375 hlptim->State = HAL_LPTIM_STATE_BUSY;
376
377 /* Disable the LPTIM Peripheral Clock */
378 __HAL_LPTIM_DISABLE(hlptim);
379
380 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
381 {
382 return HAL_TIMEOUT;
383 }
384
385 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
386 if (hlptim->MspDeInitCallback == NULL)
387 {
388 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
389 }
390
391 /* DeInit the low level hardware: CLOCK, NVIC.*/
392 hlptim->MspDeInitCallback(hlptim);
393 #else
394 /* DeInit the low level hardware: CLOCK, NVIC.*/
395 HAL_LPTIM_MspDeInit(hlptim);
396 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
397
398 /* Change the LPTIM state */
399 hlptim->State = HAL_LPTIM_STATE_RESET;
400
401 /* Release Lock */
402 __HAL_UNLOCK(hlptim);
403
404 /* Return function status */
405 return HAL_OK;
406 }
407
408 /**
409 * @brief Initialize the LPTIM MSP.
410 * @param hlptim LPTIM handle
411 * @retval None
412 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)413 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
414 {
415 /* Prevent unused argument(s) compilation warning */
416 UNUSED(hlptim);
417
418 /* NOTE : This function should not be modified, when the callback is needed,
419 the HAL_LPTIM_MspInit could be implemented in the user file
420 */
421 }
422
423 /**
424 * @brief DeInitialize LPTIM MSP.
425 * @param hlptim LPTIM handle
426 * @retval None
427 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)428 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
429 {
430 /* Prevent unused argument(s) compilation warning */
431 UNUSED(hlptim);
432
433 /* NOTE : This function should not be modified, when the callback is needed,
434 the HAL_LPTIM_MspDeInit could be implemented in the user file
435 */
436 }
437
438 /**
439 * @}
440 */
441
442 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
443 * @brief Start-Stop operation functions.
444 *
445 @verbatim
446 ==============================================================================
447 ##### LPTIM Start Stop operation functions #####
448 ==============================================================================
449 [..] This section provides functions allowing to:
450 (+) Start the PWM mode.
451 (+) Stop the PWM mode.
452 (+) Start the One pulse mode.
453 (+) Stop the One pulse mode.
454 (+) Start the Set once mode.
455 (+) Stop the Set once mode.
456 (+) Start the Encoder mode.
457 (+) Stop the Encoder mode.
458 (+) Start the Timeout mode.
459 (+) Stop the Timeout mode.
460 (+) Start the Counter mode.
461 (+) Stop the Counter mode.
462
463
464 @endverbatim
465 * @{
466 */
467
468 /**
469 * @brief Start the LPTIM PWM generation.
470 * @param hlptim LPTIM handle
471 * @param Period Specifies the Autoreload value.
472 * This parameter must be a value between 0x0001 and 0xFFFF.
473 * @param Pulse Specifies the compare value.
474 * This parameter must be a value between 0x0000 and 0xFFFF.
475 * @retval HAL status
476 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)477 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
478 {
479 /* Check the parameters */
480 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
481 assert_param(IS_LPTIM_PERIOD(Period));
482 assert_param(IS_LPTIM_PULSE(Pulse));
483
484 /* Set the LPTIM state */
485 hlptim->State = HAL_LPTIM_STATE_BUSY;
486
487 /* Reset WAVE bit to set PWM mode */
488 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
489
490 /* Enable the Peripheral */
491 __HAL_LPTIM_ENABLE(hlptim);
492
493 /* Clear flag */
494 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
495
496 /* Load the period value in the autoreload register */
497 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
498
499 /* Wait for the completion of the write operation to the LPTIM_ARR register */
500 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
501 {
502 return HAL_TIMEOUT;
503 }
504
505 /* Clear flag */
506 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
507
508 /* Load the pulse value in the compare register */
509 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
510
511 /* Wait for the completion of the write operation to the LPTIM_CMP register */
512 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
513 {
514 return HAL_TIMEOUT;
515 }
516
517 /* Start timer in continuous mode */
518 __HAL_LPTIM_START_CONTINUOUS(hlptim);
519
520 /* Change the LPTIM state */
521 hlptim->State = HAL_LPTIM_STATE_READY;
522
523 /* Return function status */
524 return HAL_OK;
525 }
526
527 /**
528 * @brief Stop the LPTIM PWM generation.
529 * @param hlptim LPTIM handle
530 * @retval HAL status
531 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)532 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
533 {
534 /* Check the parameters */
535 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
536
537 /* Change the LPTIM state */
538 hlptim->State = HAL_LPTIM_STATE_BUSY;
539
540 /* Disable the Peripheral */
541 __HAL_LPTIM_DISABLE(hlptim);
542
543 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
544 {
545 return HAL_TIMEOUT;
546 }
547
548 /* Change the LPTIM state */
549 hlptim->State = HAL_LPTIM_STATE_READY;
550
551 /* Return function status */
552 return HAL_OK;
553 }
554
555 /**
556 * @brief Start the LPTIM PWM generation in interrupt mode.
557 * @param hlptim LPTIM handle
558 * @param Period Specifies the Autoreload value.
559 * This parameter must be a value between 0x0001 and 0xFFFF
560 * @param Pulse Specifies the compare value.
561 * This parameter must be a value between 0x0000 and 0xFFFF
562 * @retval HAL status
563 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)564 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
565 {
566 /* Check the parameters */
567 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
568 assert_param(IS_LPTIM_PERIOD(Period));
569 assert_param(IS_LPTIM_PULSE(Pulse));
570
571 /* Set the LPTIM state */
572 hlptim->State = HAL_LPTIM_STATE_BUSY;
573
574 /* Reset WAVE bit to set PWM mode */
575 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
576
577 /* Enable the Peripheral */
578 __HAL_LPTIM_ENABLE(hlptim);
579
580 /* Clear flag */
581 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
582
583 /* Load the period value in the autoreload register */
584 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
585
586 /* Wait for the completion of the write operation to the LPTIM_ARR register */
587 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
588 {
589 return HAL_TIMEOUT;
590 }
591
592 /* Clear flag */
593 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
594
595 /* Load the pulse value in the compare register */
596 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
597
598 /* Wait for the completion of the write operation to the LPTIM_CMP register */
599 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
600 {
601 return HAL_TIMEOUT;
602 }
603
604 /* Disable the Peripheral */
605 __HAL_LPTIM_DISABLE(hlptim);
606
607 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
608 {
609 return HAL_TIMEOUT;
610 }
611
612 /* Enable Autoreload write complete interrupt */
613 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
614
615 /* Enable Compare write complete interrupt */
616 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
617
618 /* Enable Autoreload match interrupt */
619 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
620
621 /* Enable Compare match interrupt */
622 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
623
624 /* If external trigger source is used, then enable external trigger interrupt */
625 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
626 {
627 /* Enable external trigger interrupt */
628 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
629 }
630
631 /* Enable the Peripheral */
632 __HAL_LPTIM_ENABLE(hlptim);
633
634 /* Start timer in continuous mode */
635 __HAL_LPTIM_START_CONTINUOUS(hlptim);
636
637 /* Change the LPTIM state */
638 hlptim->State = HAL_LPTIM_STATE_READY;
639
640 /* Return function status */
641 return HAL_OK;
642 }
643
644 /**
645 * @brief Stop the LPTIM PWM generation in interrupt mode.
646 * @param hlptim LPTIM handle
647 * @retval HAL status
648 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)649 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
650 {
651 /* Check the parameters */
652 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
653
654 /* Change the LPTIM state */
655 hlptim->State = HAL_LPTIM_STATE_BUSY;
656
657 /* Disable the Peripheral */
658 __HAL_LPTIM_DISABLE(hlptim);
659
660 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
661 {
662 return HAL_TIMEOUT;
663 }
664
665 /* Disable Autoreload write complete interrupt */
666 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
667
668 /* Disable Compare write complete interrupt */
669 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
670
671 /* Disable Autoreload match interrupt */
672 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
673
674 /* Disable Compare match interrupt */
675 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
676
677 /* If external trigger source is used, then disable external trigger interrupt */
678 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
679 {
680 /* Disable external trigger interrupt */
681 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
682 }
683
684 /* Change the LPTIM state */
685 hlptim->State = HAL_LPTIM_STATE_READY;
686
687 /* Return function status */
688 return HAL_OK;
689 }
690
691 /**
692 * @brief Start the LPTIM One pulse generation.
693 * @param hlptim LPTIM handle
694 * @param Period Specifies the Autoreload value.
695 * This parameter must be a value between 0x0001 and 0xFFFF.
696 * @param Pulse Specifies the compare value.
697 * This parameter must be a value between 0x0000 and 0xFFFF.
698 * @retval HAL status
699 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)700 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
701 {
702 /* Check the parameters */
703 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
704 assert_param(IS_LPTIM_PERIOD(Period));
705 assert_param(IS_LPTIM_PULSE(Pulse));
706
707 /* Set the LPTIM state */
708 hlptim->State = HAL_LPTIM_STATE_BUSY;
709
710 /* Reset WAVE bit to set one pulse mode */
711 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
712
713 /* Enable the Peripheral */
714 __HAL_LPTIM_ENABLE(hlptim);
715
716 /* Clear flag */
717 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
718
719 /* Load the period value in the autoreload register */
720 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
721
722 /* Wait for the completion of the write operation to the LPTIM_ARR register */
723 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
724 {
725 return HAL_TIMEOUT;
726 }
727
728 /* Clear flag */
729 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
730
731 /* Load the pulse value in the compare register */
732 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
733
734 /* Wait for the completion of the write operation to the LPTIM_CMP register */
735 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
736 {
737 return HAL_TIMEOUT;
738 }
739
740 /* Start timer in single (one shot) mode */
741 __HAL_LPTIM_START_SINGLE(hlptim);
742
743 /* Change the LPTIM state */
744 hlptim->State = HAL_LPTIM_STATE_READY;
745
746 /* Return function status */
747 return HAL_OK;
748 }
749
750 /**
751 * @brief Stop the LPTIM One pulse generation.
752 * @param hlptim LPTIM handle
753 * @retval HAL status
754 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)755 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
756 {
757 /* Check the parameters */
758 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
759
760 /* Set the LPTIM state */
761 hlptim->State = HAL_LPTIM_STATE_BUSY;
762
763 /* Disable the Peripheral */
764 __HAL_LPTIM_DISABLE(hlptim);
765
766 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
767 {
768 return HAL_TIMEOUT;
769 }
770
771 /* Change the LPTIM state */
772 hlptim->State = HAL_LPTIM_STATE_READY;
773
774 /* Return function status */
775 return HAL_OK;
776 }
777
778 /**
779 * @brief Start the LPTIM One pulse generation in interrupt mode.
780 * @param hlptim LPTIM handle
781 * @param Period Specifies the Autoreload value.
782 * This parameter must be a value between 0x0001 and 0xFFFF.
783 * @param Pulse Specifies the compare value.
784 * This parameter must be a value between 0x0000 and 0xFFFF.
785 * @retval HAL status
786 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)787 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
788 {
789 /* Check the parameters */
790 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
791 assert_param(IS_LPTIM_PERIOD(Period));
792 assert_param(IS_LPTIM_PULSE(Pulse));
793
794 /* Set the LPTIM state */
795 hlptim->State = HAL_LPTIM_STATE_BUSY;
796
797 /* Reset WAVE bit to set one pulse mode */
798 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
799
800 /* Enable the Peripheral */
801 __HAL_LPTIM_ENABLE(hlptim);
802
803 /* Clear flag */
804 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
805
806 /* Load the period value in the autoreload register */
807 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
808
809 /* Wait for the completion of the write operation to the LPTIM_ARR register */
810 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
811 {
812 return HAL_TIMEOUT;
813 }
814
815 /* Clear flag */
816 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
817
818 /* Load the pulse value in the compare register */
819 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
820
821 /* Wait for the completion of the write operation to the LPTIM_CMP register */
822 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
823 {
824 return HAL_TIMEOUT;
825 }
826
827 /* Disable the Peripheral */
828 __HAL_LPTIM_DISABLE(hlptim);
829
830 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
831 {
832 return HAL_TIMEOUT;
833 }
834
835 /* Enable Autoreload write complete interrupt */
836 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
837
838 /* Enable Compare write complete interrupt */
839 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
840
841 /* Enable Autoreload match interrupt */
842 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
843
844 /* Enable Compare match interrupt */
845 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
846
847 /* If external trigger source is used, then enable external trigger interrupt */
848 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
849 {
850 /* Enable external trigger interrupt */
851 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
852 }
853
854 /* Enable the Peripheral */
855 __HAL_LPTIM_ENABLE(hlptim);
856
857 /* Start timer in single (one shot) mode */
858 __HAL_LPTIM_START_SINGLE(hlptim);
859
860 /* Change the LPTIM state */
861 hlptim->State = HAL_LPTIM_STATE_READY;
862
863 /* Return function status */
864 return HAL_OK;
865 }
866
867 /**
868 * @brief Stop the LPTIM One pulse generation in interrupt mode.
869 * @param hlptim LPTIM handle
870 * @retval HAL status
871 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)872 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
873 {
874 /* Check the parameters */
875 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
876
877 /* Set the LPTIM state */
878 hlptim->State = HAL_LPTIM_STATE_BUSY;
879
880
881 /* Disable the Peripheral */
882 __HAL_LPTIM_DISABLE(hlptim);
883
884 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
885 {
886 return HAL_TIMEOUT;
887 }
888
889 /* Disable Autoreload write complete interrupt */
890 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
891
892 /* Disable Compare write complete interrupt */
893 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
894
895 /* Disable Autoreload match interrupt */
896 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
897
898 /* Disable Compare match interrupt */
899 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
900
901 /* If external trigger source is used, then disable external trigger interrupt */
902 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
903 {
904 /* Disable external trigger interrupt */
905 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
906 }
907
908 /* Change the LPTIM state */
909 hlptim->State = HAL_LPTIM_STATE_READY;
910
911 /* Return function status */
912 return HAL_OK;
913 }
914
915 /**
916 * @brief Start the LPTIM in Set once mode.
917 * @param hlptim LPTIM handle
918 * @param Period Specifies the Autoreload value.
919 * This parameter must be a value between 0x0001 and 0xFFFF.
920 * @param Pulse Specifies the compare value.
921 * This parameter must be a value between 0x0000 and 0xFFFF.
922 * @retval HAL status
923 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)924 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
925 {
926 /* Check the parameters */
927 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
928 assert_param(IS_LPTIM_PERIOD(Period));
929 assert_param(IS_LPTIM_PULSE(Pulse));
930
931 /* Set the LPTIM state */
932 hlptim->State = HAL_LPTIM_STATE_BUSY;
933
934 /* Set WAVE bit to enable the set once mode */
935 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
936
937 /* Enable the Peripheral */
938 __HAL_LPTIM_ENABLE(hlptim);
939
940 /* Clear flag */
941 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
942
943 /* Load the period value in the autoreload register */
944 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
945
946 /* Wait for the completion of the write operation to the LPTIM_ARR register */
947 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
948 {
949 return HAL_TIMEOUT;
950 }
951
952 /* Clear flag */
953 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
954
955 /* Load the pulse value in the compare register */
956 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
957
958 /* Wait for the completion of the write operation to the LPTIM_CMP register */
959 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
960 {
961 return HAL_TIMEOUT;
962 }
963
964 /* Start timer in single (one shot) mode */
965 __HAL_LPTIM_START_SINGLE(hlptim);
966
967 /* Change the LPTIM state */
968 hlptim->State = HAL_LPTIM_STATE_READY;
969
970 /* Return function status */
971 return HAL_OK;
972 }
973
974 /**
975 * @brief Stop the LPTIM Set once mode.
976 * @param hlptim LPTIM handle
977 * @retval HAL status
978 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)979 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
980 {
981 /* Check the parameters */
982 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
983
984 /* Set the LPTIM state */
985 hlptim->State = HAL_LPTIM_STATE_BUSY;
986
987 /* Disable the Peripheral */
988 __HAL_LPTIM_DISABLE(hlptim);
989
990 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
991 {
992 return HAL_TIMEOUT;
993 }
994
995 /* Change the LPTIM state */
996 hlptim->State = HAL_LPTIM_STATE_READY;
997
998 /* Return function status */
999 return HAL_OK;
1000 }
1001
1002 /**
1003 * @brief Start the LPTIM Set once mode in interrupt mode.
1004 * @param hlptim LPTIM handle
1005 * @param Period Specifies the Autoreload value.
1006 * This parameter must be a value between 0x0000 and 0xFFFF.
1007 * @param Pulse Specifies the compare value.
1008 * This parameter must be a value between 0x0000 and 0xFFFF.
1009 * @retval HAL status
1010 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1011 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1012 {
1013 /* Check the parameters */
1014 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1015 assert_param(IS_LPTIM_PERIOD(Period));
1016 assert_param(IS_LPTIM_PULSE(Pulse));
1017
1018 /* Set the LPTIM state */
1019 hlptim->State = HAL_LPTIM_STATE_BUSY;
1020
1021 /* Set WAVE bit to enable the set once mode */
1022 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1023
1024 /* Enable the Peripheral */
1025 __HAL_LPTIM_ENABLE(hlptim);
1026
1027 /* Clear flag */
1028 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1029
1030 /* Load the period value in the autoreload register */
1031 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1032
1033 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1034 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1035 {
1036 return HAL_TIMEOUT;
1037 }
1038
1039 /* Clear flag */
1040 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1041
1042 /* Load the pulse value in the compare register */
1043 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1044
1045 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1046 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1047 {
1048 return HAL_TIMEOUT;
1049 }
1050
1051 /* Disable the Peripheral */
1052 __HAL_LPTIM_DISABLE(hlptim);
1053
1054 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1055 {
1056 return HAL_TIMEOUT;
1057 }
1058
1059 /* Enable Autoreload write complete interrupt */
1060 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1061
1062 /* Enable Compare write complete interrupt */
1063 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1064
1065 /* Enable Autoreload match interrupt */
1066 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1067
1068 /* Enable Compare match interrupt */
1069 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1070
1071 /* If external trigger source is used, then enable external trigger interrupt */
1072 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1073 {
1074 /* Enable external trigger interrupt */
1075 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1076 }
1077
1078 /* Enable the Peripheral */
1079 __HAL_LPTIM_ENABLE(hlptim);
1080
1081 /* Start timer in single (one shot) mode */
1082 __HAL_LPTIM_START_SINGLE(hlptim);
1083
1084 /* Change the LPTIM state */
1085 hlptim->State = HAL_LPTIM_STATE_READY;
1086
1087 /* Return function status */
1088 return HAL_OK;
1089 }
1090
1091 /**
1092 * @brief Stop the LPTIM Set once mode in interrupt mode.
1093 * @param hlptim LPTIM handle
1094 * @retval HAL status
1095 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1096 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1097 {
1098 /* Check the parameters */
1099 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1100
1101 /* Set the LPTIM state */
1102 hlptim->State = HAL_LPTIM_STATE_BUSY;
1103
1104 /* Disable the Peripheral */
1105 __HAL_LPTIM_DISABLE(hlptim);
1106
1107 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1108 {
1109 return HAL_TIMEOUT;
1110 }
1111
1112 /* Disable Autoreload write complete interrupt */
1113 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1114
1115 /* Disable Compare write complete interrupt */
1116 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1117
1118 /* Disable Autoreload match interrupt */
1119 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1120
1121 /* Disable Compare match interrupt */
1122 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1123
1124 /* If external trigger source is used, then disable external trigger interrupt */
1125 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1126 {
1127 /* Disable external trigger interrupt */
1128 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1129 }
1130
1131 /* Change the LPTIM state */
1132 hlptim->State = HAL_LPTIM_STATE_READY;
1133
1134 /* Return function status */
1135 return HAL_OK;
1136 }
1137
1138 /**
1139 * @brief Start the Encoder interface.
1140 * @param hlptim LPTIM handle
1141 * @param Period Specifies the Autoreload value.
1142 * This parameter must be a value between 0x0001 and 0xFFFF.
1143 * @retval HAL status
1144 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1145 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1146 {
1147 uint32_t tmpcfgr;
1148
1149 /* Check the parameters */
1150 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1151 assert_param(IS_LPTIM_PERIOD(Period));
1152 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1153 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1154 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1155
1156 /* Set the LPTIM state */
1157 hlptim->State = HAL_LPTIM_STATE_BUSY;
1158
1159 /* Get the LPTIMx CFGR value */
1160 tmpcfgr = hlptim->Instance->CFGR;
1161
1162 /* Clear CKPOL bits */
1163 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1164
1165 /* Set Input polarity */
1166 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1167
1168 /* Write to LPTIMx CFGR */
1169 hlptim->Instance->CFGR = tmpcfgr;
1170
1171 /* Set ENC bit to enable the encoder interface */
1172 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1173
1174 /* Enable the Peripheral */
1175 __HAL_LPTIM_ENABLE(hlptim);
1176
1177 /* Clear flag */
1178 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1179
1180 /* Load the period value in the autoreload register */
1181 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1182
1183 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1184 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1185 {
1186 return HAL_TIMEOUT;
1187 }
1188
1189 /* Start timer in continuous mode */
1190 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1191
1192 /* Change the LPTIM state */
1193 hlptim->State = HAL_LPTIM_STATE_READY;
1194
1195 /* Return function status */
1196 return HAL_OK;
1197 }
1198
1199 /**
1200 * @brief Stop the Encoder interface.
1201 * @param hlptim LPTIM handle
1202 * @retval HAL status
1203 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1204 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1205 {
1206 /* Check the parameters */
1207 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1208
1209 /* Set the LPTIM state */
1210 hlptim->State = HAL_LPTIM_STATE_BUSY;
1211
1212 /* Disable the Peripheral */
1213 __HAL_LPTIM_DISABLE(hlptim);
1214
1215 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1216 {
1217 return HAL_TIMEOUT;
1218 }
1219
1220 /* Reset ENC bit to disable the encoder interface */
1221 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1222
1223 /* Change the LPTIM state */
1224 hlptim->State = HAL_LPTIM_STATE_READY;
1225
1226 /* Return function status */
1227 return HAL_OK;
1228 }
1229
1230 /**
1231 * @brief Start the Encoder interface in interrupt mode.
1232 * @param hlptim LPTIM handle
1233 * @param Period Specifies the Autoreload value.
1234 * This parameter must be a value between 0x0000 and 0xFFFF.
1235 * @retval HAL status
1236 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1237 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1238 {
1239 uint32_t tmpcfgr;
1240
1241 /* Check the parameters */
1242 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1243 assert_param(IS_LPTIM_PERIOD(Period));
1244 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1245 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1246 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1247
1248 /* Set the LPTIM state */
1249 hlptim->State = HAL_LPTIM_STATE_BUSY;
1250
1251 /* Configure edge sensitivity for encoder mode */
1252 /* Get the LPTIMx CFGR value */
1253 tmpcfgr = hlptim->Instance->CFGR;
1254
1255 /* Clear CKPOL bits */
1256 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1257
1258 /* Set Input polarity */
1259 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1260
1261 /* Write to LPTIMx CFGR */
1262 hlptim->Instance->CFGR = tmpcfgr;
1263
1264 /* Set ENC bit to enable the encoder interface */
1265 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1266
1267 /* Enable the Peripheral */
1268 __HAL_LPTIM_ENABLE(hlptim);
1269
1270 /* Clear flag */
1271 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1272
1273 /* Load the period value in the autoreload register */
1274 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1275
1276 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1277 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1278 {
1279 return HAL_TIMEOUT;
1280 }
1281
1282 /* Disable the Peripheral */
1283 __HAL_LPTIM_DISABLE(hlptim);
1284
1285 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1286 {
1287 return HAL_TIMEOUT;
1288 }
1289
1290 /* Enable "switch to down direction" interrupt */
1291 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1292
1293 /* Enable "switch to up direction" interrupt */
1294 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1295
1296 /* Enable the Peripheral */
1297 __HAL_LPTIM_ENABLE(hlptim);
1298
1299 /* Start timer in continuous mode */
1300 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1301
1302 /* Change the LPTIM state */
1303 hlptim->State = HAL_LPTIM_STATE_READY;
1304
1305 /* Return function status */
1306 return HAL_OK;
1307 }
1308
1309 /**
1310 * @brief Stop the Encoder interface in interrupt mode.
1311 * @param hlptim LPTIM handle
1312 * @retval HAL status
1313 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1314 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1315 {
1316 /* Check the parameters */
1317 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1318
1319 /* Set the LPTIM state */
1320 hlptim->State = HAL_LPTIM_STATE_BUSY;
1321
1322 /* Disable the Peripheral */
1323 __HAL_LPTIM_DISABLE(hlptim);
1324
1325 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1326 {
1327 return HAL_TIMEOUT;
1328 }
1329
1330 /* Reset ENC bit to disable the encoder interface */
1331 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1332
1333 /* Disable "switch to down direction" interrupt */
1334 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1335
1336 /* Disable "switch to up direction" interrupt */
1337 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1338
1339 /* Change the LPTIM state */
1340 hlptim->State = HAL_LPTIM_STATE_READY;
1341
1342 /* Return function status */
1343 return HAL_OK;
1344 }
1345
1346 /**
1347 * @brief Start the Timeout function.
1348 * @note The first trigger event will start the timer, any successive
1349 * trigger event will reset the counter and the timer restarts.
1350 * @param hlptim LPTIM handle
1351 * @param Period Specifies the Autoreload value.
1352 * This parameter must be a value between 0x0001 and 0xFFFF.
1353 * @param Timeout Specifies the TimeOut value to reset the counter.
1354 * This parameter must be a value between 0x0000 and 0xFFFF.
1355 * @retval HAL status
1356 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1357 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1358 {
1359 /* Check the parameters */
1360 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1361 assert_param(IS_LPTIM_PERIOD(Period));
1362 assert_param(IS_LPTIM_PULSE(Timeout));
1363
1364 /* Set the LPTIM state */
1365 hlptim->State = HAL_LPTIM_STATE_BUSY;
1366
1367 /* Set TIMOUT bit to enable the timeout function */
1368 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1369
1370 /* Enable the Peripheral */
1371 __HAL_LPTIM_ENABLE(hlptim);
1372
1373 /* Clear flag */
1374 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1375
1376 /* Load the period value in the autoreload register */
1377 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1378
1379 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1380 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1381 {
1382 return HAL_TIMEOUT;
1383 }
1384
1385 /* Clear flag */
1386 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1387
1388 /* Load the Timeout value in the compare register */
1389 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1390
1391 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1392 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1393 {
1394 return HAL_TIMEOUT;
1395 }
1396
1397 /* Start timer in continuous mode */
1398 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1399
1400 /* Change the LPTIM state */
1401 hlptim->State = HAL_LPTIM_STATE_READY;
1402
1403 /* Return function status */
1404 return HAL_OK;
1405 }
1406
1407 /**
1408 * @brief Stop the Timeout function.
1409 * @param hlptim LPTIM handle
1410 * @retval HAL status
1411 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1412 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1413 {
1414 /* Check the parameters */
1415 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1416
1417 /* Set the LPTIM state */
1418 hlptim->State = HAL_LPTIM_STATE_BUSY;
1419
1420 /* Disable the Peripheral */
1421 __HAL_LPTIM_DISABLE(hlptim);
1422
1423 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1424 {
1425 return HAL_TIMEOUT;
1426 }
1427
1428 /* Reset TIMOUT bit to enable the timeout function */
1429 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1430
1431 /* Change the LPTIM state */
1432 hlptim->State = HAL_LPTIM_STATE_READY;
1433
1434 /* Return function status */
1435 return HAL_OK;
1436 }
1437
1438 /**
1439 * @brief Start the Timeout function in interrupt mode.
1440 * @note The first trigger event will start the timer, any successive
1441 * trigger event will reset the counter and the timer restarts.
1442 * @param hlptim LPTIM handle
1443 * @param Period Specifies the Autoreload value.
1444 * This parameter must be a value between 0x0001 and 0xFFFF.
1445 * @param Timeout Specifies the TimeOut value to reset the counter.
1446 * This parameter must be a value between 0x0000 and 0xFFFF.
1447 * @retval HAL status
1448 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1449 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1450 {
1451 /* Check the parameters */
1452 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1453 assert_param(IS_LPTIM_PERIOD(Period));
1454 assert_param(IS_LPTIM_PULSE(Timeout));
1455
1456 /* Set the LPTIM state */
1457 hlptim->State = HAL_LPTIM_STATE_BUSY;
1458
1459 /* Set TIMOUT bit to enable the timeout function */
1460 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1461
1462 /* Enable the Peripheral */
1463 __HAL_LPTIM_ENABLE(hlptim);
1464
1465 /* Clear flag */
1466 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1467
1468 /* Load the period value in the autoreload register */
1469 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1470
1471 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1472 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1473 {
1474 return HAL_TIMEOUT;
1475 }
1476
1477 /* Clear flag */
1478 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1479
1480 /* Load the Timeout value in the compare register */
1481 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1482
1483 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1484 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1485 {
1486 return HAL_TIMEOUT;
1487 }
1488
1489 /* Disable the Peripheral */
1490 __HAL_LPTIM_DISABLE(hlptim);
1491
1492 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1493 {
1494 return HAL_TIMEOUT;
1495 }
1496
1497 /* Enable Compare match interrupt */
1498 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1499
1500 /* Enable the Peripheral */
1501 __HAL_LPTIM_ENABLE(hlptim);
1502
1503 /* Start timer in continuous mode */
1504 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1505
1506 /* Change the LPTIM state */
1507 hlptim->State = HAL_LPTIM_STATE_READY;
1508
1509 /* Return function status */
1510 return HAL_OK;
1511 }
1512
1513 /**
1514 * @brief Stop the Timeout function in interrupt mode.
1515 * @param hlptim LPTIM handle
1516 * @retval HAL status
1517 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1518 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1519 {
1520 /* Check the parameters */
1521 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1522
1523 /* Set the LPTIM state */
1524 hlptim->State = HAL_LPTIM_STATE_BUSY;
1525
1526 /* Disable the Peripheral */
1527 __HAL_LPTIM_DISABLE(hlptim);
1528
1529 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1530 {
1531 return HAL_TIMEOUT;
1532 }
1533
1534 /* Reset TIMOUT bit to enable the timeout function */
1535 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1536
1537 /* Disable Compare match interrupt */
1538 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1539
1540 /* Change the LPTIM state */
1541 hlptim->State = HAL_LPTIM_STATE_READY;
1542
1543 /* Return function status */
1544 return HAL_OK;
1545 }
1546
1547 /**
1548 * @brief Start the Counter mode.
1549 * @param hlptim LPTIM handle
1550 * @param Period Specifies the Autoreload value.
1551 * This parameter must be a value between 0x0001 and 0xFFFF.
1552 * @retval HAL status
1553 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1554 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1555 {
1556 /* Check the parameters */
1557 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1558 assert_param(IS_LPTIM_PERIOD(Period));
1559
1560 /* Set the LPTIM state */
1561 hlptim->State = HAL_LPTIM_STATE_BUSY;
1562
1563 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1564 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1565 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1566 {
1567 /* Check if clock is prescaled */
1568 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1569 /* Set clock prescaler to 0 */
1570 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1571 }
1572
1573 /* Enable the Peripheral */
1574 __HAL_LPTIM_ENABLE(hlptim);
1575
1576 /* Clear flag */
1577 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1578
1579 /* Load the period value in the autoreload register */
1580 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1581
1582 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1583 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1584 {
1585 return HAL_TIMEOUT;
1586 }
1587
1588 /* Start timer in continuous mode */
1589 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1590
1591 /* Change the LPTIM state */
1592 hlptim->State = HAL_LPTIM_STATE_READY;
1593
1594 /* Return function status */
1595 return HAL_OK;
1596 }
1597
1598 /**
1599 * @brief Stop the Counter mode.
1600 * @param hlptim LPTIM handle
1601 * @retval HAL status
1602 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1603 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1604 {
1605 /* Check the parameters */
1606 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1607
1608 /* Set the LPTIM state */
1609 hlptim->State = HAL_LPTIM_STATE_BUSY;
1610
1611 /* Disable the Peripheral */
1612 __HAL_LPTIM_DISABLE(hlptim);
1613
1614 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1615 {
1616 return HAL_TIMEOUT;
1617 }
1618
1619 /* Change the LPTIM state */
1620 hlptim->State = HAL_LPTIM_STATE_READY;
1621
1622 /* Return function status */
1623 return HAL_OK;
1624 }
1625
1626 /**
1627 * @brief Start the Counter mode in interrupt mode.
1628 * @param hlptim LPTIM handle
1629 * @param Period Specifies the Autoreload value.
1630 * This parameter must be a value between 0x0001 and 0xFFFF.
1631 * @retval HAL status
1632 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1633 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1634 {
1635 /* Check the parameters */
1636 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1637 assert_param(IS_LPTIM_PERIOD(Period));
1638
1639 /* Set the LPTIM state */
1640 hlptim->State = HAL_LPTIM_STATE_BUSY;
1641
1642 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1643 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1644 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1645 {
1646 /* Check if clock is prescaled */
1647 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1648 /* Set clock prescaler to 0 */
1649 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1650 }
1651
1652 /* Enable the Peripheral */
1653 __HAL_LPTIM_ENABLE(hlptim);
1654
1655 /* Clear flag */
1656 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1657
1658 /* Load the period value in the autoreload register */
1659 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1660
1661 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1662 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1663 {
1664 return HAL_TIMEOUT;
1665 }
1666
1667 /* Disable the Peripheral */
1668 __HAL_LPTIM_DISABLE(hlptim);
1669
1670 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1671 {
1672 return HAL_TIMEOUT;
1673 }
1674
1675 /* Enable Autoreload write complete interrupt */
1676 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1677
1678 /* Enable Autoreload match interrupt */
1679 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1680
1681 /* Enable the Peripheral */
1682 __HAL_LPTIM_ENABLE(hlptim);
1683
1684 /* Start timer in continuous mode */
1685 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1686
1687 /* Change the LPTIM state */
1688 hlptim->State = HAL_LPTIM_STATE_READY;
1689
1690 /* Return function status */
1691 return HAL_OK;
1692 }
1693
1694 /**
1695 * @brief Stop the Counter mode in interrupt mode.
1696 * @param hlptim LPTIM handle
1697 * @retval HAL status
1698 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1699 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1700 {
1701 /* Check the parameters */
1702 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1703
1704 /* Set the LPTIM state */
1705 hlptim->State = HAL_LPTIM_STATE_BUSY;
1706
1707 /* Disable the Peripheral */
1708 __HAL_LPTIM_DISABLE(hlptim);
1709
1710 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1711 {
1712 return HAL_TIMEOUT;
1713 }
1714
1715 /* Disable Autoreload write complete interrupt */
1716 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1717
1718 /* Disable Autoreload match interrupt */
1719 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1720 /* Change the LPTIM state */
1721 hlptim->State = HAL_LPTIM_STATE_READY;
1722
1723 /* Return function status */
1724 return HAL_OK;
1725 }
1726
1727 /**
1728 * @}
1729 */
1730
1731 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1732 * @brief Read operation functions.
1733 *
1734 @verbatim
1735 ==============================================================================
1736 ##### LPTIM Read operation functions #####
1737 ==============================================================================
1738 [..] This section provides LPTIM Reading functions.
1739 (+) Read the counter value.
1740 (+) Read the period (Auto-reload) value.
1741 (+) Read the pulse (Compare)value.
1742 @endverbatim
1743 * @{
1744 */
1745
1746 /**
1747 * @brief Return the current counter value.
1748 * @param hlptim LPTIM handle
1749 * @retval Counter value.
1750 */
HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef * hlptim)1751 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim)
1752 {
1753 /* Check the parameters */
1754 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1755
1756 return (hlptim->Instance->CNT);
1757 }
1758
1759 /**
1760 * @brief Return the current Autoreload (Period) value.
1761 * @param hlptim LPTIM handle
1762 * @retval Autoreload value.
1763 */
HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef * hlptim)1764 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim)
1765 {
1766 /* Check the parameters */
1767 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1768
1769 return (hlptim->Instance->ARR);
1770 }
1771
1772 /**
1773 * @brief Return the current Compare (Pulse) value.
1774 * @param hlptim LPTIM handle
1775 * @retval Compare value.
1776 */
HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef * hlptim)1777 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim)
1778 {
1779 /* Check the parameters */
1780 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1781
1782 return (hlptim->Instance->CMP);
1783 }
1784
1785 /**
1786 * @}
1787 */
1788
1789 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1790 * @brief LPTIM IRQ handler.
1791 *
1792 @verbatim
1793 ==============================================================================
1794 ##### LPTIM IRQ handler and callbacks #####
1795 ==============================================================================
1796 [..] This section provides LPTIM IRQ handler and callback functions called within
1797 the IRQ handler:
1798 (+) LPTIM interrupt request handler
1799 (+) Compare match Callback
1800 (+) Auto-reload match Callback
1801 (+) External trigger event detection Callback
1802 (+) Compare register write complete Callback
1803 (+) Auto-reload register write complete Callback
1804 (+) Up-counting direction change Callback
1805 (+) Down-counting direction change Callback
1806
1807 @endverbatim
1808 * @{
1809 */
1810
1811 /**
1812 * @brief Handle LPTIM interrupt request.
1813 * @param hlptim LPTIM handle
1814 * @retval None
1815 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1816 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1817 {
1818 /* Compare match interrupt */
1819 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1820 {
1821 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1822 {
1823 /* Clear Compare match flag */
1824 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1825
1826 /* Compare match Callback */
1827 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1828 hlptim->CompareMatchCallback(hlptim);
1829 #else
1830 HAL_LPTIM_CompareMatchCallback(hlptim);
1831 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1832 }
1833 }
1834
1835 /* Autoreload match interrupt */
1836 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1837 {
1838 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1839 {
1840 /* Clear Autoreload match flag */
1841 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1842
1843 /* Autoreload match Callback */
1844 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1845 hlptim->AutoReloadMatchCallback(hlptim);
1846 #else
1847 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1848 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1849 }
1850 }
1851
1852 /* Trigger detected interrupt */
1853 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1854 {
1855 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1856 {
1857 /* Clear Trigger detected flag */
1858 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1859
1860 /* Trigger detected callback */
1861 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1862 hlptim->TriggerCallback(hlptim);
1863 #else
1864 HAL_LPTIM_TriggerCallback(hlptim);
1865 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1866 }
1867 }
1868
1869 /* Compare write interrupt */
1870 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1871 {
1872 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1873 {
1874 /* Clear Compare write flag */
1875 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1876
1877 /* Compare write Callback */
1878 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1879 hlptim->CompareWriteCallback(hlptim);
1880 #else
1881 HAL_LPTIM_CompareWriteCallback(hlptim);
1882 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1883 }
1884 }
1885
1886 /* Autoreload write interrupt */
1887 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1888 {
1889 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1890 {
1891 /* Clear Autoreload write flag */
1892 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1893
1894 /* Autoreload write Callback */
1895 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1896 hlptim->AutoReloadWriteCallback(hlptim);
1897 #else
1898 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1899 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1900 }
1901 }
1902
1903 /* Direction counter changed from Down to Up interrupt */
1904 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1905 {
1906 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1907 {
1908 /* Clear Direction counter changed from Down to Up flag */
1909 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1910
1911 /* Direction counter changed from Down to Up Callback */
1912 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1913 hlptim->DirectionUpCallback(hlptim);
1914 #else
1915 HAL_LPTIM_DirectionUpCallback(hlptim);
1916 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1917 }
1918 }
1919
1920 /* Direction counter changed from Up to Down interrupt */
1921 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1922 {
1923 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1924 {
1925 /* Clear Direction counter changed from Up to Down flag */
1926 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1927
1928 /* Direction counter changed from Up to Down Callback */
1929 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1930 hlptim->DirectionDownCallback(hlptim);
1931 #else
1932 HAL_LPTIM_DirectionDownCallback(hlptim);
1933 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1934 }
1935 }
1936 }
1937
1938 /**
1939 * @brief Compare match callback in non-blocking mode.
1940 * @param hlptim LPTIM handle
1941 * @retval None
1942 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)1943 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1944 {
1945 /* Prevent unused argument(s) compilation warning */
1946 UNUSED(hlptim);
1947
1948 /* NOTE : This function should not be modified, when the callback is needed,
1949 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1950 */
1951 }
1952
1953 /**
1954 * @brief Autoreload match callback in non-blocking mode.
1955 * @param hlptim LPTIM handle
1956 * @retval None
1957 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)1958 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1959 {
1960 /* Prevent unused argument(s) compilation warning */
1961 UNUSED(hlptim);
1962
1963 /* NOTE : This function should not be modified, when the callback is needed,
1964 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1965 */
1966 }
1967
1968 /**
1969 * @brief Trigger detected callback in non-blocking mode.
1970 * @param hlptim LPTIM handle
1971 * @retval None
1972 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)1973 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1974 {
1975 /* Prevent unused argument(s) compilation warning */
1976 UNUSED(hlptim);
1977
1978 /* NOTE : This function should not be modified, when the callback is needed,
1979 the HAL_LPTIM_TriggerCallback could be implemented in the user file
1980 */
1981 }
1982
1983 /**
1984 * @brief Compare write callback in non-blocking mode.
1985 * @param hlptim LPTIM handle
1986 * @retval None
1987 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)1988 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1989 {
1990 /* Prevent unused argument(s) compilation warning */
1991 UNUSED(hlptim);
1992
1993 /* NOTE : This function should not be modified, when the callback is needed,
1994 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1995 */
1996 }
1997
1998 /**
1999 * @brief Autoreload write callback in non-blocking mode.
2000 * @param hlptim LPTIM handle
2001 * @retval None
2002 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2003 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2004 {
2005 /* Prevent unused argument(s) compilation warning */
2006 UNUSED(hlptim);
2007
2008 /* NOTE : This function should not be modified, when the callback is needed,
2009 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2010 */
2011 }
2012
2013 /**
2014 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2015 * @param hlptim LPTIM handle
2016 * @retval None
2017 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2018 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2019 {
2020 /* Prevent unused argument(s) compilation warning */
2021 UNUSED(hlptim);
2022
2023 /* NOTE : This function should not be modified, when the callback is needed,
2024 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2025 */
2026 }
2027
2028 /**
2029 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2030 * @param hlptim LPTIM handle
2031 * @retval None
2032 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2033 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2034 {
2035 /* Prevent unused argument(s) compilation warning */
2036 UNUSED(hlptim);
2037
2038 /* NOTE : This function should not be modified, when the callback is needed,
2039 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2040 */
2041 }
2042
2043 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2044 /**
2045 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2046 * @param hlptim LPTIM handle
2047 * @param CallbackID ID of the callback to be registered
2048 * This parameter can be one of the following values:
2049 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2050 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2051 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2052 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2053 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2054 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2055 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2056 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2057 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2058 * @param pCallback pointer to the callback function
2059 * @retval status
2060 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2061 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2062 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2063 pLPTIM_CallbackTypeDef pCallback)
2064 {
2065 HAL_StatusTypeDef status = HAL_OK;
2066
2067 if (pCallback == NULL)
2068 {
2069 return HAL_ERROR;
2070 }
2071
2072 if (hlptim->State == HAL_LPTIM_STATE_READY)
2073 {
2074 switch (CallbackID)
2075 {
2076 case HAL_LPTIM_MSPINIT_CB_ID :
2077 hlptim->MspInitCallback = pCallback;
2078 break;
2079
2080 case HAL_LPTIM_MSPDEINIT_CB_ID :
2081 hlptim->MspDeInitCallback = pCallback;
2082 break;
2083
2084 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2085 hlptim->CompareMatchCallback = pCallback;
2086 break;
2087
2088 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2089 hlptim->AutoReloadMatchCallback = pCallback;
2090 break;
2091
2092 case HAL_LPTIM_TRIGGER_CB_ID :
2093 hlptim->TriggerCallback = pCallback;
2094 break;
2095
2096 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2097 hlptim->CompareWriteCallback = pCallback;
2098 break;
2099
2100 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2101 hlptim->AutoReloadWriteCallback = pCallback;
2102 break;
2103
2104 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2105 hlptim->DirectionUpCallback = pCallback;
2106 break;
2107
2108 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2109 hlptim->DirectionDownCallback = pCallback;
2110 break;
2111
2112 default :
2113 /* Return error status */
2114 status = HAL_ERROR;
2115 break;
2116 }
2117 }
2118 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2119 {
2120 switch (CallbackID)
2121 {
2122 case HAL_LPTIM_MSPINIT_CB_ID :
2123 hlptim->MspInitCallback = pCallback;
2124 break;
2125
2126 case HAL_LPTIM_MSPDEINIT_CB_ID :
2127 hlptim->MspDeInitCallback = pCallback;
2128 break;
2129
2130 default :
2131 /* Return error status */
2132 status = HAL_ERROR;
2133 break;
2134 }
2135 }
2136 else
2137 {
2138 /* Return error status */
2139 status = HAL_ERROR;
2140 }
2141
2142 return status;
2143 }
2144
2145 /**
2146 * @brief Unregister a LPTIM callback
2147 * LLPTIM callback is redirected to the weak predefined callback
2148 * @param hlptim LPTIM handle
2149 * @param CallbackID ID of the callback to be unregistered
2150 * This parameter can be one of the following values:
2151 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2152 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2153 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2154 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2155 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2156 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2157 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2158 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2159 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2160 * @retval status
2161 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2162 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2163 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2164 {
2165 HAL_StatusTypeDef status = HAL_OK;
2166
2167 if (hlptim->State == HAL_LPTIM_STATE_READY)
2168 {
2169 switch (CallbackID)
2170 {
2171 case HAL_LPTIM_MSPINIT_CB_ID :
2172 /* Legacy weak MspInit Callback */
2173 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2174 break;
2175
2176 case HAL_LPTIM_MSPDEINIT_CB_ID :
2177 /* Legacy weak Msp DeInit Callback */
2178 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2179 break;
2180
2181 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2182 /* Legacy weak Compare match Callback */
2183 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2184 break;
2185
2186 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2187 /* Legacy weak Auto-reload match Callback */
2188 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2189 break;
2190
2191 case HAL_LPTIM_TRIGGER_CB_ID :
2192 /* Legacy weak External trigger event detection Callback */
2193 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2194 break;
2195
2196 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2197 /* Legacy weak Compare register write complete Callback */
2198 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2199 break;
2200
2201 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2202 /* Legacy weak Auto-reload register write complete Callback */
2203 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2204 break;
2205
2206 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2207 /* Legacy weak Up-counting direction change Callback */
2208 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2209 break;
2210
2211 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2212 /* Legacy weak Down-counting direction change Callback */
2213 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2214 break;
2215
2216 default :
2217 /* Return error status */
2218 status = HAL_ERROR;
2219 break;
2220 }
2221 }
2222 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2223 {
2224 switch (CallbackID)
2225 {
2226 case HAL_LPTIM_MSPINIT_CB_ID :
2227 /* Legacy weak MspInit Callback */
2228 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2229 break;
2230
2231 case HAL_LPTIM_MSPDEINIT_CB_ID :
2232 /* Legacy weak Msp DeInit Callback */
2233 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2234 break;
2235
2236 default :
2237 /* Return error status */
2238 status = HAL_ERROR;
2239 break;
2240 }
2241 }
2242 else
2243 {
2244 /* Return error status */
2245 status = HAL_ERROR;
2246 }
2247
2248 return status;
2249 }
2250 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2251
2252 /**
2253 * @}
2254 */
2255
2256 /** @defgroup LPTIM_Group5 Peripheral State functions
2257 * @brief Peripheral State functions.
2258 *
2259 @verbatim
2260 ==============================================================================
2261 ##### Peripheral State functions #####
2262 ==============================================================================
2263 [..]
2264 This subsection permits to get in run-time the status of the peripheral.
2265
2266 @endverbatim
2267 * @{
2268 */
2269
2270 /**
2271 * @brief Return the LPTIM handle state.
2272 * @param hlptim LPTIM handle
2273 * @retval HAL state
2274 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2275 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2276 {
2277 /* Return LPTIM handle state */
2278 return hlptim->State;
2279 }
2280
2281 /**
2282 * @}
2283 */
2284
2285
2286 /**
2287 * @}
2288 */
2289
2290 /* Private functions ---------------------------------------------------------*/
2291
2292 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2293 * @{
2294 */
2295 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2296 /**
2297 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2298 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2299 * the configuration information for LPTIM module.
2300 * @retval None
2301 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2302 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2303 {
2304 /* Reset the LPTIM callback to the legacy weak callbacks */
2305 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2306 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2307 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2308 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2309 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2310 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2311 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2312 }
2313 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2314
2315 /**
2316 * @brief LPTimer Wait for flag set
2317 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2318 * the configuration information for LPTIM module.
2319 * @param flag The lptim flag
2320 * @retval HAL status
2321 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2322 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2323 {
2324 HAL_StatusTypeDef result = HAL_OK;
2325 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2326 do
2327 {
2328 count--;
2329 if (count == 0UL)
2330 {
2331 result = HAL_TIMEOUT;
2332 }
2333 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2334
2335 return result;
2336 }
2337
2338 /**
2339 * @brief Disable LPTIM HW instance.
2340 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2341 * the configuration information for LPTIM module.
2342 * @note The following sequence is required to solve LPTIM disable HW limitation.
2343 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2344 * stuck in LPTIM interrupt when entering Stop mode" section.
2345 * @retval None
2346 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2347 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2348 {
2349 uint32_t tmpclksource = 0;
2350 uint32_t tmpIER;
2351 uint32_t tmpCFGR;
2352 uint32_t tmpCMP;
2353 uint32_t tmpARR;
2354 uint32_t primask_bit;
2355 uint32_t tmpCFGR2;
2356
2357 /* Enter critical section */
2358 primask_bit = __get_PRIMASK();
2359 __set_PRIMASK(1) ;
2360
2361 /*********** Save LPTIM Config ***********/
2362 /* Save LPTIM source clock */
2363 switch ((uint32_t)hlptim->Instance)
2364 {
2365 case LPTIM1_BASE:
2366 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2367 break;
2368 case LPTIM2_BASE:
2369 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2370 break;
2371 #if defined(LPTIM3)
2372 case LPTIM3_BASE:
2373 tmpclksource = __HAL_RCC_GET_LPTIM3_SOURCE();
2374 break;
2375 #endif /* LPTIM3 */
2376 #if defined(LPTIM4)
2377 case LPTIM4_BASE:
2378 tmpclksource = __HAL_RCC_GET_LPTIM4_SOURCE();
2379 break;
2380 #endif /* LPTIM4 */
2381 #if defined(LPTIM5)
2382 case LPTIM5_BASE:
2383 tmpclksource = __HAL_RCC_GET_LPTIM5_SOURCE();
2384 break;
2385 #endif /* LPTIM5 */
2386 default:
2387 break;
2388 }
2389
2390 /* Save LPTIM configuration registers */
2391 tmpIER = hlptim->Instance->IER;
2392 tmpCFGR = hlptim->Instance->CFGR;
2393 tmpCMP = hlptim->Instance->CMP;
2394 tmpARR = hlptim->Instance->ARR;
2395 tmpCFGR2 = hlptim->Instance->CFGR2;
2396
2397 /*********** Reset LPTIM ***********/
2398 switch ((uint32_t)hlptim->Instance)
2399 {
2400 case LPTIM1_BASE:
2401 __HAL_RCC_LPTIM1_FORCE_RESET();
2402 __HAL_RCC_LPTIM1_RELEASE_RESET();
2403 break;
2404 case LPTIM2_BASE:
2405 __HAL_RCC_LPTIM2_FORCE_RESET();
2406 __HAL_RCC_LPTIM2_RELEASE_RESET();
2407 break;
2408 #if defined(LPTIM3)
2409 case LPTIM3_BASE:
2410 __HAL_RCC_LPTIM3_FORCE_RESET();
2411 __HAL_RCC_LPTIM3_RELEASE_RESET();
2412 break;
2413 #endif /* LPTIM3 */
2414 #if defined(LPTIM4)
2415 case LPTIM4_BASE:
2416 __HAL_RCC_LPTIM4_FORCE_RESET();
2417 __HAL_RCC_LPTIM4_RELEASE_RESET();
2418 break;
2419 #endif /* LPTIM4 */
2420 #if defined(LPTIM5)
2421 case LPTIM5_BASE:
2422 __HAL_RCC_LPTIM5_FORCE_RESET();
2423 __HAL_RCC_LPTIM5_RELEASE_RESET();
2424 break;
2425 #endif /* LPTIM5 */
2426 default:
2427 break;
2428 }
2429
2430 /*********** Restore LPTIM Config ***********/
2431 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2432 {
2433 /* Force LPTIM source kernel clock from APB */
2434 switch ((uint32_t)hlptim->Instance)
2435 {
2436 case LPTIM1_BASE:
2437 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_D2PCLK1);
2438 break;
2439 case LPTIM2_BASE:
2440 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_D3PCLK1);
2441 break;
2442 #if defined(LPTIM3)
2443 case LPTIM3_BASE:
2444 __HAL_RCC_LPTIM3_CONFIG(RCC_LPTIM3CLKSOURCE_D3PCLK1);
2445 break;
2446 #endif /* LPTIM3 */
2447 #if defined(LPTIM4)
2448 case LPTIM4_BASE:
2449 __HAL_RCC_LPTIM4_CONFIG(RCC_LPTIM4CLKSOURCE_D3PCLK1);
2450 break;
2451 #endif /* LPTIM4 */
2452 #if defined(LPTIM5)
2453 case LPTIM5_BASE:
2454 __HAL_RCC_LPTIM5_CONFIG(RCC_LPTIM5CLKSOURCE_D3PCLK1);
2455 break;
2456 #endif /* LPTIM5 */
2457 default:
2458 break;
2459 }
2460
2461 if (tmpCMP != 0UL)
2462 {
2463 /* Restore CMP register (LPTIM should be enabled first) */
2464 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2465 hlptim->Instance->CMP = tmpCMP;
2466
2467 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2468 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2469 {
2470 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2471 }
2472 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2473 }
2474
2475 if (tmpARR != 0UL)
2476 {
2477 /* Restore ARR register (LPTIM should be enabled first) */
2478 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2479 hlptim->Instance->ARR = tmpARR;
2480
2481 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2482 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2483 {
2484 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2485 }
2486
2487 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2488 }
2489
2490 /* Restore LPTIM source kernel clock */
2491 switch ((uint32_t)hlptim->Instance)
2492 {
2493 case LPTIM1_BASE:
2494 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2495 break;
2496 case LPTIM2_BASE:
2497 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2498 break;
2499 #if defined(LPTIM3)
2500 case LPTIM3_BASE:
2501 __HAL_RCC_LPTIM3_CONFIG(tmpclksource);
2502 break;
2503 #endif /* LPTIM3 */
2504 #if defined(LPTIM4)
2505 case LPTIM4_BASE:
2506 __HAL_RCC_LPTIM4_CONFIG(tmpclksource);
2507 break;
2508 #endif /* LPTIM4 */
2509 #if defined(LPTIM5)
2510 case LPTIM5_BASE:
2511 __HAL_RCC_LPTIM5_CONFIG(tmpclksource);
2512 break;
2513 #endif /* LPTIM5 */
2514 default:
2515 break;
2516 }
2517 }
2518
2519 /* Restore configuration registers (LPTIM should be disabled first) */
2520 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2521 hlptim->Instance->IER = tmpIER;
2522 hlptim->Instance->CFGR = tmpCFGR;
2523 hlptim->Instance->CFGR2 = tmpCFGR2;
2524
2525 /* Exit critical section: restore previous priority mask */
2526 __set_PRIMASK(primask_bit);
2527 }
2528 /**
2529 * @}
2530 */
2531 #endif /* LPTIM1 || LPTIM2 || LPTIM3 || LPTIM4 || LPTIM5 */
2532
2533 #endif /* HAL_LPTIM_MODULE_ENABLED */
2534 /**
2535 * @}
2536 */
2537
2538 /**
2539 * @}
2540 */
2541
