1 /** 2 ****************************************************************************** 3 * @file stm32h7rsxx_hal_ramecc.h 4 * @author MCD Application Team 5 * @brief Header file of RAMECC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7RSxx_HAL_RAMECC_H 21 #define STM32H7RSxx_HAL_RAMECC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7rsxx_hal_def.h" 29 30 /** @addtogroup STM32H7RSxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup RAMECC 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup RAMECC_Exported_Types RAMECC Exported Types 41 * @brief RAMECC Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL RAMECC State structures definition 47 */ 48 typedef enum 49 { 50 HAL_RAMECC_STATE_RESET = 0x00U, /*!< RAMECC not yet initialized or disabled */ 51 HAL_RAMECC_STATE_READY = 0x01U, /*!< RAMECC initialized and ready for use */ 52 HAL_RAMECC_STATE_BUSY = 0x02U, /*!< RAMECC process is ongoing */ 53 HAL_RAMECC_STATE_ERROR = 0x03U, /*!< RAMECC error state */ 54 } HAL_RAMECC_StateTypeDef; 55 56 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 57 /** 58 * @brief HAL RAMECC Callbacks IDs Enumeration Definition 59 */ 60 typedef enum 61 { 62 HAL_RAMECC_MSPINIT_CB_ID = 0x00U, /*!< RAMECC MSP Init Callback ID */ 63 HAL_RAMECC_MSPDEINIT_CB_ID = 0x01U, /*!< RAMECC MSP DeInit Callback ID */ 64 HAL_RAMECC_SE_DETECT_CB_ID = 0x02U, /*!< RAMECC Single Error Detect Callback ID */ 65 HAL_RAMECC_DE_DETECT_CB_ID = 0x03U, /*!< RAMECC Double Error Detect Callback ID */ 66 HAL_RAMECC_ALL_CB_ID = 0x04U, /*!< RAMECC All callback ID */ 67 } HAL_RAMECC_CallbackIDTypeDef; 68 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */ 69 70 /** 71 * @brief RAMECC handle Structure definition 72 */ 73 74 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 75 typedef struct __RAMECC_HandleTypeDef 76 #else 77 typedef struct 78 #endif /* (USE_HAL_RAMECC_REGISTER_CALLBACKS) */ 79 { 80 RAMECC_MonitorTypeDef *Instance; /*!< Register base address */ 81 __IO HAL_RAMECC_StateTypeDef State; /*!< RAMECC state */ 82 __IO uint32_t ErrorCode; /*!< RAMECC Error Code */ 83 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 84 void (* MspInitCallback)(struct __RAMECC_HandleTypeDef *hramecc); /*!< RAMECC MSP Init Callback */ 85 void (* MspDeInitCallback)(struct __RAMECC_HandleTypeDef *hramecc); /*!< RAMECC MSP DeInit Callback */ 86 void (* DetectSingleErrorCallback)(struct __RAMECC_HandleTypeDef *hramecc); /*!< RAMECC Single Error Detect Callback */ 87 void (* DetectDoubleErrorCallback)(struct __RAMECC_HandleTypeDef *hramecc); /*!< RAMECC Double Error Detect Callback */ 88 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */ 89 } RAMECC_HandleTypeDef; 90 91 /** 92 * @} 93 */ 94 95 96 /* Exported constants --------------------------------------------------------*/ 97 98 /** @defgroup RAMECC_Error_Codes RAMECC Error Codes 99 * @{ 100 */ 101 #define HAL_RAMECC_ERROR_NONE 0x00000000U /*!< RAMECC No Error */ 102 #define HAL_RAMECC_ERROR_TIMEOUT 0x00000001U /*!< RAMECC Timeout Error */ 103 #define HAL_RAMECC_ERROR_BUSY 0x00000002U /*!< RAMECC Busy Error */ 104 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 105 #define HAL_RAMECC_ERROR_INVALID_CALLBACK 0x00000003U /*!< Invalid Callback error */ 106 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */ 107 108 /** 109 * @} 110 */ 111 112 /** @defgroup RAMECC_Interrupt RAMECC interrupts 113 * @{ 114 */ 115 #define RAMECC_IT_GLOBAL_ID 0x10000000UL 116 #define RAMECC_IT_MONITOR_ID 0x20000000UL 117 118 #define RAMECC_IT_GLOBAL_ALL_ENABLE (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE) 119 #define RAMECC_IT_GLOBAL_SINGLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCSEIE) 120 #define RAMECC_IT_GLOBAL_DOUBLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEIE) 121 #define RAMECC_IT_GLOBAL_DOUBLEERR_W (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEBWIE) 122 123 #define RAMECC_IT_MONITOR_SINGLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCSEIE) 124 #define RAMECC_IT_MONITOR_DOUBLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEIE) 125 #define RAMECC_IT_MONITOR_DOUBLEERR_W (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE) 126 #define RAMECC_IT_MONITOR_ALL (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE | RAMECC_CR_ECCDEIE | RAMECC_CR_ECCSEIE) 127 /** 128 * @} 129 */ 130 131 /** @defgroup RAMECC_FLAG RAMECC Monitor flags 132 * @{ 133 */ 134 #define RAMECC_FLAG_SINGLEERR_R RAMECC_SR_SEDCF 135 #define RAMECC_FLAG_DOUBLEERR_R RAMECC_SR_DEDF 136 #define RAMECC_FLAG_DOUBLEERR_W RAMECC_SR_DEBWDF 137 #define RAMECC_FLAGS_ALL (RAMECC_SR_SEDCF | RAMECC_SR_DEDF | RAMECC_SR_DEBWDF) 138 139 /** 140 * @} 141 */ 142 143 /* Exported macro ------------------------------------------------------------*/ 144 /** @defgroup RAMECC_Exported_Macros RAMECC Exported Macros 145 * @{ 146 */ 147 148 #define __HAL_RAMECC_ENABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) |= ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) 149 #define __HAL_RAMECC_ENABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= ((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID)) 150 151 /** 152 * @brief Enable the specified RAMECC interrupts. 153 * @param __HANDLE__ : RAMECC handle. 154 * @param __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled. 155 * This parameter can be one of the following values: 156 * @arg RAMECC_IT_GLOBAL_ALL_ENABLE : All Global ECC interrupts enable. 157 * @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt enable. 158 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt enable. 159 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt enable. 160 * @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt enable. 161 * @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt enable. 162 * @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt enable. 163 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable. 164 * @retval None 165 */ 166 #define __HAL_RAMECC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( \ 167 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_ENABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\ 168 (__HAL_RAMECC_ENABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__)))) 169 170 171 #define __HAL_RAMECC_DISABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) &= ~((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) 172 #define __HAL_RAMECC_DISABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID)) 173 174 /** 175 * @brief Disable the specified RAMECC interrupts. 176 * @param __HANDLE__ : RAMECC handle. 177 * @param __INTERRUPT__: specifies the RAMECC interrupt sources to be disabled. 178 * This parameter can be one of the following values: 179 * @arg RAMECC_IT_GLOBAL_ALL_ENABLE : All Global ECC interrupts disable. 180 * @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt disable. 181 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt disable. 182 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt disable. 183 * @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt disable. 184 * @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt disable. 185 * @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt disable. 186 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts disable. 187 * @retval None 188 */ 189 #define __HAL_RAMECC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ( \ 190 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_DISABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\ 191 (__HAL_RAMECC_DISABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__)))) 192 193 194 #define __HAL_RAMECC_GET_GLOBAL_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET) 195 #define __HAL_RAMECC_GET_MONITOR_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR) & ((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID)) ? SET : RESET) 196 197 /** 198 * @brief Check whether the specified RAMECC interrupt source is enabled or not. 199 * @param __HANDLE__ : Specifies the RAMECC Handle. 200 * @param __INTERRUPT__ : Specifies the RAMECC interrupt source to check. 201 * This parameter can be one of the following values: 202 * @arg RAMECC_IT_GLOBAL_ALL_ENABLE : All Global ECC interrupts enable. 203 * @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt enable. 204 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt enable. 205 * @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt enable. 206 * @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt enable. 207 * @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt enable. 208 * @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt enable. 209 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable. 210 * @retval The new state of __INTERRUPT__ (SET or RESET). 211 */ 212 #define __HAL_RAMECC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ( \ 213 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_GET_GLOBAL_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\ 214 (__HAL_RAMECC_GET_MONITOR_IT_SOURCE((__HANDLE__), (__INTERRUPT__)))) 215 216 217 /** 218 * @brief Get the RAMECC pending flags. 219 * @param __HANDLE__ : RAMECC handle. 220 * @param __FLAG__ : specifies the flag to get. 221 * This parameter can be any combination of the following values: 222 * @arg RAMECC_FLAG_SINGLEERR_R : RAMECC instance ECC single error detected and corrected flag. 223 * @arg RAMECC_FLAG_DOUBLEERR_R : RAMECC instance ECC double error detected flag. 224 * @arg RAMECC_FLAG_DOUBLEERR_W : RAMECC instance ECC double error on byte write (BW) detected flag. 225 * @arg RAMECC_FLAGS_ALL : RAMECC instance all flag. 226 * @retval The state of __FLAG__ (SET or RESET). 227 */ 228 #define __HAL_RAMECC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR & (__FLAG__)) != 0U) ? 1UL : 0UL) 229 230 /** 231 * @brief Clear the RAMECC pending flags. 232 * @param __HANDLE__ : RAMECC handle. 233 * @param __FLAG__ : specifies the flag to clear. 234 * This parameter can be any combination of the following values: 235 * @arg RAMECC_FLAG_SINGLEERR_R : RAMECC instance ECC single error detected and corrected flag. 236 * @arg RAMECC_FLAG_DOUBLEERR_R : RAMECC instance ECC double error detected flag. 237 * @arg RAMECC_FLAG_DOUBLEERR_W : RAMECC instance ECC double error on byte write (BW) detected flag. 238 * @arg RAMECC_FLAGS_ALL : RAMECC instance all flag. 239 * @retval None. 240 */ 241 #define __HAL_RAMECC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__)) 242 243 /** 244 * @brief Reset the RAMECC handle state. 245 * @param __HANDLE__ : Specifies the RAMECC Handle. 246 * @retval None. 247 */ 248 #define __HAL_RAMECC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RAMECC_STATE_RESET) 249 /** 250 * @} 251 */ 252 253 /* Exported functions --------------------------------------------------------*/ 254 255 /** @defgroup RAMECC_Exported_Functions RAMECC Exported Functions 256 * @brief RAMECC Exported functions 257 * @{ 258 */ 259 260 /** @defgroup RAMECC_Exported_Functions_Group1 Initialization and de-initialization functions 261 * @brief Initialization and de-initialization functions 262 * @{ 263 */ 264 HAL_StatusTypeDef HAL_RAMECC_Init(RAMECC_HandleTypeDef *hramecc); 265 HAL_StatusTypeDef HAL_RAMECC_DeInit(RAMECC_HandleTypeDef *hramecc); 266 void HAL_RAMECC_MspInit(RAMECC_HandleTypeDef *hramecc); 267 void HAL_RAMECC_MspDeInit(RAMECC_HandleTypeDef *hramecc); 268 /** 269 * @} 270 */ 271 272 /** @defgroup RAMECC_Exported_Functions_Group2 Monitoring operation functions 273 * @brief Monitoring operation functions 274 * @{ 275 */ 276 HAL_StatusTypeDef HAL_RAMECC_StartMonitor(RAMECC_HandleTypeDef *hramecc); 277 HAL_StatusTypeDef HAL_RAMECC_StopMonitor(RAMECC_HandleTypeDef *hramecc); 278 HAL_StatusTypeDef HAL_RAMECC_EnableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications); 279 HAL_StatusTypeDef HAL_RAMECC_DisableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications); 280 /** 281 * @} 282 */ 283 284 /** @defgroup RAMCECC_Exported_Functions_Group3 Handle Interrupt and Callbacks functions 285 * @brief Handle Interrupt and Callbacks functions 286 * @{ 287 */ 288 void HAL_RAMECC_IRQHandler(RAMECC_HandleTypeDef *hramecc); 289 void HAL_RAMECC_DetectSingleErrorCallback(RAMECC_HandleTypeDef *hramecc); 290 void HAL_RAMECC_DetectDoubleErrorCallback(RAMECC_HandleTypeDef *hramecc); 291 #if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1) 292 HAL_StatusTypeDef HAL_RAMECC_RegisterCallback(RAMECC_HandleTypeDef *hramecc, 293 HAL_RAMECC_CallbackIDTypeDef CallbackID, 294 void (* pCallback)(RAMECC_HandleTypeDef *_hramecc)); 295 296 HAL_StatusTypeDef HAL_RAMECC_UnRegisterCallback(RAMECC_HandleTypeDef *hramecc, 297 HAL_RAMECC_CallbackIDTypeDef CallbackID); 298 #endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */ 299 300 301 /** 302 * @} 303 */ 304 305 /** @defgroup RAMECC_Exported_Functions_Group4 Error information functions 306 * @brief Error information functions 307 * @{ 308 */ 309 uint32_t HAL_RAMECC_GetFailingAddress(const RAMECC_HandleTypeDef *hramecc); 310 uint32_t HAL_RAMECC_GetFailingDataLow(const RAMECC_HandleTypeDef *hramecc); 311 uint32_t HAL_RAMECC_GetFailingDataHigh(const RAMECC_HandleTypeDef *hramecc); 312 uint32_t HAL_RAMECC_GetHammingErrorCode(const RAMECC_HandleTypeDef *hramecc); 313 uint32_t HAL_RAMECC_IsECCSingleErrorDetected(const RAMECC_HandleTypeDef *hramecc); 314 uint32_t HAL_RAMECC_IsECCDoubleErrorDetected(const RAMECC_HandleTypeDef *hramecc); 315 /** 316 * @} 317 */ 318 319 /** @defgroup RAMECC_Exported_Functions_Group5 State and Error functions 320 * @brief State and Error functions 321 * @{ 322 */ 323 HAL_RAMECC_StateTypeDef HAL_RAMECC_GetState(const RAMECC_HandleTypeDef *hramecc); 324 uint32_t HAL_RAMECC_GetError(const RAMECC_HandleTypeDef *hramecc); 325 /** 326 * @} 327 */ 328 329 /** 330 * @} 331 */ 332 /* Private Constants -------------------------------------------------------------*/ 333 /** @defgroup RAMECC_Private_Constants RAMECC Private Constants 334 * @brief RAMECC private defines and constants 335 * @{ 336 */ 337 /** 338 * @} 339 */ 340 341 /* Private macros ------------------------------------------------------------*/ 342 /** @defgroup RAMECC_Private_Macros RAMECC Private Macros 343 * @brief RAMECC private macros 344 * @{ 345 */ 346 347 #define IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_GLOBAL_ALL_ENABLE) || \ 348 ((INTERRUPT) == RAMECC_IT_GLOBAL_SINGLEERR_R) || \ 349 ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_R) || \ 350 ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_W)) 351 352 353 #define IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_MONITOR_SINGLEERR_R) || \ 354 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_R) || \ 355 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_W) || \ 356 ((INTERRUPT) == RAMECC_IT_MONITOR_ALL)) 357 358 #define IS_RAMECC_INTERRUPT(INTERRUPT) ((IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT)) || \ 359 (IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT))) 360 361 /** 362 * @} 363 */ 364 365 /** @defgroup RAMECC_FLAG RAMECC Monitor flags 366 * @{ 367 */ 368 369 /* Private functions ---------------------------------------------------------*/ 370 /** @defgroup RAMECC_Private_Functions RAMECC Private Functions 371 * @brief RAMECC private functions 372 * @{ 373 */ 374 /** 375 * @} 376 */ 377 378 /** 379 * @} 380 */ 381 382 /** 383 * @} 384 */ 385 386 /** 387 * @} 388 */ 389 #ifdef __cplusplus 390 } 391 #endif 392 393 #endif /* STM32H7RSxx_HAL_RAMECC_H */ 394
