1 /** 2 ****************************************************************************** 3 * @file stm32h7rsxx_hal_pssi.h 4 * @author MCD Application Team 5 * @brief Header file of PSSI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7RSxx_HAL_PSSI_H 21 #define STM32H7RSxx_HAL_PSSI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7rsxx_hal_def.h" 29 30 /** @addtogroup STM32H7RSxx_HAL_Driver 31 * @{ 32 */ 33 #if defined(PSSI) 34 35 #ifndef USE_HAL_PSSI_REGISTER_CALLBACKS 36 /* For backward compatibility, if USE_HAL_PSSI_REGISTER_CALLBACKS not defined, define it to 1*/ 37 #define USE_HAL_PSSI_REGISTER_CALLBACKS 0U 38 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 39 40 /** @addtogroup PSSI PSSI 41 * @brief PSSI HAL module driver 42 * @{ 43 */ 44 45 /* Exported types ------------------------------------------------------------*/ 46 /** @defgroup PSSI_Exported_Types PSSI Exported Types 47 * @{ 48 */ 49 50 51 /** 52 * @brief PSSI Init structure definition 53 */ 54 typedef struct 55 { 56 uint32_t DataWidth; /* !< Configures the data width. 57 This parameter can be a value of @ref PSSI_DATA_WIDTH. */ 58 uint32_t BusWidth; /* !< Configures the parallel bus width. 59 This parameter can be a value of @ref PSSI_BUS_WIDTH. */ 60 uint32_t ControlSignal; /* !< Configures Data enable and Data ready. 61 This parameter can be a value of @ref ControlSignal_Configuration. */ 62 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity. 63 This parameter can be a value of @ref Clock_Polarity. */ 64 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity. 65 This parameter can be a value of @ref Data_Enable_Polarity. */ 66 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity. 67 This parameter can be a value of @ref Ready_Polarity. */ 68 69 } PSSI_InitTypeDef; 70 71 72 /** 73 * @brief HAL PSSI State structures definition 74 */ 75 typedef enum 76 { 77 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */ 78 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */ 79 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */ 80 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */ 81 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */ 82 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */ 83 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */ 84 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */ 85 86 } HAL_PSSI_StateTypeDef; 87 88 /** 89 * @brief PSSI handle Structure definition 90 */ 91 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 92 typedef struct __PSSI_HandleTypeDef 93 #else 94 typedef struct 95 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 96 { 97 PSSI_TypeDef *Instance; /*!< PSSI register base address. */ 98 PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure. */ 99 uint32_t *pBuffPtr; /*!< PSSI Data buffer. */ 100 uint32_t XferCount; /*!< PSSI transfer count */ 101 uint32_t XferSize; /*!< PSSI transfer size */ 102 #if defined(HAL_DMA_MODULE_ENABLED) 103 DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */ 104 DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */ 105 #endif /*HAL_DMA_MODULE_ENABLED*/ 106 107 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 108 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 109 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 110 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 111 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback. */ 112 113 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback. */ 114 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback. */ 115 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 116 117 HAL_LockTypeDef Lock; /*!< PSSI lock. */ 118 __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state. */ 119 __IO uint32_t ErrorCode; /*!< PSSI error code. */ 120 121 } PSSI_HandleTypeDef; 122 123 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 124 /** 125 * @brief HAL PSSI Callback pointer definition 126 */ 127 typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */ 128 129 /** 130 * @brief HAL PSSI Callback ID enumeration definition 131 */ 132 typedef enum 133 { 134 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */ 135 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */ 136 HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */ 137 HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */ 138 139 HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */ 140 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */ 141 142 } HAL_PSSI_CallbackIDTypeDef; 143 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 144 145 /** 146 * @} 147 */ 148 149 /* Exported constants --------------------------------------------------------*/ 150 /** @defgroup PSSI_Exported_Constants PSSI Exported Constants 151 * @{ 152 */ 153 154 /** @defgroup PSSI_Error_Code PSSI Error Code 155 * @{ 156 */ 157 #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */ 158 #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */ 159 #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */ 160 #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */ 161 #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */ 162 #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */ 163 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 164 #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */ 165 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 166 167 /** 168 * @} 169 */ 170 171 /** @defgroup PSSI_DATA_WIDTH PSSI Data Width 172 * @{ 173 */ 174 175 #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */ 176 #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */ 177 #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */ 178 /** 179 * @} 180 */ 181 182 /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width 183 * @{ 184 */ 185 186 #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */ 187 #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */ 188 /** 189 * @} 190 */ 191 /** @defgroup PSSI_MODE PSSI mode 192 * @{ 193 */ 194 #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */ 195 #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */ 196 /** 197 * @} 198 */ 199 200 /** @defgroup ControlSignal_Configuration ControlSignal Configuration 201 * @{ 202 */ 203 #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */ 204 #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */ 205 #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */ 206 #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */ 207 #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */ 208 #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */ 209 #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */ 210 #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */ 211 212 /** 213 * @} 214 */ 215 216 217 /** @defgroup Data_Enable_Polarity Data Enable Polarity 218 * @{ 219 */ 220 #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 221 #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */ 222 /** 223 * @} 224 */ 225 /** @defgroup Ready_Polarity Ready Polarity 226 * @{ 227 */ 228 #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 229 #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */ 230 /** 231 * @} 232 */ 233 234 /** @defgroup Clock_Polarity Clock Polarity 235 * @{ 236 */ 237 #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Fallling Edge */ 238 #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */ 239 /** 240 * @} 241 */ 242 243 /** @defgroup Clock_Source Clock Source 244 * @{ 245 */ 246 #define HAL_PSSI_CLOCK_EXT 0x0U /*!< External Clock */ 247 #define HAL_PSSI_CLOCK_INT PSSI_CR_CKSRC /*!< Internal Clock */ 248 /** 249 * @} 250 */ 251 252 253 /** @defgroup PSSI_DEFINITION PSSI definitions 254 * @{ 255 */ 256 257 #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */ 258 #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */ 259 260 #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */ 261 #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */ 262 263 #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */ 264 #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disable*/ 265 266 #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */ 267 #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */ 268 269 #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag */ 270 #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/ 271 272 273 274 /** 275 * @} 276 */ 277 278 /** @defgroup PSSI_Interrupts PSSI Interrupts 279 * @{ 280 */ 281 282 #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */ 283 #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */ 284 #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */ 285 /** 286 * @} 287 */ 288 289 290 291 /** 292 * @} 293 */ 294 /* Exported macros ------------------------------------------------------------*/ 295 /** @defgroup PSSI_Exported_Macros PSSI Exported Macros 296 * @{ 297 */ 298 299 /** @brief Reset PSSI handle state 300 * @param __HANDLE__ specifies the PSSI handle. 301 * @retval None 302 */ 303 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 304 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 305 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\ 306 (__HANDLE__)->MspInitCallback = NULL; \ 307 (__HANDLE__)->MspDeInitCallback = NULL; \ 308 }while(0) 309 #else 310 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_PSSI_STATE_RESET) 311 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 312 313 314 /** 315 * @brief Enable the PSSI. 316 * @param __HANDLE__ PSSI handle 317 * @retval None. 318 */ 319 #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE) 320 /** 321 * @brief Disable the PSSI. 322 * @param __HANDLE__ PSSI handle 323 * @retval None. 324 */ 325 #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE)) 326 327 /* PSSI pripheral STATUS */ 328 /** 329 * @brief Get the PSSI pending flags. 330 * @param __HANDLE__ PSSI handle 331 * @param __FLAG__ flag to check. 332 * This parameter can be any combination of the following values: 333 * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte 334 * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes 335 * @retval The state of FLAG. 336 */ 337 338 #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__)) 339 340 341 342 /* Interrupt & Flag management */ 343 /** 344 * @brief Get the PSSI pending flags. 345 * @param __HANDLE__ PSSI handle 346 * @param __FLAG__ flag to check. 347 * This parameter can be any combination of the following values: 348 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 349 * @retval The state of FLAG. 350 */ 351 #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__)) 352 353 /** 354 * @brief Clear the PSSI pending flags. 355 * @param __HANDLE__ PSSI handle 356 * @param __FLAG__ specifies the flag to clear. 357 * This parameter can be any combination of the following values: 358 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 359 * @retval None 360 */ 361 #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 362 363 /** 364 * @brief Enable the specified PSSI interrupts. 365 * @param __HANDLE__ PSSI handle 366 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled. 367 * This parameter can be any combination of the following values: 368 * @arg PSSI_FLAG_OVR_RIS: Configuration error mask 369 * @retval None 370 */ 371 #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 372 373 /** 374 * @brief Disable the specified PSSI interrupts. 375 * @param __HANDLE__ PSSI handle 376 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled. 377 * This parameter can be any combination of the following values: 378 * @arg PSSI_IT_OVR_IE: Configuration error mask 379 * @retval None 380 */ 381 #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__)) 382 383 /** 384 * @brief Check whether the specified PSSI interrupt source is enabled or not. 385 * @param __HANDLE__ PSSI handle 386 * @param __INTERRUPT__ specifies the PSSI interrupt source to check. 387 * This parameter can be one of the following values: 388 * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask 389 * @retval The state of INTERRUPT source. 390 */ 391 #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) 392 393 394 /** 395 * @brief Check whether the PSSI Control signal is valid. 396 * @param __CONTROL__ Control signals configuration 397 * @retval Valid or not. 398 */ 399 400 #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \ 401 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \ 402 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \ 403 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \ 404 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \ 405 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \ 406 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \ 407 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE )) 408 409 410 411 /** 412 * @brief Check whether the PSSI Bus Width is valid. 413 * @param __BUSWIDTH__ PSSI Bush width 414 * @retval Valid or not. 415 */ 416 417 #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \ 418 ((__BUSWIDTH__) == HAL_PSSI_16LINES )) 419 420 /** 421 422 * @brief Check whether the PSSI Clock Polarity is valid. 423 * @param __CLOCKPOL__ PSSI Clock Polarity 424 * @retval Valid or not. 425 */ 426 427 #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \ 428 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE )) 429 430 431 /** 432 * @brief Check whether the PSSI Data Enable Polarity is valid. 433 * @param __DEPOL__ PSSI DE Polarity 434 * @retval Valid or not. 435 */ 436 437 #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \ 438 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH )) 439 440 /** 441 * @brief Check whether the PSSI Ready Polarity is valid. 442 * @param __RDYPOL__ PSSI RDY Polarity 443 * @retval Valid or not. 444 */ 445 446 #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \ 447 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH )) 448 449 /** 450 * @brief Check whether the PSSI Clock source is valid. 451 * @param __CLOCKSRC__ PSSI Clock Source 452 * @retval Valid or not. 453 */ 454 455 #define IS_PSSI_CLOCK_SOURCE(__CLOCKSRC__) (((__CLOCKSRC__) == HAL_PSSI_CLOCK_EXT ) || \ 456 ((__CLOCKSRC__) == HAL_PSSI_CLOCK_INT )) 457 /** 458 * @} 459 */ 460 461 462 /* Exported functions --------------------------------------------------------*/ 463 /** @addtogroup PSSI_Exported_Functions PSSI Exported Functions 464 * @{ 465 */ 466 467 /** @addtogroup PSSI_Exported_Functions_Group1 Initialization and de-initialization functions 468 * @{ 469 */ 470 471 /* Initialization and de-initialization functions *******************************/ 472 HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi); 473 HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi); 474 void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi); 475 void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi); 476 /* Callbacks Register/UnRegister functions ***********************************/ 477 #if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1) 478 HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, 479 pPSSI_CallbackTypeDef pCallback); 480 HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID); 481 #endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */ 482 483 /** 484 * @} 485 */ 486 487 488 /** @addtogroup PSSI_Exported_Functions_Group2 Input and Output operation functions 489 * @{ 490 */ 491 492 /* IO operation functions *******************************************************/ 493 HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 494 HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 495 #if defined(HAL_DMA_MODULE_ENABLED) 496 HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 497 HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 498 HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi); 499 #endif /*HAL_DMA_MODULE_ENABLED*/ 500 501 /** 502 * @} 503 */ 504 505 /** @addtogroup PSSI_Exported_Functions_Group3 Peripheral State and Error functions 506 * @{ 507 */ 508 509 /* Peripheral State functions ***************************************************/ 510 HAL_PSSI_StateTypeDef HAL_PSSI_GetState(const PSSI_HandleTypeDef *hpssi); 511 uint32_t HAL_PSSI_GetError(const PSSI_HandleTypeDef *hpssi); 512 513 /** 514 * @} 515 */ 516 517 /** @addtogroup PSSI_Exported_Functions_Group4 Clock Source Selection function 518 * @{ 519 */ 520 /* Clock source selection function *******************************************/ 521 HAL_StatusTypeDef HAL_PSSI_ClockConfig(PSSI_HandleTypeDef *hpssi, uint32_t ClockSource); 522 523 /** 524 * @} 525 */ 526 527 /** @addtogroup PSSI_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 528 * @{ 529 */ 530 531 void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi); 532 void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi); 533 void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi); 534 void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi); 535 void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi); 536 537 /** 538 * @} 539 */ 540 541 542 543 /** 544 * @} 545 */ 546 547 /* Private constants ---------------------------------------------------------*/ 548 549 550 /* Private macros ------------------------------------------------------------*/ 551 552 553 /** 554 * @} 555 */ 556 #endif /* PSSI */ 557 558 /** 559 * @} 560 */ 561 562 563 #ifdef __cplusplus 564 } 565 #endif 566 567 #endif /* STM32H7RSxx_HAL_PSSI_H */ 568
