1 /**
2   ******************************************************************************
3   * @file    stm32h5xx_ll_icache.h
4   * @author  MCD Application Team
5   * @brief   Header file of ICACHE LL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2023 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion ------------------------------------*/
20 #ifndef STM32H5xx_LL_ICACHE_H
21 #define STM32H5xx_LL_ICACHE_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes -----------------------------------------------------------------*/
28 #include "stm32h5xx.h"
29 
30 /** @addtogroup STM32H5xx_LL_Driver
31   * @{
32   */
33 
34 #if defined(ICACHE)
35 
36 /** @defgroup ICACHE_LL ICACHE
37   * @{
38   */
39 
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44 /* Exported types ------------------------------------------------------------*/
45 #if defined(ICACHE_CRRx_REN)
46 /** @defgroup ICACHE_LL_REGION_CONFIG ICACHE Exported Configuration structure
47   * @{
48   */
49 
50 /**
51   * @brief  LL ICACHE region configuration structure definition
52   */
53 typedef struct
54 {
55   uint32_t BaseAddress;              /*!< Configures the C-AHB base address to be remapped */
56 
57   uint32_t RemapAddress;             /*!< Configures the remap address to be remapped */
58 
59   uint32_t Size;                     /*!< Configures the region size.
60                                           This parameter can be a value of @ref ICACHE_LL_EC_Region_Size */
61 
62   uint32_t TrafficRoute;             /*!< Selects the traffic route.
63                                           This parameter can be a value of @ref ICACHE_LL_EC_Traffic_Route */
64 
65   uint32_t OutputBurstType;          /*!< Selects the output burst type.
66                                           This parameter can be a value of @ref ICACHE_LL_EC_Output_Burst_Type */
67 } LL_ICACHE_RegionTypeDef;
68 
69 /**
70   * @}
71   */
72 #endif /*  ICACHE_CRRx_REN */
73 
74 /* Exported constants -------------------------------------------------------*/
75 /** @defgroup ICACHE_LL_Exported_Constants ICACHE Exported Constants
76   * @{
77   */
78 
79 /** @defgroup ICACHE_LL_EC_WaysSelection Ways selection
80   * @{
81   */
82 #define LL_ICACHE_1WAY                 0U                /*!< 1-way cache (direct mapped cache) */
83 #define LL_ICACHE_2WAYS                ICACHE_CR_WAYSEL  /*!< 2-ways set associative cache (default) */
84 /**
85   * @}
86   */
87 
88 /** @defgroup ICACHE_LL_EC_Monitor_Type Monitor type
89   * @{
90   */
91 #define LL_ICACHE_MONITOR_HIT          ICACHE_CR_HITMEN                       /*!< Hit monitor counter */
92 #define LL_ICACHE_MONITOR_MISS         ICACHE_CR_MISSMEN                      /*!< Miss monitor counter */
93 #define LL_ICACHE_MONITOR_ALL          (ICACHE_CR_HITMEN | ICACHE_CR_MISSMEN) /*!< All monitors counters */
94 /**
95   * @}
96   */
97 
98 /** @defgroup ICACHE_LL_EC_GET_FLAG Get Flags Defines
99   * @brief    Flags defines which can be used with LL_ICACHE_ReadReg function
100   * @{
101   */
102 #define LL_ICACHE_SR_BUSYF             ICACHE_SR_BUSYF     /*!< Busy flag */
103 #define LL_ICACHE_SR_BSYENDF           ICACHE_SR_BSYENDF   /*!< Busy end flag */
104 #define LL_ICACHE_SR_ERRF              ICACHE_SR_ERRF      /*!< Cache error flag */
105 /**
106   * @}
107   */
108 
109 /** @defgroup ICACHE_LL_EC_CLEAR_FLAG Clear Flags Defines
110   * @brief    Flags defines which can be used with LL_ICACHE_WriteReg function
111   * @{
112   */
113 #define LL_ICACHE_FCR_CBSYENDF         ICACHE_FCR_CBSYENDF /*!< Busy end flag */
114 #define LL_ICACHE_FCR_CERRF            ICACHE_FCR_CERRF    /*!< Cache error flag */
115 /**
116   * @}
117   */
118 
119 /** @defgroup ICACHE_LL_EC_IT IT Defines
120   * @brief    IT defines which can be used with LL_ICACHE_ReadReg and  LL_ICACHE_WriteReg functions
121   * @{
122   */
123 #define LL_ICACHE_IER_BSYENDIE         ICACHE_IER_BSYENDIE /*!< Busy end interrupt */
124 #define LL_ICACHE_IER_ERRIE            ICACHE_IER_ERRIE    /*!< Cache error interrupt */
125 /**
126   * @}
127   */
128 
129 #if defined(ICACHE_CRRx_REN)
130 /** @defgroup ICACHE_LL_EC_Region Remapped Region number
131   * @{
132   */
133 #define LL_ICACHE_REGION_0             0U  /*!< Region 0 */
134 #define LL_ICACHE_REGION_1             1U  /*!< Region 1 */
135 #define LL_ICACHE_REGION_2             2U  /*!< Region 2 */
136 #define LL_ICACHE_REGION_3             3U  /*!< Region 3 */
137 /**
138   * @}
139   */
140 
141 /** @defgroup ICACHE_LL_EC_Region_Size Remapped Region size
142   * @{
143   */
144 #define LL_ICACHE_REGIONSIZE_2MB       1U  /*!< Region size 2MB */
145 #define LL_ICACHE_REGIONSIZE_4MB       2U  /*!< Region size 4MB */
146 #define LL_ICACHE_REGIONSIZE_8MB       3U  /*!< Region size 8MB */
147 #define LL_ICACHE_REGIONSIZE_16MB      4U  /*!< Region size 16MB */
148 #define LL_ICACHE_REGIONSIZE_32MB      5U  /*!< Region size 32MB */
149 #define LL_ICACHE_REGIONSIZE_64MB      6U  /*!< Region size 64MB */
150 #define LL_ICACHE_REGIONSIZE_128MB     7U  /*!< Region size 128MB */
151 /**
152   * @}
153   */
154 
155 /** @defgroup ICACHE_LL_EC_Traffic_Route Remapped Traffic route
156   * @{
157   */
158 #define LL_ICACHE_MASTER1_PORT         0U                  /*!< Master1 port */
159 #define LL_ICACHE_MASTER2_PORT         ICACHE_CRRx_MSTSEL  /*!< Master2 port */
160 /**
161   * @}
162   */
163 
164 /** @defgroup ICACHE_LL_EC_Output_Burst_Type Remapped Output burst type
165   * @{
166   */
167 #define LL_ICACHE_OUTPUT_BURST_WRAP    0U                  /*!< WRAP */
168 #define LL_ICACHE_OUTPUT_BURST_INCR    ICACHE_CRRx_HBURST  /*!< INCR */
169 /**
170   * @}
171   */
172 #endif /*  ICACHE_CRRx_REN */
173 
174 /**
175   * @}
176   */
177 
178 /* Exported macros ----------------------------------------------------------*/
179 /** @defgroup ICACHE_LL_Exported_Macros ICACHE Exported Macros
180   * @{
181   */
182 
183 /** @defgroup ICACHE_LL_EM_WRITE_READ Common write and read registers Macros
184   * @{
185   */
186 
187 /**
188   * @brief  Write a value in ICACHE register
189   * @param  __REG__ Register to be written
190   * @param  __VALUE__ Value to be written in the register
191   * @retval None
192   */
193 #define LL_ICACHE_WriteReg(__REG__, __VALUE__) WRITE_REG(ICACHE->__REG__, (__VALUE__))
194 
195 /**
196   * @brief  Read a value in ICACHE register
197   * @param  __REG__ Register to be read
198   * @retval Register value
199   */
200 #define LL_ICACHE_ReadReg(__REG__) READ_REG(ICACHE->__REG__)
201 /**
202   * @}
203   */
204 
205 /**
206   * @}
207   */
208 
209 /* Exported functions --------------------------------------------------------*/
210 /** @defgroup ICACHE_LL_Exported_Functions ICACHE Exported Functions
211   * @{
212   */
213 
214 /** @defgroup ICACHE_LL_EF_Configuration Configuration
215   * @{
216   */
217 
218 /**
219   * @brief  Enable the ICACHE.
220   * @rmtoll CR           EN            LL_ICACHE_Enable
221   * @retval None
222   */
LL_ICACHE_Enable(void)223 __STATIC_INLINE void LL_ICACHE_Enable(void)
224 {
225   SET_BIT(ICACHE->CR, ICACHE_CR_EN);
226 }
227 
228 /**
229   * @brief  Disable the ICACHE.
230   * @rmtoll CR           EN            LL_ICACHE_Disable
231   * @retval None
232   */
LL_ICACHE_Disable(void)233 __STATIC_INLINE void LL_ICACHE_Disable(void)
234 {
235   CLEAR_BIT(ICACHE->CR, ICACHE_CR_EN);
236 }
237 
238 /**
239   * @brief  Return if ICACHE is enabled or not.
240   * @rmtoll CR           EN            LL_ICACHE_IsEnabled
241   * @retval State of bit (1 or 0).
242   */
LL_ICACHE_IsEnabled(void)243 __STATIC_INLINE uint32_t LL_ICACHE_IsEnabled(void)
244 {
245   return ((READ_BIT(ICACHE->CR, ICACHE_CR_EN) == (ICACHE_CR_EN)) ? 1UL : 0UL);
246 }
247 
248 /**
249   * @brief  Select the ICACHE operating mode.
250   * @rmtoll CR           WAYSEL        LL_ICACHE_SetMode
251   * @param  Mode This parameter can be one of the following values:
252   *         @arg @ref LL_ICACHE_1WAY
253   *         @arg @ref LL_ICACHE_2WAYS
254   * @retval None
255   */
LL_ICACHE_SetMode(uint32_t Mode)256 __STATIC_INLINE void LL_ICACHE_SetMode(uint32_t Mode)
257 {
258   MODIFY_REG(ICACHE->CR, ICACHE_CR_WAYSEL, Mode);
259 }
260 
261 /**
262   * @brief  Get the selected ICACHE operating mode.
263   * @rmtoll CR           WAYSEL        LL_ICACHE_GetMode
264   * @retval Returned value can be one of the following values:
265   *         @arg @ref LL_ICACHE_1WAY
266   *         @arg @ref LL_ICACHE_2WAYS
267   */
LL_ICACHE_GetMode(void)268 __STATIC_INLINE uint32_t LL_ICACHE_GetMode(void)
269 {
270   return (READ_BIT(ICACHE->CR, ICACHE_CR_WAYSEL));
271 }
272 
273 /**
274   * @brief  Invalidate the ICACHE.
275   * @note   Until the BSYEND flag is set, the cache is bypassed.
276   * @rmtoll CR           CACHEINV      LL_ICACHE_Invalidate
277   * @retval None
278   */
LL_ICACHE_Invalidate(void)279 __STATIC_INLINE void LL_ICACHE_Invalidate(void)
280 {
281   SET_BIT(ICACHE->CR, ICACHE_CR_CACHEINV);
282 }
283 
284 /**
285   * @}
286   */
287 
288 /** @defgroup ICACHE_LL_EF_Monitors Monitors
289   * @{
290   */
291 
292 /**
293   * @brief  Enable the hit/miss monitor(s).
294   * @rmtoll CR           HITMEN        LL_ICACHE_EnableMonitors
295   * @rmtoll CR           MISSMEN       LL_ICACHE_EnableMonitors
296   * @param  Monitors This parameter can be one or a combination of the following values:
297   *         @arg @ref LL_ICACHE_MONITOR_HIT
298   *         @arg @ref LL_ICACHE_MONITOR_MISS
299   *         @arg @ref LL_ICACHE_MONITOR_ALL
300   * @retval None
301   */
LL_ICACHE_EnableMonitors(uint32_t Monitors)302 __STATIC_INLINE void LL_ICACHE_EnableMonitors(uint32_t Monitors)
303 {
304   SET_BIT(ICACHE->CR, Monitors);
305 }
306 
307 /**
308   * @brief  Disable the hit/miss monitor(s).
309   * @rmtoll CR           HITMEN        LL_ICACHE_DisableMonitors
310   * @rmtoll CR           MISSMEN       LL_ICACHE_DisableMonitors
311   * @param  Monitors This parameter can be one or a combination of the following values:
312   *         @arg @ref LL_ICACHE_MONITOR_HIT
313   *         @arg @ref LL_ICACHE_MONITOR_MISS
314   *         @arg @ref LL_ICACHE_MONITOR_ALL
315   * @retval None
316   */
LL_ICACHE_DisableMonitors(uint32_t Monitors)317 __STATIC_INLINE void LL_ICACHE_DisableMonitors(uint32_t Monitors)
318 {
319   CLEAR_BIT(ICACHE->CR, Monitors);
320 }
321 
322 /**
323   * @brief  Check if the monitor(s) is(are) enabled or disabled.
324   * @rmtoll CR           HITMEN        LL_ICACHE_IsEnabledMonitors
325   * @rmtoll CR           MISSMEN       LL_ICACHE_IsEnabledMonitors
326   * @param  Monitors This parameter can be one or a combination of the following values:
327   *         @arg @ref LL_ICACHE_MONITOR_HIT
328   *         @arg @ref LL_ICACHE_MONITOR_MISS
329   *         @arg @ref LL_ICACHE_MONITOR_ALL
330   * @retval State of parameter value (1 or 0).
331   */
LL_ICACHE_IsEnabledMonitors(uint32_t Monitors)332 __STATIC_INLINE uint32_t LL_ICACHE_IsEnabledMonitors(uint32_t Monitors)
333 {
334   return ((READ_BIT(ICACHE->CR, Monitors) == (Monitors)) ? 1UL : 0UL);
335 }
336 
337 /**
338   * @brief  Reset the hit/miss monitor(s).
339   * @rmtoll CR           HITMRST       LL_ICACHE_ResetMonitors
340   * @rmtoll CR           MISSMRST      LL_ICACHE_ResetMonitors
341   * @param  Monitors This parameter can be one or a combination of the following values:
342   *         @arg @ref LL_ICACHE_MONITOR_HIT
343   *         @arg @ref LL_ICACHE_MONITOR_MISS
344   *         @arg @ref LL_ICACHE_MONITOR_ALL
345   * @retval None
346   */
LL_ICACHE_ResetMonitors(uint32_t Monitors)347 __STATIC_INLINE void LL_ICACHE_ResetMonitors(uint32_t Monitors)
348 {
349   /* Reset */
350   SET_BIT(ICACHE->CR, (Monitors << 2U));
351   /* Release reset */
352   CLEAR_BIT(ICACHE->CR, (Monitors << 2U));
353 }
354 
355 /**
356   * @brief  Get the Hit monitor.
357   * @note   Upon reaching the 32-bit maximum value, hit monitor does not wrap.
358   * @rmtoll HMONR        HITMON        LL_ICACHE_GetHitMonitor
359   * @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
360   */
LL_ICACHE_GetHitMonitor(void)361 __STATIC_INLINE uint32_t LL_ICACHE_GetHitMonitor(void)
362 {
363   return (ICACHE->HMONR);
364 }
365 
366 /**
367   * @brief  Get the Miss monitor.
368   * @note   Upon reaching the 16-bit maximum value, miss monitor does not wrap.
369   * @rmtoll MMONR        MISSMON       LL_ICACHE_GetMissMonitor
370   * @retval Value between Min_Data=0 and Max_Data=0xFFFF
371   */
LL_ICACHE_GetMissMonitor(void)372 __STATIC_INLINE uint32_t LL_ICACHE_GetMissMonitor(void)
373 {
374   return (ICACHE->MMONR);
375 }
376 
377 /**
378   * @}
379   */
380 
381 /** @defgroup ICACHE_LL_EF_IT_Management IT_Management
382   * @{
383   */
384 
385 /**
386   * @brief  Enable BSYEND interrupt.
387   * @rmtoll IER          BSYENDIE      LL_ICACHE_EnableIT_BSYEND
388   * @retval None
389   */
LL_ICACHE_EnableIT_BSYEND(void)390 __STATIC_INLINE void LL_ICACHE_EnableIT_BSYEND(void)
391 {
392   SET_BIT(ICACHE->IER, ICACHE_IER_BSYENDIE);
393 }
394 
395 /**
396   * @brief  Disable BSYEND interrupt.
397   * @rmtoll IER          BSYENDIE      LL_ICACHE_DisableIT_BSYEND
398   * @retval None
399   */
LL_ICACHE_DisableIT_BSYEND(void)400 __STATIC_INLINE void LL_ICACHE_DisableIT_BSYEND(void)
401 {
402   CLEAR_BIT(ICACHE->IER, ICACHE_IER_BSYENDIE);
403 }
404 
405 /**
406   * @brief  Check if the BSYEND Interrupt is enabled or disabled.
407   * @rmtoll IER          BSYENDIE      LL_ICACHE_IsEnabledIT_BSYEND
408   * @retval State of bit (1 or 0).
409   */
LL_ICACHE_IsEnabledIT_BSYEND(void)410 __STATIC_INLINE uint32_t LL_ICACHE_IsEnabledIT_BSYEND(void)
411 {
412   return ((READ_BIT(ICACHE->IER, ICACHE_IER_BSYENDIE) == (ICACHE_IER_BSYENDIE)) ? 1UL : 0UL);
413 }
414 
415 /**
416   * @brief  Enable ERR interrupt.
417   * @rmtoll IER          ERRIE         LL_ICACHE_EnableIT_ERR
418   * @retval None
419   */
LL_ICACHE_EnableIT_ERR(void)420 __STATIC_INLINE void LL_ICACHE_EnableIT_ERR(void)
421 {
422   SET_BIT(ICACHE->IER, ICACHE_IER_ERRIE);
423 }
424 
425 /**
426   * @brief  Disable ERR interrupt.
427   * @rmtoll IER          ERRIE        LL_ICACHE_DisableIT_ERR
428   * @retval None
429   */
LL_ICACHE_DisableIT_ERR(void)430 __STATIC_INLINE void LL_ICACHE_DisableIT_ERR(void)
431 {
432   CLEAR_BIT(ICACHE->IER, ICACHE_IER_ERRIE);
433 }
434 
435 /**
436   * @brief  Check if the ERR Interrupt is enabled or disabled.
437   * @rmtoll IER          ERRIE         LL_ICACHE_IsEnabledIT_ERR
438   * @retval State of bit (1 or 0).
439   */
LL_ICACHE_IsEnabledIT_ERR(void)440 __STATIC_INLINE uint32_t LL_ICACHE_IsEnabledIT_ERR(void)
441 {
442   return ((READ_BIT(ICACHE->IER, ICACHE_IER_ERRIE) == (ICACHE_IER_ERRIE)) ? 1UL : 0UL);
443 }
444 
445 /**
446   * @}
447   */
448 
449 /** @defgroup ICACHE_LL_EF_FLAG_Management FLAG_Management
450   * @{
451   */
452 
453 /**
454   * @brief  Indicate the status of an ongoing operation flag.
455   * @rmtoll SR           BUSYF         LL_ICACHE_IsActiveFlag_BUSY
456   * @retval State of bit (1 or 0).
457   */
LL_ICACHE_IsActiveFlag_BUSY(void)458 __STATIC_INLINE uint32_t LL_ICACHE_IsActiveFlag_BUSY(void)
459 {
460   return ((READ_BIT(ICACHE->SR, ICACHE_SR_BUSYF) == (ICACHE_SR_BUSYF)) ? 1UL : 0UL);
461 }
462 
463 /**
464   * @brief  Indicate the status of an operation end flag.
465   * @rmtoll SR           BSYEND       LL_ICACHE_IsActiveFlag_BSYEND
466   * @retval State of bit (1 or 0).
467   */
LL_ICACHE_IsActiveFlag_BSYEND(void)468 __STATIC_INLINE uint32_t LL_ICACHE_IsActiveFlag_BSYEND(void)
469 {
470   return ((READ_BIT(ICACHE->SR, ICACHE_SR_BSYENDF) == (ICACHE_SR_BSYENDF)) ? 1UL : 0UL);
471 }
472 
473 /**
474   * @brief  Indicate the status of an error flag.
475   * @rmtoll SR           ERRF          LL_ICACHE_IsActiveFlag_ERR
476   * @retval State of bit (1 or 0).
477   */
LL_ICACHE_IsActiveFlag_ERR(void)478 __STATIC_INLINE uint32_t LL_ICACHE_IsActiveFlag_ERR(void)
479 {
480   return ((READ_BIT(ICACHE->SR, ICACHE_SR_ERRF) == (ICACHE_SR_ERRF)) ? 1UL : 0UL);
481 }
482 
483 /**
484   * @brief  Clear busy end of operation flag.
485   * @rmtoll FCR          CBSYENDF      LL_ICACHE_ClearFlag_BSYEND
486   * @retval None
487   */
LL_ICACHE_ClearFlag_BSYEND(void)488 __STATIC_INLINE void LL_ICACHE_ClearFlag_BSYEND(void)
489 {
490   WRITE_REG(ICACHE->FCR, ICACHE_FCR_CBSYENDF);
491 }
492 
493 /**
494   * @brief  Clear error flag.
495   * @rmtoll FCR          ERRF          LL_ICACHE_ClearFlag_ERR
496   * @retval None
497   */
LL_ICACHE_ClearFlag_ERR(void)498 __STATIC_INLINE void LL_ICACHE_ClearFlag_ERR(void)
499 {
500   WRITE_REG(ICACHE->FCR, ICACHE_FCR_CERRF);
501 }
502 
503 /**
504   * @}
505   */
506 
507 #if defined(ICACHE_CRRx_REN)
508 /** @defgroup ICACHE_LL_EF_REGION_Management REGION_Management
509   * @{
510   */
511 
512 /**
513   * @brief  Enable the remapped memory region.
514   * @note   The region must have been already configured.
515   * @rmtoll CRRx         REN           LL_ICACHE_EnableRegion
516   * @param  Region This parameter can be one of the following values:
517   *         @arg @ref LL_ICACHE_REGION_0
518   *         @arg @ref LL_ICACHE_REGION_1
519   *         @arg @ref LL_ICACHE_REGION_2
520   *         @arg @ref LL_ICACHE_REGION_3
521   * @retval None
522   */
LL_ICACHE_EnableRegion(uint32_t Region)523 __STATIC_INLINE void LL_ICACHE_EnableRegion(uint32_t Region)
524 {
525   SET_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
526           ICACHE_CRRx_REN);
527 }
528 
529 /**
530   * @brief  Disable the remapped memory region.
531   * @rmtoll CRRx         REN           LL_ICACHE_DisableRegion
532   * @param  Region This parameter can be one of the following values:
533   *         @arg @ref LL_ICACHE_REGION_0
534   *         @arg @ref LL_ICACHE_REGION_1
535   *         @arg @ref LL_ICACHE_REGION_2
536   *         @arg @ref LL_ICACHE_REGION_3
537   * @retval None
538   */
LL_ICACHE_DisableRegion(uint32_t Region)539 __STATIC_INLINE void LL_ICACHE_DisableRegion(uint32_t Region)
540 {
541   CLEAR_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
542             ICACHE_CRRx_REN);
543 }
544 
545 /**
546   * @brief  Return if remapped memory region is enabled or not.
547   * @rmtoll CRRx         REN           LL_ICACHE_IsEnabledRegion
548   * @param  Region This parameter can be one of the following values:
549   *         @arg @ref LL_ICACHE_REGION_0
550   *         @arg @ref LL_ICACHE_REGION_1
551   *         @arg @ref LL_ICACHE_REGION_2
552   *         @arg @ref LL_ICACHE_REGION_3
553   * @retval State of bit (1 or 0).
554   */
LL_ICACHE_IsEnabledRegion(uint32_t Region)555 __STATIC_INLINE uint32_t LL_ICACHE_IsEnabledRegion(uint32_t Region)
556 {
557   return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
558                     ICACHE_CRRx_REN) == (ICACHE_CRRx_REN)) ? 1UL : 0UL);
559 }
560 
561 /**
562   * @brief  Select the memory remapped region base address.
563   * @note   The useful bits depends on RSIZE as described in the Reference Manual.
564   * @rmtoll CRRx         BASEADDR      LL_ICACHE_SetRegionBaseAddress
565   * @param  Region This parameter can be one of the following values:
566   *         @arg @ref LL_ICACHE_REGION_0
567   *         @arg @ref LL_ICACHE_REGION_1
568   *         @arg @ref LL_ICACHE_REGION_2
569   *         @arg @ref LL_ICACHE_REGION_3
570   * @param  Address  Alias address in the Code region
571   * @retval None
572   */
LL_ICACHE_SetRegionBaseAddress(uint32_t Region,uint32_t Address)573 __STATIC_INLINE void LL_ICACHE_SetRegionBaseAddress(uint32_t Region, uint32_t Address)
574 {
575   MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
576              ICACHE_CRRx_BASEADDR, ((Address & 0x1FFFFFFFU) >> 21U));
577 }
578 
579 /**
580   * @brief  Get the memory remapped region base address.
581   * @note   The base address is the alias in the Code region.
582   * @note   The useful bits depends on RSIZE as described in the Reference Manual.
583   * @rmtoll CRRx         BASEADDR      LL_ICACHE_GetRegionBaseAddress
584   * @param  Region This parameter can be one of the following values:
585   *         @arg @ref LL_ICACHE_REGION_0
586   *         @arg @ref LL_ICACHE_REGION_1
587   *         @arg @ref LL_ICACHE_REGION_2
588   *         @arg @ref LL_ICACHE_REGION_3
589   * @retval Address  Alias address in the Code region
590   */
LL_ICACHE_GetRegionBaseAddress(uint32_t Region)591 __STATIC_INLINE uint32_t LL_ICACHE_GetRegionBaseAddress(uint32_t Region)
592 {
593   return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
594                    ICACHE_CRRx_BASEADDR) << 21U);
595 }
596 
597 /**
598   * @brief  Select the memory remapped region address.
599   * @note   The useful bits depends on RSIZE as described in the Reference Manual.
600   * @rmtoll CRRx         REMAPADDR     LL_ICACHE_SetRegionRemapAddress
601   * @param  Region This parameter can be one of the following values:
602   *         @arg @ref LL_ICACHE_REGION_0
603   *         @arg @ref LL_ICACHE_REGION_1
604   *         @arg @ref LL_ICACHE_REGION_2
605   *         @arg @ref LL_ICACHE_REGION_3
606   * @param  Address  Memory address to remap
607   * @retval None
608   */
LL_ICACHE_SetRegionRemapAddress(uint32_t Region,uint32_t Address)609 __STATIC_INLINE void LL_ICACHE_SetRegionRemapAddress(uint32_t Region, uint32_t Address)
610 {
611   MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
612              ICACHE_CRRx_REMAPADDR, ((Address >> 21U) << ICACHE_CRRx_REMAPADDR_Pos));
613 }
614 
615 /**
616   * @brief  Get the memory remapped region address.
617   * @note   The useful bits depends on RSIZE as described in the Reference Manual.
618   * @rmtoll CRRx         REMAPADDR     LL_ICACHE_GetRegionRemapAddress
619   * @param  Region This parameter can be one of the following values:
620   *         @arg @ref LL_ICACHE_REGION_0
621   *         @arg @ref LL_ICACHE_REGION_1
622   *         @arg @ref LL_ICACHE_REGION_2
623   *         @arg @ref LL_ICACHE_REGION_3
624   * @retval Address  Remapped memory address
625   */
LL_ICACHE_GetRegionRemapAddress(uint32_t Region)626 __STATIC_INLINE uint32_t LL_ICACHE_GetRegionRemapAddress(uint32_t Region)
627 {
628   return ((READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
629                     ICACHE_CRRx_REMAPADDR) >> ICACHE_CRRx_REMAPADDR_Pos) << 21U);
630 }
631 
632 /**
633   * @brief  Select the memory remapped region size.
634   * @rmtoll CRRx         RSIZE         LL_ICACHE_SetRegionSize
635   * @param  Region This parameter can be one of the following values:
636   *         @arg @ref LL_ICACHE_REGION_0
637   *         @arg @ref LL_ICACHE_REGION_1
638   *         @arg @ref LL_ICACHE_REGION_2
639   *         @arg @ref LL_ICACHE_REGION_3
640   * @param  Size This parameter can be one of the following values:
641   *         @arg @ref LL_ICACHE_REGIONSIZE_2MB
642   *         @arg @ref LL_ICACHE_REGIONSIZE_4MB
643   *         @arg @ref LL_ICACHE_REGIONSIZE_8MB
644   *         @arg @ref LL_ICACHE_REGIONSIZE_16MB
645   *         @arg @ref LL_ICACHE_REGIONSIZE_32MB
646   *         @arg @ref LL_ICACHE_REGIONSIZE_64MB
647   *         @arg @ref LL_ICACHE_REGIONSIZE_128MB
648   * @retval None
649   */
LL_ICACHE_SetRegionSize(uint32_t Region,uint32_t Size)650 __STATIC_INLINE void LL_ICACHE_SetRegionSize(uint32_t Region, uint32_t Size)
651 {
652   MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
653              ICACHE_CRRx_RSIZE, (Size << ICACHE_CRRx_RSIZE_Pos));
654 }
655 
656 /**
657   * @brief  Get the selected the memory remapped region size.
658   * @rmtoll CRRx         RSIZE         LL_ICACHE_GetRegionSize
659   * @param  Region This parameter can be one of the following values:
660   *         @arg @ref LL_ICACHE_REGION_0
661   *         @arg @ref LL_ICACHE_REGION_1
662   *         @arg @ref LL_ICACHE_REGION_2
663   *         @arg @ref LL_ICACHE_REGION_3
664   * @retval Returned value can be one of the following values:
665   *         @arg @ref LL_ICACHE_REGIONSIZE_2MB
666   *         @arg @ref LL_ICACHE_REGIONSIZE_4MB
667   *         @arg @ref LL_ICACHE_REGIONSIZE_8MB
668   *         @arg @ref LL_ICACHE_REGIONSIZE_16MB
669   *         @arg @ref LL_ICACHE_REGIONSIZE_32MB
670   *         @arg @ref LL_ICACHE_REGIONSIZE_64MB
671   *         @arg @ref LL_ICACHE_REGIONSIZE_128MB
672   */
LL_ICACHE_GetRegionSize(uint32_t Region)673 __STATIC_INLINE uint32_t LL_ICACHE_GetRegionSize(uint32_t Region)
674 {
675   return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
676                    ICACHE_CRRx_RSIZE) >> ICACHE_CRRx_RSIZE_Pos);
677 }
678 
679 /**
680   * @brief  Select the memory remapped region output burst type.
681   * @rmtoll CRRx         HBURST        LL_ICACHE_SetRegionOutputBurstType
682   * @param  Region This parameter can be one of the following values:
683   *         @arg @ref LL_ICACHE_REGION_0
684   *         @arg @ref LL_ICACHE_REGION_1
685   *         @arg @ref LL_ICACHE_REGION_2
686   *         @arg @ref LL_ICACHE_REGION_3
687   * @param  Type This parameter can be one of the following values:
688   *         @arg @ref LL_ICACHE_OUTPUT_BURST_WRAP
689   *         @arg @ref LL_ICACHE_OUTPUT_BURST_INCR
690   * @retval None
691   */
LL_ICACHE_SetRegionOutputBurstType(uint32_t Region,uint32_t Type)692 __STATIC_INLINE void LL_ICACHE_SetRegionOutputBurstType(uint32_t Region, uint32_t Type)
693 {
694   MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
695              ICACHE_CRRx_HBURST, Type);
696 }
697 
698 /**
699   * @brief  Get the selected the memory remapped region output burst type.
700   * @rmtoll CRRx         HBURST        LL_ICACHE_GetRegionOutputBurstType
701   * @param  Region This parameter can be one of the following values:
702   *         @arg @ref LL_ICACHE_REGION_0
703   *         @arg @ref LL_ICACHE_REGION_1
704   *         @arg @ref LL_ICACHE_REGION_2
705   *         @arg @ref LL_ICACHE_REGION_3
706   * @retval Returned value can be one of the following values:
707   *         @arg @ref LL_ICACHE_OUTPUT_BURST_WRAP
708   *         @arg @ref LL_ICACHE_OUTPUT_BURST_INCR
709   */
LL_ICACHE_GetRegionOutputBurstType(uint32_t Region)710 __STATIC_INLINE uint32_t LL_ICACHE_GetRegionOutputBurstType(uint32_t Region)
711 {
712   return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
713                    ICACHE_CRRx_HBURST));
714 }
715 
716 /**
717   * @brief  Select the memory remapped region cache master port.
718   * @rmtoll CRRx         MSTSEL        LL_ICACHE_SetRegionMasterPort
719   * @param  Region This parameter can be one of the following values:
720   *         @arg @ref LL_ICACHE_REGION_0
721   *         @arg @ref LL_ICACHE_REGION_1
722   *         @arg @ref LL_ICACHE_REGION_2
723   *         @arg @ref LL_ICACHE_REGION_3
724   * @param  Port This parameter can be one of the following values:
725   *         @arg @ref LL_ICACHE_MASTER1_PORT
726   *         @arg @ref LL_ICACHE_MASTER2_PORT
727   * @retval None
728   */
LL_ICACHE_SetRegionMasterPort(uint32_t Region,uint32_t Port)729 __STATIC_INLINE void LL_ICACHE_SetRegionMasterPort(uint32_t Region, uint32_t Port)
730 {
731   MODIFY_REG(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
732              ICACHE_CRRx_MSTSEL, Port);
733 }
734 
735 /**
736   * @brief  Get the selected the memory remapped region cache master port.
737   * @rmtoll CRRx         MSTSEL        LL_ICACHE_GetRegionMasterPort
738   * @param  Region This parameter can be one of the following values:
739   *         @arg @ref LL_ICACHE_REGION_0
740   *         @arg @ref LL_ICACHE_REGION_1
741   *         @arg @ref LL_ICACHE_REGION_2
742   *         @arg @ref LL_ICACHE_REGION_3
743   * @retval Returned value can be one of the following values:
744   *         @arg @ref LL_ICACHE_MASTER1_PORT
745   *         @arg @ref LL_ICACHE_MASTER2_PORT
746   */
LL_ICACHE_GetRegionMasterPort(uint32_t Region)747 __STATIC_INLINE uint32_t LL_ICACHE_GetRegionMasterPort(uint32_t Region)
748 {
749   return (READ_BIT(*((__IO uint32_t *)(&(ICACHE->CRR0) + (1U * Region))), \
750                    ICACHE_CRRx_MSTSEL));
751 }
752 
753 /**
754   * @}
755   */
756 
757 #if defined(USE_FULL_LL_DRIVER)
758 /** @defgroup ICACHE_LL_EF_REGION_Init Region Initialization functions
759   * @{
760   */
761 
762 void LL_ICACHE_ConfigRegion(uint32_t Region, const LL_ICACHE_RegionTypeDef *const pICACHE_RegionStruct);
763 
764 /**
765   * @}
766   */
767 #endif /* USE_FULL_LL_DRIVER */
768 
769 #endif /*  ICACHE_CRRx_REN */
770 /**
771   * @}
772   */
773 
774 /**
775   * @}
776   */
777 
778 #endif /* ICACHE */
779 
780 /**
781   * @}
782   */
783 
784 #ifdef __cplusplus
785 }
786 #endif
787 
788 #endif /* STM32H5xx_LL_ICACHE_H */
789