1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_SAI_H 21 #define STM32H5xx_HAL_SAI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 #if defined(SAI1) 31 32 /** @addtogroup STM32H5xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup SAI 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup SAI_Exported_Types SAI Exported Types 42 * @{ 43 */ 44 45 /** @defgroup SAI_PDM_Structure_definition SAI PDM Structure definition 46 * @brief SAI PDM Init structure definition 47 * @{ 48 */ 49 typedef struct 50 { 51 FunctionalState Activation; /*!< Enable/disable PDM interface */ 52 uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used. 53 This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ 54 uint32_t ClockEnable; /*!< Specifies which clock must be enabled. 55 This parameter can be a values combination of @ref SAI_PDM_ClockEnable */ 56 } SAI_PdmInitTypeDef; 57 /** 58 * @} 59 */ 60 61 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 62 * @brief SAI Init Structure definition 63 * @{ 64 */ 65 typedef struct 66 { 67 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 68 This parameter can be a value of @ref SAI_Block_Mode */ 69 70 uint32_t Synchro; /*!< Specifies SAI Block synchronization 71 This parameter can be a value of @ref SAI_Block_Synchronization */ 72 73 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 74 for BlockA and BlockB 75 This parameter can be a value of @ref SAI_Block_SyncExt 76 @note If both audio blocks of same SAI are used, this parameter has 77 to be set to the same value for each audio block */ 78 79 uint32_t MckOutput; /*!< Specifies whether master clock output will be generated or not. 80 This parameter can be a value of @ref SAI_Block_MckOutput */ 81 82 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 83 This parameter can be a value of @ref SAI_Block_Output_Drive 84 @note This value has to be set before enabling the audio block 85 but after the audio block configuration. */ 86 87 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 88 This parameter can be a value of @ref SAI_Block_NoDivider 89 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length 90 should be aligned to a number equal to a power of 2, from 8 to 256. 91 If bit NODIV in the SAI_xCR1 register is set, the frame length can 92 take any of the values from 8 to 256. */ 93 94 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 95 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 96 97 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 98 This parameter can be a value of @ref SAI_Audio_Frequency */ 99 100 uint32_t Mckdiv; /*!< Specifies the master clock divider. 101 This parameter must be a number between Min_Data = 0 and Max_Data = 63. 102 @note This parameter is used only if AudioFrequency is set to 103 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 104 105 uint32_t MckOverSampling; /*!< Specifies the master clock oversampling. 106 This parameter can be a value of @ref SAI_Block_Mck_OverSampling */ 107 108 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 109 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 110 111 uint32_t CompandingMode; /*!< Specifies the companding mode type. 112 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 113 114 uint32_t TriState; /*!< Specifies the companding mode type. 115 This parameter can be a value of @ref SAI_TRIState_Management */ 116 117 SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */ 118 119 /* This part of the structure is automatically filled if your are using the high level initialisation 120 function HAL_SAI_InitProtocol */ 121 122 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 123 This parameter can be a value of @ref SAI_Block_Protocol */ 124 125 uint32_t DataSize; /*!< Specifies the SAI Block data size. 126 This parameter can be a value of @ref SAI_Block_Data_Size */ 127 128 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 129 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 130 131 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 132 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 133 } SAI_InitTypeDef; 134 135 /** 136 * @brief HAL State structures definition 137 */ 138 typedef enum 139 { 140 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 141 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 142 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 143 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 144 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 145 } HAL_SAI_StateTypeDef; 146 147 /** 148 * @brief SAI Callback prototype 149 */ 150 typedef void (*SAIcallback)(void); 151 152 /** 153 * @} 154 */ 155 156 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 157 * @brief SAI Frame Init structure definition 158 * @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware). 159 * @{ 160 */ 161 typedef struct 162 { 163 164 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 165 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 166 @note If master clock MCLK_x pin is declared as an output, the frame length 167 should be aligned to a number equal to power of 2 in order to keep 168 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 169 170 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 171 This Parameter specifies the length in number of bit clock (SCK + 1) 172 of the active level of FS signal in audio frame. 173 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 174 175 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 176 This parameter can be a value of @ref SAI_Block_FS_Definition */ 177 178 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 179 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 180 181 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 182 This parameter can be a value of @ref SAI_Block_FS_Offset */ 183 184 } SAI_FrameInitTypeDef; 185 /** 186 * @} 187 */ 188 189 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 190 * @brief SAI Block Slot Init Structure definition 191 * @note For SPDIF protocol, these parameters are not used (set by hardware). 192 * @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware). 193 * @{ 194 */ 195 typedef struct 196 { 197 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 198 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 199 200 uint32_t SlotSize; /*!< Specifies the Slot Size. 201 This parameter can be a value of @ref SAI_Block_Slot_Size */ 202 203 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 204 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 205 206 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 207 This parameter can be a value of @ref SAI_Block_Slot_Active */ 208 } SAI_SlotInitTypeDef; 209 /** 210 * @} 211 */ 212 213 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 214 * @brief SAI handle Structure definition 215 * @{ 216 */ 217 typedef struct __SAI_HandleTypeDef 218 { 219 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 220 221 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 222 223 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 224 225 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 226 227 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 228 229 uint16_t XferSize; /*!< SAI transfer size */ 230 231 uint16_t XferCount; /*!< SAI transfer counter */ 232 233 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 234 235 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 236 237 SAIcallback mutecallback; /*!< SAI mute callback */ 238 239 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 240 241 HAL_LockTypeDef Lock; /*!< SAI locking object */ 242 243 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 244 245 __IO uint32_t ErrorCode; /*!< SAI Error code */ 246 247 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 248 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 249 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 250 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 251 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 252 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 253 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 254 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 255 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 256 } SAI_HandleTypeDef; 257 258 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 259 /** 260 * @brief SAI callback ID enumeration definition 261 */ 262 typedef enum 263 { 264 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 265 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 266 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 267 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 268 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 269 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 270 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 271 } HAL_SAI_CallbackIDTypeDef; 272 273 /** 274 * @brief SAI callback pointer definition 275 */ 276 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 277 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 278 /** 279 * @} 280 */ 281 282 /** 283 * @} 284 */ 285 286 /* Exported constants --------------------------------------------------------*/ 287 /** @defgroup SAI_Exported_Constants SAI Exported Constants 288 * @{ 289 */ 290 291 /** @defgroup SAI_Error_Code SAI Error Code 292 * @{ 293 */ 294 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 295 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 296 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 297 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 298 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 299 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 300 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 301 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 302 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 303 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 304 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 305 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 306 /** 307 * @} 308 */ 309 310 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 311 * @{ 312 */ 313 #define SAI_SYNCEXT_DISABLE 0U 314 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U 315 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U 316 /** 317 * @} 318 */ 319 320 /** @defgroup SAI_Block_MckOutput SAI Block Master Clock Output 321 * @{ 322 */ 323 #define SAI_MCK_OUTPUT_DISABLE 0x00000000U 324 #define SAI_MCK_OUTPUT_ENABLE SAI_xCR1_MCKEN 325 /** 326 * @} 327 */ 328 329 /** @defgroup SAI_Protocol SAI Supported protocol 330 * @{ 331 */ 332 #define SAI_I2S_STANDARD 0U 333 #define SAI_I2S_MSBJUSTIFIED 1U 334 #define SAI_I2S_LSBJUSTIFIED 2U 335 #define SAI_PCM_LONG 3U 336 #define SAI_PCM_SHORT 4U 337 /** 338 * @} 339 */ 340 341 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 342 * @{ 343 */ 344 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 345 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 346 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 347 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 348 /** 349 * @} 350 */ 351 352 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 353 * @{ 354 */ 355 #define SAI_AUDIO_FREQUENCY_192K 192000U 356 #define SAI_AUDIO_FREQUENCY_96K 96000U 357 #define SAI_AUDIO_FREQUENCY_48K 48000U 358 #define SAI_AUDIO_FREQUENCY_44K 44100U 359 #define SAI_AUDIO_FREQUENCY_32K 32000U 360 #define SAI_AUDIO_FREQUENCY_22K 22050U 361 #define SAI_AUDIO_FREQUENCY_16K 16000U 362 #define SAI_AUDIO_FREQUENCY_11K 11025U 363 #define SAI_AUDIO_FREQUENCY_8K 8000U 364 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 365 /** 366 * @} 367 */ 368 369 /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling 370 * @{ 371 */ 372 #define SAI_MCK_OVERSAMPLING_DISABLE 0x00000000U 373 #define SAI_MCK_OVERSAMPLING_ENABLE SAI_xCR1_OSR 374 /** 375 * @} 376 */ 377 378 /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable 379 * @{ 380 */ 381 #define SAI_PDM_CLOCK1_ENABLE SAI_PDMCR_CKEN1 382 #define SAI_PDM_CLOCK2_ENABLE SAI_PDMCR_CKEN2 383 /** 384 * @} 385 */ 386 387 /** @defgroup SAI_Block_Mode SAI Block Mode 388 * @{ 389 */ 390 #define SAI_MODEMASTER_TX 0x00000000U 391 #define SAI_MODEMASTER_RX SAI_xCR1_MODE_0 392 #define SAI_MODESLAVE_TX SAI_xCR1_MODE_1 393 #define SAI_MODESLAVE_RX (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0) 394 395 /** 396 * @} 397 */ 398 399 /** @defgroup SAI_Block_Protocol SAI Block Protocol 400 * @{ 401 */ 402 #define SAI_FREE_PROTOCOL 0x00000000U 403 #define SAI_SPDIF_PROTOCOL SAI_xCR1_PRTCFG_0 404 #define SAI_AC97_PROTOCOL SAI_xCR1_PRTCFG_1 405 /** 406 * @} 407 */ 408 409 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 410 * @{ 411 */ 412 #define SAI_DATASIZE_8 SAI_xCR1_DS_1 413 #define SAI_DATASIZE_10 (SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 414 #define SAI_DATASIZE_16 SAI_xCR1_DS_2 415 #define SAI_DATASIZE_20 (SAI_xCR1_DS_2 | SAI_xCR1_DS_0) 416 #define SAI_DATASIZE_24 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1) 417 #define SAI_DATASIZE_32 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 418 /** 419 * @} 420 */ 421 422 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 423 * @{ 424 */ 425 #define SAI_FIRSTBIT_MSB 0x00000000U 426 #define SAI_FIRSTBIT_LSB SAI_xCR1_LSBFIRST 427 /** 428 * @} 429 */ 430 431 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 432 * @{ 433 */ 434 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 435 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 436 /** 437 * @} 438 */ 439 440 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 441 * @{ 442 */ 443 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 444 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 445 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */ 446 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */ 447 /** 448 * @} 449 */ 450 451 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 452 * @{ 453 */ 454 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 455 #define SAI_OUTPUTDRIVE_ENABLE SAI_xCR1_OUTDRIV 456 /** 457 * @} 458 */ 459 460 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 461 * @{ 462 */ 463 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 464 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NODIV 465 /** 466 * @} 467 */ 468 469 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 470 * @{ 471 */ 472 #define SAI_FS_STARTFRAME 0x00000000U 473 #define SAI_FS_CHANNEL_IDENTIFICATION SAI_xFRCR_FSDEF 474 /** 475 * @} 476 */ 477 478 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 479 * @{ 480 */ 481 #define SAI_FS_ACTIVE_LOW 0x00000000U 482 #define SAI_FS_ACTIVE_HIGH SAI_xFRCR_FSPOL 483 /** 484 * @} 485 */ 486 487 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 488 * @{ 489 */ 490 #define SAI_FS_FIRSTBIT 0x00000000U 491 #define SAI_FS_BEFOREFIRSTBIT SAI_xFRCR_FSOFF 492 /** 493 * @} 494 */ 495 496 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 497 * @{ 498 */ 499 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 500 #define SAI_SLOTSIZE_16B SAI_xSLOTR_SLOTSZ_0 501 #define SAI_SLOTSIZE_32B SAI_xSLOTR_SLOTSZ_1 502 /** 503 * @} 504 */ 505 506 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 507 * @{ 508 */ 509 #define SAI_SLOT_NOTACTIVE 0x00000000U 510 #define SAI_SLOTACTIVE_0 0x00000001U 511 #define SAI_SLOTACTIVE_1 0x00000002U 512 #define SAI_SLOTACTIVE_2 0x00000004U 513 #define SAI_SLOTACTIVE_3 0x00000008U 514 #define SAI_SLOTACTIVE_4 0x00000010U 515 #define SAI_SLOTACTIVE_5 0x00000020U 516 #define SAI_SLOTACTIVE_6 0x00000040U 517 #define SAI_SLOTACTIVE_7 0x00000080U 518 #define SAI_SLOTACTIVE_8 0x00000100U 519 #define SAI_SLOTACTIVE_9 0x00000200U 520 #define SAI_SLOTACTIVE_10 0x00000400U 521 #define SAI_SLOTACTIVE_11 0x00000800U 522 #define SAI_SLOTACTIVE_12 0x00001000U 523 #define SAI_SLOTACTIVE_13 0x00002000U 524 #define SAI_SLOTACTIVE_14 0x00004000U 525 #define SAI_SLOTACTIVE_15 0x00008000U 526 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 527 /** 528 * @} 529 */ 530 531 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 532 * @{ 533 */ 534 #define SAI_STEREOMODE 0x00000000U 535 #define SAI_MONOMODE SAI_xCR1_MONO 536 /** 537 * @} 538 */ 539 540 /** @defgroup SAI_TRIState_Management SAI TRIState Management 541 * @{ 542 */ 543 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 544 #define SAI_OUTPUT_RELEASED SAI_xCR2_TRIS 545 /** 546 * @} 547 */ 548 549 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 550 * @{ 551 */ 552 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 553 #define SAI_FIFOTHRESHOLD_1QF SAI_xCR2_FTH_0 554 #define SAI_FIFOTHRESHOLD_HF SAI_xCR2_FTH_1 555 #define SAI_FIFOTHRESHOLD_3QF (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0) 556 #define SAI_FIFOTHRESHOLD_FULL SAI_xCR2_FTH_2 557 /** 558 * @} 559 */ 560 561 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 562 * @{ 563 */ 564 #define SAI_NOCOMPANDING 0x00000000U 565 #define SAI_ULAW_1CPL_COMPANDING SAI_xCR2_COMP_1 566 #define SAI_ALAW_1CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0) 567 #define SAI_ULAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_CPL) 568 #define SAI_ALAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL) 569 /** 570 * @} 571 */ 572 573 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 574 * @{ 575 */ 576 #define SAI_ZERO_VALUE 0x00000000U 577 #define SAI_LAST_SENT_VALUE SAI_xCR2_MUTEVAL 578 /** 579 * @} 580 */ 581 582 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 583 * @{ 584 */ 585 #define SAI_IT_OVRUDR SAI_xIMR_OVRUDRIE 586 #define SAI_IT_MUTEDET SAI_xIMR_MUTEDETIE 587 #define SAI_IT_WCKCFG SAI_xIMR_WCKCFGIE 588 #define SAI_IT_FREQ SAI_xIMR_FREQIE 589 #define SAI_IT_CNRDY SAI_xIMR_CNRDYIE 590 #define SAI_IT_AFSDET SAI_xIMR_AFSDETIE 591 #define SAI_IT_LFSDET SAI_xIMR_LFSDETIE 592 /** 593 * @} 594 */ 595 596 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 597 * @{ 598 */ 599 #define SAI_FLAG_OVRUDR SAI_xSR_OVRUDR 600 #define SAI_FLAG_MUTEDET SAI_xSR_MUTEDET 601 #define SAI_FLAG_WCKCFG SAI_xSR_WCKCFG 602 #define SAI_FLAG_FREQ SAI_xSR_FREQ 603 #define SAI_FLAG_CNRDY SAI_xSR_CNRDY 604 #define SAI_FLAG_AFSDET SAI_xSR_AFSDET 605 #define SAI_FLAG_LFSDET SAI_xSR_LFSDET 606 /** 607 * @} 608 */ 609 610 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 611 * @{ 612 */ 613 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 614 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 615 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 616 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 617 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 618 #define SAI_FIFOSTATUS_FULL 0x00050000U 619 /** 620 * @} 621 */ 622 623 /** 624 * @} 625 */ 626 627 /* Exported macro ------------------------------------------------------------*/ 628 /** @defgroup SAI_Exported_Macros SAI Exported Macros 629 * @brief macros to handle interrupts and specific configurations 630 * @{ 631 */ 632 633 /** @brief Reset SAI handle state. 634 * @param __HANDLE__ specifies the SAI Handle. 635 * @retval None 636 */ 637 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 638 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 639 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 640 (__HANDLE__)->MspInitCallback = NULL; \ 641 (__HANDLE__)->MspDeInitCallback = NULL; \ 642 } while(0) 643 #else 644 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 645 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 646 647 /** @brief Enable the specified SAI interrupts. 648 * @param __HANDLE__ specifies the SAI Handle. 649 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 650 * This parameter can be one of the following values: 651 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 652 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 653 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 654 * @arg SAI_IT_FREQ: FIFO request interrupt enable 655 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 656 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 657 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 658 * @retval None 659 */ 660 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 661 662 /** @brief Disable the specified SAI interrupts. 663 * @param __HANDLE__ specifies the SAI Handle. 664 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 665 * This parameter can be one of the following values: 666 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 667 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 668 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 669 * @arg SAI_IT_FREQ: FIFO request interrupt enable 670 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 671 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 672 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 673 * @retval None 674 */ 675 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 676 677 /** @brief Check whether the specified SAI interrupt source is enabled or not. 678 * @param __HANDLE__ specifies the SAI Handle. 679 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 680 * This parameter can be one of the following values: 681 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 682 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 683 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 684 * @arg SAI_IT_FREQ: FIFO request interrupt enable 685 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 686 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 687 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 688 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 689 */ 690 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & \ 691 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 692 693 /** @brief Check whether the specified SAI flag is set or not. 694 * @param __HANDLE__ specifies the SAI Handle. 695 * @param __FLAG__ specifies the flag to check. 696 * This parameter can be one of the following values: 697 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 698 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 699 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 700 * @arg SAI_FLAG_FREQ: FIFO request flag. 701 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 702 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 703 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 704 * @retval The new state of __FLAG__ (TRUE or FALSE). 705 */ 706 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 707 708 /** @brief Clear the specified SAI pending flag. 709 * @param __HANDLE__ specifies the SAI Handle. 710 * @param __FLAG__ specifies the flag to check. 711 * This parameter can be any combination of the following values: 712 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 713 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 714 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 715 * @arg SAI_FLAG_FREQ: Clear FIFO request 716 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 717 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 718 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 719 * 720 * @retval None 721 */ 722 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 723 724 /** @brief Enable SAI. 725 * @param __HANDLE__ specifies the SAI Handle. 726 * @retval None 727 */ 728 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 729 730 /** @brief Disable SAI. 731 * @param __HANDLE__ specifies the SAI Handle. 732 * @retval None 733 */ 734 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 735 736 /** 737 * @} 738 */ 739 740 /* Include SAI HAL Extension module */ 741 #include "stm32h5xx_hal_sai_ex.h" 742 743 /* Exported functions --------------------------------------------------------*/ 744 /** @addtogroup SAI_Exported_Functions 745 * @{ 746 */ 747 748 /* Initialization/de-initialization functions ********************************/ 749 /** @addtogroup SAI_Exported_Functions_Group1 750 * @{ 751 */ 752 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 753 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 754 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 755 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 756 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 757 758 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 759 /* SAI callbacks register/unregister functions ********************************/ 760 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 761 HAL_SAI_CallbackIDTypeDef CallbackID, 762 pSAI_CallbackTypeDef pCallback); 763 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 764 HAL_SAI_CallbackIDTypeDef CallbackID); 765 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 766 /** 767 * @} 768 */ 769 770 /* I/O operation functions ***************************************************/ 771 /** @addtogroup SAI_Exported_Functions_Group2 772 * @{ 773 */ 774 /* Blocking mode: Polling */ 775 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 776 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 777 778 /* Non-Blocking mode: Interrupt */ 779 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 780 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 781 782 /* Non-Blocking mode: DMA */ 783 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 784 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 785 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 786 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 787 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 788 789 /* Abort function */ 790 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 791 792 /* Mute management */ 793 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 794 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 795 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 796 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 797 798 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 799 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 800 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 801 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 802 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 803 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 804 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 805 /** 806 * @} 807 */ 808 809 /** @addtogroup SAI_Exported_Functions_Group3 810 * @{ 811 */ 812 /* Peripheral State functions ************************************************/ 813 HAL_SAI_StateTypeDef HAL_SAI_GetState(const SAI_HandleTypeDef *hsai); 814 uint32_t HAL_SAI_GetError(const SAI_HandleTypeDef *hsai); 815 /** 816 * @} 817 */ 818 819 /** 820 * @} 821 */ 822 823 /* Private macros ------------------------------------------------------------*/ 824 /** @defgroup SAI_Private_Macros SAI Private Macros 825 * @{ 826 */ 827 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 828 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 829 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 830 831 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 832 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 833 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 834 ((PROTOCOL) == SAI_PCM_LONG) ||\ 835 ((PROTOCOL) == SAI_PCM_SHORT)) 836 837 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 838 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 839 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 840 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 841 842 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || \ 843 ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 844 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || \ 845 ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 846 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || \ 847 ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 848 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || \ 849 ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 850 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || \ 851 ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 852 853 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ 854 ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE)) 855 856 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U)) 857 858 #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \ 859 (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U)) 860 861 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 862 ((MODE) == SAI_MODEMASTER_RX) || \ 863 ((MODE) == SAI_MODESLAVE_TX) || \ 864 ((MODE) == SAI_MODESLAVE_RX)) 865 866 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 867 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 868 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 869 870 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 871 ((DATASIZE) == SAI_DATASIZE_10) || \ 872 ((DATASIZE) == SAI_DATASIZE_16) || \ 873 ((DATASIZE) == SAI_DATASIZE_20) || \ 874 ((DATASIZE) == SAI_DATASIZE_24) || \ 875 ((DATASIZE) == SAI_DATASIZE_32)) 876 877 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 878 ((BIT) == SAI_FIRSTBIT_LSB)) 879 880 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 881 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 882 883 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 884 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 885 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 886 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 887 888 #define IS_SAI_BLOCK_MCK_OUTPUT(VALUE) (((VALUE) == SAI_MCK_OUTPUT_ENABLE) || \ 889 ((VALUE) == SAI_MCK_OUTPUT_DISABLE)) 890 891 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 892 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 893 894 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 895 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 896 897 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 898 899 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 900 ((VALUE) == SAI_LAST_SENT_VALUE)) 901 902 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 903 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 904 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 905 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 906 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 907 908 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 909 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 910 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 911 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 912 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 913 914 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 915 ((STATE) == SAI_OUTPUT_RELEASED)) 916 917 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 918 ((MODE) == SAI_STEREOMODE)) 919 920 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 921 922 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 923 924 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 925 ((SIZE) == SAI_SLOTSIZE_16B) || \ 926 ((SIZE) == SAI_SLOTSIZE_32B)) 927 928 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 929 930 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 931 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 932 933 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 934 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 935 936 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 937 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 938 939 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 63U) 940 941 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 942 943 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 944 945 /** 946 * @} 947 */ 948 949 /* Private functions ---------------------------------------------------------*/ 950 /** @defgroup SAI_Private_Functions SAI Private Functions 951 * @{ 952 */ 953 954 /** 955 * @} 956 */ 957 958 /** 959 * @} 960 */ 961 962 /** 963 * @} 964 */ 965 966 #endif /* SAI1 */ 967 968 #ifdef __cplusplus 969 } 970 #endif 971 972 #endif /* STM32H5xx_HAL_SAI_H */ 973
