1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_pwr_ex.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_PWR_EX_H 21 #define STM32H5xx_HAL_PWR_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup PWREx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup PWREx_Exported_Types PWR Extended Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief PWREx AVD configuration structure definition 46 */ 47 typedef struct 48 { 49 uint32_t AVDLevel; /*!< AVDLevel: Specifies the AVD detection level. This 50 parameter can be a value of @ref 51 PWREx_AVD_detection_level 52 */ 53 54 uint32_t Mode; /*!< Mode: Specifies the EXTI operating mode for the AVD 55 event. This parameter can be a value of @ref 56 PWREx_AVD_Mode. 57 */ 58 } PWREx_AVDTypeDef; 59 60 /** 61 * @brief PWREx Wakeup pin configuration structure definition 62 */ 63 typedef struct 64 { 65 uint32_t WakeUpPin; /*!< WakeUpPin: Specifies the Wake-Up pin to be enabled. 66 This parameter can be a value of @ref 67 PWREx_WakeUp_Pins 68 */ 69 70 uint32_t PinPolarity; /*!< PinPolarity: Specifies the Wake-Up pin polarity. 71 This parameter can be a value of @ref 72 PWREx_PIN_Polarity 73 */ 74 75 uint32_t PinPull; /*!< PinPull: Specifies the Wake-Up pin pull. This 76 parameter can be a value of @ref 77 PWREx_PIN_Pull 78 */ 79 } PWREx_WakeupPinTypeDef; 80 /** 81 * @} 82 */ 83 84 /* Exported constants --------------------------------------------------------*/ 85 86 /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants 87 * @{ 88 */ 89 90 /** @defgroup PWREx_Supply_configuration PWREx Supply configuration 91 * @{ 92 */ 93 #define PWR_EXTERNAL_SOURCE_SUPPLY PWR_SCCR_BYPASS /*!< The SMPS disabled and the LDO Bypass. The Core domains 94 are supplied from an external source */ 95 96 #if defined (SMPS) 97 #define PWR_SUPPLY_CONFIG_MASK (PWR_SCCR_SMPSEN | PWR_SCCR_LDOEN | PWR_SCCR_BYPASS) 98 #else 99 #define PWR_SUPPLY_CONFIG_MASK (PWR_SCCR_LDOEN | PWR_SCCR_BYPASS) 100 #endif /* defined (SMPS) */ 101 /** 102 * @} 103 */ 104 105 /** @defgroup PWREx_PIN_Polarity PWREx Pin Polarity configuration 106 * @{ 107 */ 108 #define PWR_PIN_POLARITY_HIGH (0x00000000U) 109 #define PWR_PIN_POLARITY_LOW (0x00000001U) 110 /** 111 * @} 112 */ 113 114 /** @defgroup PWREx_PIN_Pull PWREx Pin Pull configuration 115 * @{ 116 */ 117 #define PWR_PIN_NO_PULL (0x00000000U) 118 #define PWR_PIN_PULL_UP (0x00000001U) 119 #define PWR_PIN_PULL_DOWN (0x00000002U) 120 /** 121 * @} 122 */ 123 124 /** @defgroup PWREx_AVD_detection_level PWREx AVD detection level 125 * @{ 126 */ 127 #define PWR_AVDLEVEL_0 (0x00000000U) /*!< Analog voltage detector level 0 selection : 1V7 */ 128 #define PWR_AVDLEVEL_1 PWR_VMCR_ALS_0 /*!< Analog voltage detector level 1 selection : 2V1 */ 129 #define PWR_AVDLEVEL_2 PWR_VMCR_ALS_1 /*!< Analog voltage detector level 2 selection : 2V5 */ 130 #define PWR_AVDLEVEL_3 PWR_VMCR_ALS /*!< Analog voltage detector level 3 selection : 2V8 */ 131 /** 132 * @} 133 */ 134 135 /** @defgroup PWREx_AVD_Mode PWREx AVD Mode 136 * @{ 137 */ 138 #define PWR_AVD_MODE_NORMAL (0x00000000U)/*!< Basic mode is used */ 139 #define PWR_AVD_MODE_IT_RISING (0x00010001U)/*!< External Interrupt Mode with Rising edge trigger detection*/ 140 #define PWR_AVD_MODE_IT_FALLING (0x00010002U)/*!< External Interrupt Mode with 141 Falling edge trigger detection */ 142 #define PWR_AVD_MODE_IT_RISING_FALLING (0x00010003U)/*!< External Interrupt Mode with 143 Rising/Falling edge trigger detection */ 144 #define PWR_AVD_MODE_EVENT_RISING (0x00020001U)/*!< Event Mode with Rising edge trigger detection */ 145 #define PWR_AVD_MODE_EVENT_FALLING (0x00020002U)/*!< Event Mode with Falling edge trigger detection */ 146 #define PWR_AVD_MODE_EVENT_RISING_FALLING (0x00020003U)/*!< Event Mode with Rising/Falling edge trigger detection */ 147 /** 148 * @} 149 */ 150 151 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale 152 * @{ 153 */ 154 #define PWR_REGULATOR_VOLTAGE_SCALE0 PWR_VOSCR_VOS /*!< Voltage scaling range 0 */ 155 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_VOSCR_VOS_1 /*!< Voltage scaling range 1 */ 156 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_VOSCR_VOS_0 /*!< Voltage scaling range 2 */ 157 #define PWR_REGULATOR_VOLTAGE_SCALE3 (0U) /*!< Voltage scaling range 3 */ 158 /** 159 * @} 160 */ 161 162 /** @defgroup PWREx_System_Stop_Mode_Voltage_Scale PWREx System Stop Mode Voltage Scale 163 * @{ 164 */ 165 #define PWR_REGULATOR_SVOS_SCALE5 (PWR_PMCR_SVOS_0) 166 #define PWR_REGULATOR_SVOS_SCALE4 (PWR_PMCR_SVOS_1) 167 #define PWR_REGULATOR_SVOS_SCALE3 (PWR_PMCR_SVOS_0 | PWR_PMCR_SVOS_1) 168 /** 169 * @} 170 */ 171 172 /** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR Extended Battery Charging Resistor Selection 173 * @{ 174 */ 175 #define PWR_BATTERY_CHARGING_RESISTOR_5 (0U) /*!< VBAT charging through a 5 kOhms resistor */ 176 #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_BDCR_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */ 177 /** 178 * @} 179 */ 180 181 /** @defgroup PWREx_Memory_Shut_Off Memory shut-off block selection 182 * @{ 183 */ 184 #define PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO /*!< RAM1 shut-off control in Stop mode */ 185 #if defined (PWR_PMCR_SRAM2_16SO) 186 #define PWR_RAM2_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16SO /*!< RAM2 16k byte shut-off control in Stop mode */ 187 #define PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO /*!< RAM2 48k byte shut-off control in Stop mode */ 188 #elif defined (PWR_PMCR_SRAM2_16LSO) 189 #define PWR_RAM2_LOW_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16LSO /*!< RAM2 low 16k byte shut-off control in Stop mode */ 190 #define PWR_RAM2_HIGH_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16HSO /*!< RAM2 High 16k byte shut-off control in Stop mode */ 191 #define PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO /*!< RAM2 48k byte shut-off control in Stop mode */ 192 #else 193 #define PWR_RAM2_MEMORY_BLOCK PWR_PMCR_SRAM2SO /*!< RAM2 shut-off control in Stop mode */ 194 #endif /* PWR_PMCR_SRAM2_16SO */ 195 #if defined (PWR_PMCR_SRAM3SO) 196 #define PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO /*!< RAM3 shut-off control in Stop mode */ 197 #endif /* PWR_PMCR_SRAM3SO */ 198 #if defined (PWR_PMCR_ETHERNETSO) 199 #define PWR_ETHERNET_MEMORY_BLOCK PWR_PMCR_ETHERNETSO /*!< Ethernet shut-off control in Stop mode */ 200 #endif /* PWR_PMCR_ETHERNETSO */ 201 202 /** 203 * @} 204 */ 205 206 /** @defgroup PWREx_AVD_EXTI_Line PWREx AVD EXTI Line 16 207 * @{ 208 */ 209 #define PWR_EXTI_LINE_AVD EXTI_IMR1_IM16 /*!< External interrupt line 16 210 Connected to the AVD EXTI Line */ 211 /** 212 * @} 213 */ 214 215 /** 216 * @} 217 */ 218 219 /* Exported macros -----------------------------------------------------------*/ 220 221 /** @defgroup PWREx_Exported_Macros PWR Extended Exported Macros 222 * @{ 223 */ 224 225 /** 226 * @brief Enable the AVD EXTI Line 16. 227 * @retval None. 228 */ 229 #define __HAL_PWR_AVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD) 230 231 /** 232 * @brief Disable the AVD EXTI Line 16 233 * @retval None. 234 */ 235 #define __HAL_PWR_AVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD) 236 237 /** 238 * @brief Enable event on AVD EXTI Line 16. 239 * @retval None. 240 */ 241 #define __HAL_PWR_AVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD) 242 243 /** 244 * @brief Disable event on AVD EXTI Line 16. 245 * @retval None. 246 */ 247 #define __HAL_PWR_AVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD) 248 249 /** 250 * @brief Enable the AVD Extended Interrupt Rising Trigger. 251 * @retval None. 252 */ 253 #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD) 254 255 /** 256 * @brief Disable the AVD Extended Interrupt Rising Trigger. 257 * @retval None. 258 */ 259 #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD) 260 261 /** 262 * @brief Enable the AVD Extended Interrupt Falling Trigger. 263 * @retval None. 264 */ 265 #define __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD) 266 267 /** 268 * @brief Disable the AVD Extended Interrupt Falling Trigger. 269 * @retval None. 270 */ 271 #define __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD) 272 273 /** 274 * @brief Enable the AVD Extended Interrupt Rising and Falling Trigger. 275 * @retval None. 276 */ 277 #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 278 do { \ 279 __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE(); \ 280 __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE(); \ 281 } while(0); 282 283 /** 284 * @brief Disable the AVD Extended Interrupt Rising & Falling Trigger. 285 * @retval None. 286 */ 287 #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 288 do { \ 289 __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE(); \ 290 __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE(); \ 291 } while(0); 292 293 /** 294 * @brief Check whether the specified AVD EXTI Rising interrupt flag is set or not. 295 * @retval EXTI AVD Line Status. 296 */ 297 298 #define __HAL_PWR_PVD_AVD_EXTI_GET_RISING_FLAG() ((READ_BIT(EXTI->RPR1, PWR_EXTI_LINE_AVD)\ 299 == PWR_EXTI_LINE_AVD) ? 1UL : 0UL) 300 301 /** 302 * @brief Check whether the specified AVD EXTI Falling interrupt flag is set or not. 303 * @retval EXTI AVD Line Status. 304 */ 305 306 #define __HAL_PWR_PVD_AVD_EXTI_GET_FALLING_FLAG() ((READ_BIT(EXTI->FPR1, PWR_EXTI_LINE_AVD)\ 307 == PWR_EXTI_LINE_AVD) ? 1UL : 0UL) 308 309 /** 310 * @brief Clear the AVD EXTI flag. 311 * @retval None. 312 */ 313 #define __HAL_PWR_PVD_AVD_EXTI_CLEAR_FLAG() \ 314 do \ 315 { \ 316 WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_AVD); \ 317 WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_AVD); \ 318 } while(0) 319 320 /** 321 * @brief Generates a Software interrupt on AVD EXTI line. 322 * @retval None. 323 */ 324 #define __HAL_PWR_AVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_AVD) 325 326 /** 327 * @brief Configure the main internal regulator output voltage. 328 * @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but 329 * doesn't check whether or not VOSREADY flag is set. User may resort 330 * to __HAL_PWR_GET_FLAG() macro to check VOSF bit state. 331 * @param __REGULATOR__ : Specifies the regulator output voltage to achieve a 332 * tradeoff between performance and power consumption. 333 * This parameter can be one of the following values : 334 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE0 : Regulator voltage output scale 0. 335 * Provides a typical output voltage at 1.2 V. 336 * Used when system clock frequency is up to 160 MHz. 337 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 : Regulator voltage output scale 1. 338 * Provides a typical output voltage at 1.1 V. 339 * Used when system clock frequency is up to 100 MHz. 340 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 : Regulator voltage output scale 2. 341 * Provides a typical output voltage at 1.0 V. 342 * Used when system clock frequency is up to 50 MHz. 343 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE3 : Regulator voltage output scale 3. 344 * Provides a typical output voltage at 0.9 V. 345 * Used when system clock frequency is up to 24 MHz. 346 * @retval None. 347 */ 348 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) \ 349 do \ 350 { \ 351 __IO uint32_t tmpreg; \ 352 MODIFY_REG(PWR->VOSCR, PWR_VOSCR_VOS, (__REGULATOR__)); \ 353 /* Delay after an RCC peripheral clock enabling */ \ 354 tmpreg = READ_BIT(PWR->VOSCR, PWR_VOSCR_VOS); \ 355 UNUSED(tmpreg); \ 356 } while(0) 357 /** 358 * @} 359 */ 360 361 /* Private constants ---------------------------------------------------------*/ 362 363 /** @defgroup PWREx_Private_Constants PWR Extended Private Constants 364 * @{ 365 */ 366 367 /** @defgroup PWREx_AVD_Mode_Mask PWR Extended AVD Mode Mask 368 * @{ 369 */ 370 #define AVD_MODE_IT (0x00010000U) 371 #define AVD_MODE_EVT (0x00020000U) 372 #define AVD_RISING_EDGE (0x00000001U) 373 #define AVD_FALLING_EDGE (0x00000002U) 374 #define AVD_RISING_FALLING_EDGE (0x00000003U) 375 /** 376 * @} 377 */ 378 379 /** 380 * @} 381 */ 382 383 /* Private macros --------------------------------------------------------*/ 384 385 /** @defgroup PWREx_Private_Macros PWR Extended Private Macros 386 * @{ 387 */ 388 /* Check PWR regulator configuration parameter */ 389 #define IS_PWR_SUPPLY(PWR_SOURCE) ((PWR_SOURCE) == PWR_EXTERNAL_SOURCE_SUPPLY) 390 391 /* Check wake up pin polarity parameter */ 392 #define IS_PWR_WAKEUP_PIN_POLARITY(POLARITY) (((POLARITY) == PWR_PIN_POLARITY_HIGH) ||\ 393 ((POLARITY) == PWR_PIN_POLARITY_LOW)) 394 395 /* Check wake up pin pull configuration parameter */ 396 #define IS_PWR_WAKEUP_PIN_PULL(PULL) (((PULL) == PWR_PIN_NO_PULL) ||\ 397 ((PULL) == PWR_PIN_PULL_UP) ||\ 398 ((PULL) == PWR_PIN_PULL_DOWN)) 399 400 /* Check wake up flag parameter */ 401 #define IS_PWR_WAKEUP_FLAG(FLAG) (((FLAG) == PWR_WAKEUP_FLAG1) ||\ 402 ((FLAG) == PWR_WAKEUP_FLAG2) ||\ 403 ((FLAG) == PWR_WAKEUP_FLAG3) ||\ 404 ((FLAG) == PWR_WAKEUP_FLAG4) ||\ 405 ((FLAG) == PWR_WAKEUP_FLAG5) ||\ 406 ((FLAG) == PWR_WAKEUP_FLAG6) ||\ 407 ((FLAG) == PWR_WAKEUP_FLAG_ALL)) 408 409 /* Voltage scaling range check macro */ 410 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE0) ||\ 411 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) ||\ 412 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) ||\ 413 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) 414 415 /* Check PWR regulator configuration in STOP mode parameter */ 416 #define IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE3) ||\ 417 ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE4) ||\ 418 ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE5)) 419 420 /* Battery charging resistor selection check macro */ 421 #define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\ 422 ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5)) 423 424 /* Check memory block parameter */ 425 #if defined (PWR_PMCR_SRAM2_16SO) 426 #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_ETHERNET_MEMORY_BLOCK) || \ 427 ((BLOCK) == PWR_RAM3_MEMORY_BLOCK) || \ 428 ((BLOCK) == PWR_RAM2_16_MEMORY_BLOCK) || \ 429 ((BLOCK) == PWR_RAM2_48_MEMORY_BLOCK) || \ 430 ((BLOCK) == PWR_RAM1_MEMORY_BLOCK)) 431 #elif defined (PWR_PMCR_SRAM2_16LSO) 432 #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_RAM3_MEMORY_BLOCK) || \ 433 ((BLOCK) == PWR_RAM2_LOW_16_MEMORY_BLOCK) || \ 434 ((BLOCK) == PWR_RAM2_HIGH_16_MEMORY_BLOCK) || \ 435 ((BLOCK) == PWR_RAM2_48_MEMORY_BLOCK) || \ 436 ((BLOCK) == PWR_RAM1_MEMORY_BLOCK)) 437 #else 438 #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_RAM2_MEMORY_BLOCK) || \ 439 ((BLOCK) == PWR_RAM1_MEMORY_BLOCK)) 440 #endif /* PWR_PMCR_SRAM2_16SO */ 441 442 /* Check wake up flag parameter */ 443 #define IS_PWR_AVD_LEVEL(LEVEL) (((LEVEL) == PWR_AVDLEVEL_0) ||\ 444 ((LEVEL) == PWR_AVDLEVEL_1) ||\ 445 ((LEVEL) == PWR_AVDLEVEL_2) ||\ 446 ((LEVEL) == PWR_AVDLEVEL_3)) 447 448 /* Check AVD mode parameter */ 449 #define IS_PWR_AVD_MODE(MODE) (((MODE) == PWR_AVD_MODE_IT_RISING) ||\ 450 ((MODE) == PWR_AVD_MODE_IT_FALLING) ||\ 451 ((MODE) == PWR_AVD_MODE_IT_RISING_FALLING) ||\ 452 ((MODE) == PWR_AVD_MODE_EVENT_RISING) ||\ 453 ((MODE) == PWR_AVD_MODE_EVENT_FALLING) ||\ 454 ((MODE) == PWR_AVD_MODE_NORMAL) ||\ 455 ((MODE) == PWR_AVD_MODE_EVENT_RISING_FALLING)) 456 /** 457 * @} 458 */ 459 460 /** @addtogroup PWREx_Exported_Functions 461 * @{ 462 */ 463 464 /** @addtogroup PWREx_Exported_Functions_Group1 465 * @{ 466 */ 467 HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource); 468 uint32_t HAL_PWREx_GetSupplyConfig(void); 469 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling); 470 uint32_t HAL_PWREx_GetVoltageRange(void); 471 HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling); 472 uint32_t HAL_PWREx_GetStopModeVoltageRange(void); 473 474 /** 475 * @} 476 */ 477 478 /** @addtogroup PWREx_Exported_Functions_Group2 479 * @{ 480 */ 481 void HAL_PWREx_ConfigAVD(const PWREx_AVDTypeDef *sConfigAVD); 482 void HAL_PWREx_EnableAVD(void); 483 void HAL_PWREx_DisableAVD(void); 484 #if defined (PWR_USBSCR_USB33DEN) 485 void HAL_PWREx_EnableUSBVoltageDetector(void); 486 void HAL_PWREx_DisableUSBVoltageDetector(void); 487 void HAL_PWREx_EnableVddUSB(void); 488 void HAL_PWREx_DisableVddUSB(void); 489 #endif /* PWR_USBSCR_USB33DEN */ 490 void HAL_PWREx_EnableMonitoring(void); 491 void HAL_PWREx_DisableMonitoring(void); 492 void HAL_PWREx_EnableUCPDStandbyMode(void); 493 void HAL_PWREx_DisableUCPDStandbyMode(void); 494 void HAL_PWREx_EnableUCPDDeadBattery(void); 495 void HAL_PWREx_DisableUCPDDeadBattery(void); 496 void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue); 497 void HAL_PWREx_DisableBatteryCharging(void); 498 void HAL_PWREx_EnableAnalogBooster(void); 499 void HAL_PWREx_DisableAnalogBooster(void); 500 void HAL_PWREx_PVD_AVD_IRQHandler(void); 501 void HAL_PWREx_PVD_AVD_Rising_Callback(void); 502 void HAL_PWREx_PVD_AVD_Falling_Callback(void); 503 504 /** 505 * @} 506 */ 507 508 /** @addtogroup PWREx_Exported_Functions_Group3 509 * @{ 510 */ 511 512 void HAL_PWREx_EnableWakeUpPin(const PWREx_WakeupPinTypeDef *sPinParams); 513 void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPinx); 514 515 /** 516 * @} 517 */ 518 519 /** @addtogroup PWREx_Exported_Functions_Group4 520 * @{ 521 */ 522 void HAL_PWREx_EnableFlashPowerDown(void); 523 void HAL_PWREx_DisableFlashPowerDown(void); 524 void HAL_PWREx_EnableMemoryShutOff(uint32_t MemoryBlock); 525 void HAL_PWREx_DisableMemoryShutOff(uint32_t MemoryBlock); 526 HAL_StatusTypeDef HAL_PWREx_EnableBkupRAMRetention(void); 527 void HAL_PWREx_DisableBkupRAMRetention(void); 528 529 /** 530 * @} 531 */ 532 533 /** @addtogroup PWREx_Exported_Functions_Group5 534 * @{ 535 */ 536 void HAL_PWREx_EnableStandbyIORetention(void); 537 void HAL_PWREx_DisableStandbyIORetention(void); 538 void HAL_PWREx_EnableStandbyJTAGIORetention(void); 539 void HAL_PWREx_DisableStandbyJTAGIORetention(void); 540 541 /** 542 * @} 543 */ 544 545 /** 546 * @} 547 */ 548 549 /** 550 * @} 551 */ 552 553 /** 554 * @} 555 */ 556 557 #ifdef __cplusplus 558 } 559 #endif /* __cplusplus */ 560 561 562 #endif /* STM32H5xx_HAL_PWR_EX_H */ 563
