1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_pssi.h 4 * @author MCD Application Team 5 * @brief Header file of PSSI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_PSSI_H 21 #define STM32H5xx_HAL_PSSI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 #if defined(PSSI) 34 /** @addtogroup PSSI PSSI 35 * @brief PSSI HAL module driver 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup PSSI_Exported_Types PSSI Exported Types 41 * @{ 42 */ 43 44 45 /** 46 * @brief PSSI Init structure definition 47 */ 48 typedef struct 49 { 50 uint32_t DataWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */ 51 uint32_t BusWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */ 52 uint32_t ControlSignal; /* !< Configures Data enable and Data ready */ 53 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity */ 54 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity */ 55 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity */ 56 57 } PSSI_InitTypeDef; 58 59 60 /** 61 * @brief HAL PSSI State structures definition 62 */ 63 typedef enum 64 { 65 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */ 66 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */ 67 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */ 68 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */ 69 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */ 70 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */ 71 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */ 72 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */ 73 74 } HAL_PSSI_StateTypeDef; 75 76 /** 77 * @brief PSSI handle Structure definition 78 */ 79 typedef struct __PSSI_HandleTypeDef 80 { 81 PSSI_TypeDef *Instance; /*!< PSSI register base address. */ 82 PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure. */ 83 uint32_t *pBuffPtr; /*!< PSSI Data buffer. */ 84 uint32_t XferCount; /*!< PSSI transfer count */ 85 uint32_t XferSize; /*!< PSSI transfer size */ 86 #if defined(HAL_DMA_MODULE_ENABLED) 87 DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */ 88 DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */ 89 #endif /*HAL_DMA_MODULE_ENABLED*/ 90 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 91 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 92 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback. */ 93 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback. */ 94 95 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback. */ 96 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback. */ 97 98 HAL_LockTypeDef Lock; /*!< PSSI lock. */ 99 __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state. */ 100 __IO uint32_t ErrorCode; /*!< PSSI error code. */ 101 102 } PSSI_HandleTypeDef; 103 104 105 /** 106 * @brief HAL PSSI Callback pointer definition 107 */ 108 typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */ 109 110 /** 111 * @brief HAL PSSI Callback ID enumeration definition 112 */ 113 typedef enum 114 { 115 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */ 116 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */ 117 HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */ 118 HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */ 119 120 HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */ 121 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */ 122 123 } HAL_PSSI_CallbackIDTypeDef; 124 125 126 /** 127 * @} 128 */ 129 130 /* Exported constants --------------------------------------------------------*/ 131 /** @defgroup PSSI_Exported_Constants PSSI Exported Constants 132 * @{ 133 */ 134 135 /** @defgroup PSSI_Error_Code PSSI Error Code 136 * @{ 137 */ 138 #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */ 139 #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */ 140 #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */ 141 #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */ 142 #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */ 143 #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */ 144 #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */ 145 146 147 /** 148 * @} 149 */ 150 151 /** @defgroup PSSI_DATA_WIDTH PSSI Data Width 152 * @{ 153 */ 154 155 #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */ 156 #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */ 157 #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */ 158 /** 159 * @} 160 */ 161 162 /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width 163 * @{ 164 */ 165 166 #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */ 167 #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */ 168 /** 169 * @} 170 */ 171 /** @defgroup PSSI_MODE PSSI mode 172 * @{ 173 */ 174 #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */ 175 #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */ 176 /** 177 * @} 178 */ 179 180 /** @defgroup ControlSignal_Configuration ControlSignal Configuration 181 * @{ 182 */ 183 #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */ 184 #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */ 185 #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */ 186 #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */ 187 #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */ 188 #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */ 189 #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */ 190 #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */ 191 192 /** 193 * @} 194 */ 195 196 197 /** @defgroup Data_Enable_Polarity Data Enable Polarity 198 * @{ 199 */ 200 #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 201 #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */ 202 /** 203 * @} 204 */ 205 /** @defgroup Reday_Polarity Reday Polarity 206 * @{ 207 */ 208 #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 209 #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */ 210 /** 211 * @} 212 */ 213 214 /** @defgroup Clock_Polarity Clock Polarity 215 * @{ 216 */ 217 #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Fallling Edge */ 218 #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */ 219 220 221 /** 222 * @} 223 */ 224 225 226 /** @defgroup PSSI_DEFINITION PSSI definitions 227 * @{ 228 */ 229 230 #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */ 231 #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */ 232 233 #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */ 234 #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */ 235 236 #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */ 237 #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disable*/ 238 239 #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */ 240 #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */ 241 242 #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag */ 243 #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/ 244 245 246 247 /** 248 * @} 249 */ 250 251 /** @defgroup PSSI_Interrupts PSSI Interrupts 252 * @{ 253 */ 254 255 #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */ 256 #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */ 257 #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */ 258 /** 259 * @} 260 */ 261 262 263 264 /** 265 * @} 266 */ 267 /* Exported macros ------------------------------------------------------------*/ 268 /** @defgroup PSSI_Exported_Macros PSSI Exported Macros 269 * @{ 270 */ 271 272 /** @brief Reset PSSI handle state 273 * @param __HANDLE__ specifies the PSSI handle. 274 * @retval None 275 */ 276 277 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 278 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\ 279 (__HANDLE__)->MspInitCallback = NULL; \ 280 (__HANDLE__)->MspDeInitCallback = NULL; \ 281 }while(0) 282 283 284 /** 285 * @brief Enable the PSSI. 286 * @param __HANDLE__ PSSI handle 287 * @retval None. 288 */ 289 #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE) 290 /** 291 * @brief Disable the PSSI. 292 * @param __HANDLE__ PSSI handle 293 * @retval None. 294 */ 295 #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE)) 296 297 /* PSSI pripheral STATUS */ 298 /** 299 * @brief Get the PSSI pending flags. 300 * @param __HANDLE__ PSSI handle 301 * @param __FLAG__ flag to check. 302 * This parameter can be any combination of the following values: 303 * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte 304 * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes 305 * @retval The state of FLAG. 306 */ 307 308 #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__)) 309 310 311 312 /* Interrupt & Flag management */ 313 /** 314 * @brief Get the PSSI pending flags. 315 * @param __HANDLE__ PSSI handle 316 * @param __FLAG__ flag to check. 317 * This parameter can be any combination of the following values: 318 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 319 * @retval The state of FLAG. 320 */ 321 #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__)) 322 323 /** 324 * @brief Clear the PSSI pending flags. 325 * @param __HANDLE__ PSSI handle 326 * @param __FLAG__ specifies the flag to clear. 327 * This parameter can be any combination of the following values: 328 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 329 * @retval None 330 */ 331 #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 332 333 /** 334 * @brief Enable the specified PSSI interrupts. 335 * @param __HANDLE__ PSSI handle 336 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled. 337 * This parameter can be any combination of the following values: 338 * @arg PSSI_FLAG_OVR_RIS: Configuration error mask 339 * @retval None 340 */ 341 #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 342 343 /** 344 * @brief Disable the specified PSSI interrupts. 345 * @param __HANDLE__ PSSI handle 346 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled. 347 * This parameter can be any combination of the following values: 348 * @arg PSSI_IT_OVR_IE: Configuration error mask 349 * @retval None 350 */ 351 #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__)) 352 353 /** 354 * @brief Check whether the specified PSSI interrupt source is enabled or not. 355 * @param __HANDLE__ PSSI handle 356 * @param __INTERRUPT__ specifies the PSSI interrupt source to check. 357 * This parameter can be one of the following values: 358 * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask 359 * @retval The state of INTERRUPT source. 360 */ 361 #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) 362 363 364 /** 365 * @brief Check whether the PSSI Control signal is valid. 366 * @param __CONTROL__ Control signals configuration 367 * @retval Valid or not. 368 */ 369 370 #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \ 371 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \ 372 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \ 373 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \ 374 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \ 375 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \ 376 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \ 377 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE )) 378 379 380 381 /** 382 * @brief Check whether the PSSI Bus Width is valid. 383 * @param __BUSWIDTH__ PSSI Bush width 384 * @retval Valid or not. 385 */ 386 387 #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \ 388 ((__BUSWIDTH__) == HAL_PSSI_16LINES )) 389 390 /** 391 392 * @brief Check whether the PSSI Clock Polarity is valid. 393 * @param __CLOCKPOL__ PSSI Clock Polarity 394 * @retval Valid or not. 395 */ 396 397 #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \ 398 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE )) 399 400 401 /** 402 * @brief Check whether the PSSI Data Enable Polarity is valid. 403 * @param __DEPOL__ PSSI DE Polarity 404 * @retval Valid or not. 405 */ 406 407 #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \ 408 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH )) 409 410 /** 411 * @brief Check whether the PSSI Ready Polarity is valid. 412 * @param __RDYPOL__ PSSI RDY Polarity 413 * @retval Valid or not. 414 */ 415 416 #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \ 417 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH )) 418 /** 419 * @} 420 */ 421 422 423 /* Exported functions --------------------------------------------------------*/ 424 /** @addtogroup PSSI_Exported_Functions PSSI Exported Functions 425 * @{ 426 */ 427 428 /** @addtogroup PSSI_Exported_Functions_Group1 Initialization and de-initialization functions 429 * @{ 430 */ 431 432 /* Initialization and de-initialization functions *******************************/ 433 HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi); 434 HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi); 435 void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi); 436 void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi); 437 /* Callbacks Register/UnRegister functions ***********************************/ 438 439 HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, 440 pPSSI_CallbackTypeDef pCallback); 441 HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID); 442 443 444 /** 445 * @} 446 */ 447 448 449 /** @addtogroup PSSI_Exported_Functions_Group2 Input and Output operation functions 450 * @{ 451 */ 452 453 /* IO operation functions *******************************************************/ 454 HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 455 HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 456 #if defined(HAL_DMA_MODULE_ENABLED) 457 HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 458 HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 459 HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi); 460 #endif /*HAL_DMA_MODULE_ENABLED*/ 461 462 /** 463 * @} 464 */ 465 466 /** @addtogroup PSSI_Exported_Functions_Group3 Peripheral State and Error functions 467 * @{ 468 */ 469 470 /* Peripheral State functions ***************************************************/ 471 HAL_PSSI_StateTypeDef HAL_PSSI_GetState(PSSI_HandleTypeDef *hpssi); 472 uint32_t HAL_PSSI_GetError(PSSI_HandleTypeDef *hpssi); 473 474 /** 475 * @} 476 */ 477 478 /** @addtogroup PSSI_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 479 * @{ 480 */ 481 482 void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi); 483 void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi); 484 void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi); 485 void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi); 486 void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi); 487 488 /** 489 * @} 490 */ 491 492 493 494 /** 495 * @} 496 */ 497 498 /* Private constants ---------------------------------------------------------*/ 499 500 501 /* Private macros ------------------------------------------------------------*/ 502 503 504 /** 505 * @} 506 */ 507 #endif /* PSSI */ 508 509 /** 510 * @} 511 */ 512 513 514 #ifdef __cplusplus 515 } 516 #endif 517 518 #endif /* STM32H5xx_HAL_PSSI_H */ 519 520
