1 /**
2 ******************************************************************************
3 * @file stm32h5xx_hal_pcd.h
4 * @author MCD Application Team
5 * @brief Header file of PCD HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2023 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H5xx_HAL_PCD_H
21 #define STM32H5xx_HAL_PCD_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h5xx_ll_usb.h"
29
30 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) || defined (USB_DRD_FS)
31
32 /** @addtogroup STM32H5xx_HAL_Driver
33 * @{
34 */
35
36 /** @addtogroup PCD
37 * @{
38 */
39
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup PCD_Exported_Types PCD Exported Types
42 * @{
43 */
44
45 /**
46 * @brief PCD State structure definition
47 */
48 typedef enum
49 {
50 HAL_PCD_STATE_RESET = 0x00,
51 HAL_PCD_STATE_READY = 0x01,
52 HAL_PCD_STATE_ERROR = 0x02,
53 HAL_PCD_STATE_BUSY = 0x03,
54 HAL_PCD_STATE_TIMEOUT = 0x04
55 } PCD_StateTypeDef;
56
57 /* Device LPM suspend state */
58 typedef enum
59 {
60 LPM_L0 = 0x00, /* on */
61 LPM_L1 = 0x01, /* LPM L1 sleep */
62 LPM_L2 = 0x02, /* suspend */
63 LPM_L3 = 0x03, /* off */
64 } PCD_LPM_StateTypeDef;
65
66 typedef enum
67 {
68 PCD_LPM_L0_ACTIVE = 0x00, /* on */
69 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
70 } PCD_LPM_MsgTypeDef;
71
72 typedef enum
73 {
74 PCD_BCD_ERROR = 0xFF,
75 PCD_BCD_CONTACT_DETECTION = 0xFE,
76 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
77 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
78 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
79 PCD_BCD_DISCOVERY_COMPLETED = 0x00,
80
81 } PCD_BCD_MsgTypeDef;
82
83 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
84 typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
85 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
86 typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
87 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
88 #if defined (USB_DRD_FS)
89 typedef USB_DRD_TypeDef PCD_TypeDef;
90 typedef USB_DRD_CfgTypeDef PCD_InitTypeDef;
91 typedef USB_DRD_EPTypeDef PCD_EPTypeDef;
92 #endif /* defined (USB_DRD_FS) */
93
94 /**
95 * @brief PCD Handle Structure definition
96 */
97 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
98 typedef struct __PCD_HandleTypeDef
99 #else
100 typedef struct
101 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
102 {
103 PCD_TypeDef *Instance; /*!< Register base address */
104 PCD_InitTypeDef Init; /*!< PCD required parameters */
105 __IO uint8_t USB_Address; /*!< USB Address */
106 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
107 PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
108 PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
109 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
110 #if defined (USB_DRD_FS)
111 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
112 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
113 #endif /* defined (USB_DRD_FS) */
114 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
115 __IO PCD_StateTypeDef State; /*!< PCD communication state */
116 __IO uint32_t ErrorCode; /*!< PCD Error code */
117 uint32_t Setup[12]; /*!< Setup packet buffer */
118 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
119 uint32_t BESL;
120 uint32_t FrameNumber; /*!< Store Current Frame number */
121
122
123 uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
124 This parameter can be set to ENABLE or DISABLE */
125
126 uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
127 This parameter can be set to ENABLE or DISABLE */
128 void *pData; /*!< Pointer to upper stack Handler */
129
130 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
131 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
132 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
133 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
134 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
135 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
136 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
137 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
138
139 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
140 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
141 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
142 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
143 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */
144 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */
145
146 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
147 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
148 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
149 } PCD_HandleTypeDef;
150
151 /**
152 * @}
153 */
154
155 /* Include PCD HAL Extended module */
156 #include "stm32h5xx_hal_pcd_ex.h"
157
158 /* Exported constants --------------------------------------------------------*/
159 /** @defgroup PCD_Exported_Constants PCD Exported Constants
160 * @{
161 */
162
163 /** @defgroup PCD_Speed PCD Speed
164 * @{
165 */
166 #define PCD_SPEED_HIGH USBD_HS_SPEED
167 #define PCD_SPEED_HIGH_IN_FULL USBD_HSINFS_SPEED
168 #define PCD_SPEED_FULL USBD_FS_SPEED
169 /**
170 * @}
171 */
172
173 /** @defgroup PCD_PHY_Module PCD PHY Module
174 * @{
175 */
176 #define PCD_PHY_ULPI 1U
177 #define PCD_PHY_EMBEDDED 2U
178 #define PCD_PHY_UTMI 3U
179 /**
180 * @}
181 */
182
183 /** @defgroup PCD_Error_Code_definition PCD Error Code definition
184 * @brief PCD Error Code definition
185 * @{
186 */
187 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
188 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
189 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
190
191 /**
192 * @}
193 */
194
195 /**
196 * @}
197 */
198
199 /* Exported macros -----------------------------------------------------------*/
200 /** @defgroup PCD_Exported_Macros PCD Exported Macros
201 * @brief macros to handle interrupts and specific clock configurations
202 * @{
203 */
204 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
205 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
206
207 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
208 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
209
210 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
211 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
212 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
213
214 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
215 *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
216
217 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \
218 *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
219
220 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \
221 ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
222
223 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
224
225 #if defined (USB_DRD_FS)
226 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
227 &= (uint16_t)(~(__INTERRUPT__)))
228 #endif /* defined (USB_DRD_FS) */
229
230 /**
231 * @}
232 */
233
234 /* Exported functions --------------------------------------------------------*/
235 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
236 * @{
237 */
238
239 /* Initialization/de-initialization functions ********************************/
240 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
241 * @{
242 */
243 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
244 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
245 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
246 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
247
248 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
249 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
250 * @brief HAL USB OTG PCD Callback ID enumeration definition
251 * @{
252 */
253 typedef enum
254 {
255 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
256 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
257 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
258 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
259 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
260 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
261 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
262
263 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
264 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
265
266 } HAL_PCD_CallbackIDTypeDef;
267 /**
268 * @}
269 */
270
271 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
272 * @brief HAL USB OTG PCD Callback pointer definition
273 * @{
274 */
275
276 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
277 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
278 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
279 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
280 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
281 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */
282 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */
283
284 /**
285 * @}
286 */
287
288 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
289 pPCD_CallbackTypeDef pCallback);
290
291 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
292
293 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
294 pPCD_DataOutStageCallbackTypeDef pCallback);
295
296 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
297
298 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
299 pPCD_DataInStageCallbackTypeDef pCallback);
300
301 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
302
303 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
304 pPCD_IsoOutIncpltCallbackTypeDef pCallback);
305
306 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
307
308 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
309 pPCD_IsoInIncpltCallbackTypeDef pCallback);
310
311 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
312
313 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
314 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
315
316 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
317 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
318 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
319 /**
320 * @}
321 */
322
323 /* I/O operation functions ***************************************************/
324 /* Non-Blocking mode: Interrupt */
325 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
326 * @{
327 */
328 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
329 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
330 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
331
332 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
333 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
334 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
335 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
336 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
337 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
338 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
339
340 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
341 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
342 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
343 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
344 /**
345 * @}
346 */
347
348 /* Peripheral Control functions **********************************************/
349 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
350 * @{
351 */
352 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
353 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
354 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
355 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
356 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
357 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
358 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
359 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
360 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
361 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
362 HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
363 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
364 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
365 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
366 HAL_StatusTypeDef HAL_PCD_SetTestMode(const PCD_HandleTypeDef *hpcd, uint8_t testmode);
367 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
368
369 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
370 /**
371 * @}
372 */
373
374 /* Peripheral State functions ************************************************/
375 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
376 * @{
377 */
378 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
379 /**
380 * @}
381 */
382
383 /**
384 * @}
385 */
386
387 /* Private constants ---------------------------------------------------------*/
388 /** @defgroup PCD_Private_Constants PCD Private Constants
389 * @{
390 */
391 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
392 * @{
393 */
394 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
395 #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 15) /*!< USB FS EXTI Line WakeUp Interrupt */
396 #define USB_OTG_HS_WAKEUP_EXTI_LINE (0x1U << 28) /*!< USB HS EXTI Line WakeUp Interrupt */
397 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
398
399 #if defined (USB_DRD_FS)
400 #define USB_WAKEUP_EXTI_LINE (0x1U << 15) /*!< USB FS EXTI Line WakeUp Interrupt */
401 #endif /* defined (USB_DRD_FS) */
402
403 /**
404 * @}
405 */
406 #if defined (USB_DRD_FS)
407 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
408 * @{
409 */
410 #define PCD_EP0MPS_64 EP_MPS_64
411 #define PCD_EP0MPS_32 EP_MPS_32
412 #define PCD_EP0MPS_16 EP_MPS_16
413 #define PCD_EP0MPS_08 EP_MPS_8
414 /**
415 * @}
416 */
417
418 /** @defgroup PCD_ENDP PCD ENDP
419 * @{
420 */
421 #define PCD_ENDP0 0U
422 #define PCD_ENDP1 1U
423 #define PCD_ENDP2 2U
424 #define PCD_ENDP3 3U
425 #define PCD_ENDP4 4U
426 #define PCD_ENDP5 5U
427 #define PCD_ENDP6 6U
428 #define PCD_ENDP7 7U
429 /**
430 * @}
431 */
432
433 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
434 * @{
435 */
436 #define PCD_SNG_BUF 0U
437 #define PCD_DBL_BUF 1U
438 /**
439 * @}
440 */
441 #endif /* defined (USB_DRD_FS) */
442 /**
443 * @}
444 */
445
446 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
447 #ifndef USB_OTG_DOEPINT_OTEPSPR
448 #define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */
449 #endif /* defined USB_OTG_DOEPINT_OTEPSPR */
450
451 #ifndef USB_OTG_DOEPMSK_OTEPSPRM
452 #define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */
453 #endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */
454
455 #ifndef USB_OTG_DOEPINT_NAK
456 #define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */
457 #endif /* defined USB_OTG_DOEPINT_NAK */
458
459 #ifndef USB_OTG_DOEPMSK_NAKM
460 #define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */
461 #endif /* defined USB_OTG_DOEPMSK_NAKM */
462
463 #ifndef USB_OTG_DOEPINT_STPKTRX
464 #define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */
465 #endif /* defined USB_OTG_DOEPINT_STPKTRX */
466
467 #ifndef USB_OTG_DOEPMSK_NYETM
468 #define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */
469 #endif /* defined USB_OTG_DOEPMSK_NYETM */
470 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
471
472 /* Private macros ------------------------------------------------------------*/
473 /** @defgroup PCD_Private_Macros PCD Private Macros
474 * @{
475 */
476 #if defined (USB_DRD_FS)
477 /* PMA RX counter */
478 #ifndef PCD_RX_PMA_CNT
479 #define PCD_RX_PMA_CNT 10U
480 #endif /* PCD_RX_PMA_CNT */
481
482 /* SetENDPOINT */
483 #define PCD_SET_ENDPOINT USB_DRD_SET_CHEP
484
485 /* GetENDPOINT Register value*/
486 #define PCD_GET_ENDPOINT USB_DRD_GET_CHEP
487
488
489 /**
490 * @brief free buffer used from the application realizing it to the line
491 * toggles bit SW_BUF in the double buffered endpoint register
492 * @param USBx USB device.
493 * @param bEpNum, bDir
494 * @retval None
495 */
496 #define PCD_FREE_USER_BUFFER USB_DRD_FREE_USER_BUFFER
497
498 /**
499 * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
500 * @param USBx USB peripheral instance register address.
501 * @param bEpNum Endpoint Number.
502 * @param wState new state
503 * @retval None
504 */
505 #define PCD_SET_EP_TX_STATUS USB_DRD_SET_CHEP_TX_STATUS
506
507 /**
508 * @brief sets the status for rx transfer (bits STAT_TX[1:0])
509 * @param USBx USB peripheral instance register address.
510 * @param bEpNum Endpoint Number.
511 * @param wState new state
512 * @retval None
513 */
514 #define PCD_SET_EP_RX_STATUS USB_DRD_SET_CHEP_RX_STATUS
515
516 /**
517 * @brief Sets/clears directly EP_KIND bit in the endpoint register.
518 * @param USBx USB peripheral instance register address.
519 * @param bEpNum Endpoint Number.
520 * @retval None
521 */
522 #define PCD_SET_EP_KIND USB_DRD_SET_CHEP_KIND
523 #define PCD_CLEAR_EP_KIND USB_DRD_CLEAR_CHEP_KIND
524 #define PCD_SET_BULK_EP_DBUF PCD_SET_EP_KIND
525 #define PCD_CLEAR_BULK_EP_DBUF PCD_CLEAR_EP_KIND
526
527
528 /**
529 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
530 * @param USBx USB peripheral instance register address.
531 * @param bEpNum Endpoint Number.
532 * @retval None
533 */
534 #define PCD_CLEAR_RX_EP_CTR USB_DRD_CLEAR_RX_CHEP_CTR
535 #define PCD_CLEAR_TX_EP_CTR USB_DRD_CLEAR_TX_CHEP_CTR
536 /**
537 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
538 * @param USBx USB peripheral instance register address.
539 * @param bEpNum Endpoint Number.
540 * @retval None
541 */
542 #define PCD_RX_DTOG USB_DRD_RX_DTOG
543 #define PCD_TX_DTOG USB_DRD_TX_DTOG
544 /**
545 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
546 * @param USBx USB peripheral instance register address.
547 * @param bEpNum Endpoint Number.
548 * @retval None
549 */
550 #define PCD_CLEAR_RX_DTOG USB_DRD_CLEAR_RX_DTOG
551 #define PCD_CLEAR_TX_DTOG USB_DRD_CLEAR_TX_DTOG
552
553 /**
554 * @brief Sets address in an endpoint register.
555 * @param USBx USB peripheral instance register address.
556 * @param bEpNum Endpoint Number.
557 * @param bAddr Address.
558 * @retval None
559 */
560 #define PCD_SET_EP_ADDRESS USB_DRD_SET_CHEP_ADDRESS
561
562 /**
563 * @brief sets address of the tx/rx buffer.
564 * @param USBx USB peripheral instance register address.
565 * @param bEpNum Endpoint Number.
566 * @param wAddr address to be set (must be word aligned).
567 * @retval None
568 */
569 #define PCD_SET_EP_TX_ADDRESS USB_DRD_SET_CHEP_TX_ADDRESS
570 #define PCD_SET_EP_RX_ADDRESS USB_DRD_SET_CHEP_RX_ADDRESS
571
572 /**
573 * @brief sets counter for the tx/rx buffer.
574 * @param USBx USB peripheral instance register address.
575 * @param bEpNum Endpoint Number.
576 * @param wCount Counter value.
577 * @retval None
578 */
579 #define PCD_SET_EP_TX_CNT USB_DRD_SET_CHEP_TX_CNT
580 #define PCD_SET_EP_RX_CNT USB_DRD_SET_CHEP_RX_CNT
581
582 /**
583 * @brief gets counter of the tx buffer.
584 * @param USBx USB peripheral instance register address.
585 * @param bEpNum Endpoint Number.
586 * @retval Counter value
587 */
588 #define PCD_GET_EP_TX_CNT USB_DRD_GET_CHEP_TX_CNT
589
590 /**
591 * @brief gets counter of the rx buffer.
592 * @param Instance USB peripheral instance register address.
593 * @param bEpNum channel Number.
594 * @retval Counter value
595 */
PCD_GET_EP_RX_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)596 __STATIC_INLINE uint16_t PCD_GET_EP_RX_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
597 {
598 UNUSED(Instance);
599 __IO uint32_t count = PCD_RX_PMA_CNT;
600
601 /* WA: few cycles for RX PMA descriptor to update */
602 while (count > 0U)
603 {
604 count--;
605 }
606
607 return (uint16_t)USB_DRD_GET_CHEP_RX_CNT((Instance), (bEpNum));
608 }
609
610 /**
611 * @brief Sets addresses in a double buffer endpoint.
612 * @param USBx USB peripheral instance register address.
613 * @param bEpNum Endpoint Number.
614 * @param wBuf0Addr: buffer 0 address.
615 * @param wBuf1Addr = buffer 1 address.
616 * @retval None
617 */
618 #define PCD_SET_EP_DBUF_ADDR USB_DRD_SET_CHEP_DBUF_ADDR
619
620 /**
621 * @brief Gets buffer 0/1 address of a double buffer endpoint.
622 * @param USBx USB peripheral instance register address.
623 * @param bEpNum Endpoint Number.
624 * @param bDir endpoint dir EP_DBUF_OUT = OUT
625 * EP_DBUF_IN = IN
626 * @param wCount: Counter value
627 * @retval None
628 */
629 #define PCD_SET_EP_DBUF0_CNT USB_DRD_SET_CHEP_DBUF0_CNT
630 #define PCD_SET_EP_DBUF1_CNT USB_DRD_SET_CHEP_DBUF1_CNT
631 #define PCD_SET_EP_DBUF_CNT USB_DRD_SET_CHEP_DBUF_CNT
632
633 /**
634 * @brief gets counter of the rx buffer0.
635 * @param Instance USB peripheral instance register address.
636 * @param bEpNum channel Number.
637 * @retval Counter value
638 */
PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)639 __STATIC_INLINE uint16_t PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
640 {
641 UNUSED(Instance);
642 __IO uint32_t count = PCD_RX_PMA_CNT;
643
644 /* WA: few cycles for RX PMA descriptor to update */
645 while (count > 0U)
646 {
647 count--;
648 }
649
650 return (uint16_t)USB_DRD_GET_CHEP_DBUF0_CNT((Instance), (bEpNum));
651 }
652
653 /**
654 * @brief gets counter of the rx buffer1.
655 * @param Instance USB peripheral instance register address.
656 * @param bEpNum channel Number.
657 * @retval Counter value
658 */
PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)659 __STATIC_INLINE uint16_t PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
660 {
661 UNUSED(Instance);
662 __IO uint32_t count = PCD_RX_PMA_CNT;
663
664 /* WA: few cycles for RX PMA descriptor to update */
665 while (count > 0U)
666 {
667 count--;
668 }
669
670 return (uint16_t)USB_DRD_GET_CHEP_DBUF1_CNT((Instance), (bEpNum));
671 }
672 #endif /* defined (USB_DRD_FS) */
673
674 /**
675 * @}
676 */
677
678 /**
679 * @}
680 */
681
682 /**
683 * @}
684 */
685 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) || defined (USB_DRD_FS) */
686
687 #ifdef __cplusplus
688 }
689 #endif
690
691 #endif /* STM32H5xx_HAL_PCD_H */
692
