1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_lptim.h 4 * @author MCD Application Team 5 * @brief Header file of LPTIM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_LPTIM_H 21 #define STM32H5xx_HAL_LPTIM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /* Include low level driver */ 31 #include "stm32h5xx_ll_lptim.h" 32 33 /** @addtogroup STM32H5xx_HAL_Driver 34 * @{ 35 */ 36 37 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5) || defined (LPTIM6) 38 39 /** @addtogroup LPTIM 40 * @{ 41 */ 42 43 /* Exported types ------------------------------------------------------------*/ 44 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types 45 * @{ 46 */ 47 48 /** 49 * @brief LPTIM Clock configuration definition 50 */ 51 typedef struct 52 { 53 uint32_t Source; /*!< Selects the clock source. 54 This parameter can be a value of @ref LPTIM_Clock_Source */ 55 56 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. 57 This parameter can be a value of @ref LPTIM_Clock_Prescaler */ 58 59 } LPTIM_ClockConfigTypeDef; 60 61 /** 62 * @brief LPTIM Clock configuration definition 63 */ 64 typedef struct 65 { 66 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit 67 if the ULPTIM input is selected. 68 Note: This parameter is used only when Ultra low power clock source is used. 69 Note: If the polarity is configured on 'both edges', an auxiliary clock 70 (one of the Low power oscillator) must be active. 71 This parameter can be a value of @ref LPTIM_Clock_Polarity */ 72 73 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. 74 Note: This parameter is used only when Ultra low power clock source is used. 75 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ 76 77 } LPTIM_ULPClockConfigTypeDef; 78 79 /** 80 * @brief LPTIM Trigger configuration definition 81 */ 82 typedef struct 83 { 84 uint32_t Source; /*!< Selects the Trigger source. 85 This parameter can be a value of @ref LPTIM_Trigger_Source */ 86 87 uint32_t ActiveEdge; /*!< Selects the Trigger active edge. 88 Note: This parameter is used only when an external trigger is used. 89 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ 90 91 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. 92 Note: This parameter is used only when an external trigger is used. 93 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ 94 } LPTIM_TriggerConfigTypeDef; 95 96 /** 97 * @brief LPTIM Initialization Structure definition 98 */ 99 typedef struct 100 { 101 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ 102 103 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ 104 105 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ 106 107 uint32_t Period; /*!< Specifies the period value to be loaded into the active 108 Auto-Reload Register at the next update event. 109 This parameter can be a number between 110 Min_Data = 0x0001 and Max_Data = 0xFFFF. */ 111 112 uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare 113 values is done immediately or after the end of current period. 114 This parameter can be a value of @ref LPTIM_Updating_Mode */ 115 116 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event 117 or each external event. 118 This parameter can be a value of @ref LPTIM_Counter_Source */ 119 120 uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). 121 This parameter can be a value of @ref LPTIM_Input1_Source */ 122 123 uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). 124 Note: This parameter is used only for encoder feature so is used only 125 for LPTIM1 instance. 126 This parameter can be a value of @ref LPTIM_Input2_Source */ 127 128 uint32_t RepetitionCounter;/*!< Specifies the repetition counter value. 129 Each time the RCR downcounter reaches zero, an update event is 130 generated and counting restarts from the RCR value (N). 131 Note: When using repetition counter the UpdateMode field must be 132 set to LPTIM_UPDATE_ENDOFPERIOD otherwise unpredictable 133 behavior may occur. 134 This parameter must be a number between Min_Data = 0x00 and 135 Max_Data = 0xFF. */ 136 } LPTIM_InitTypeDef; 137 138 /** 139 * @brief LPTIM Output Compare Configuration Structure definition 140 */ 141 typedef struct 142 { 143 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 144 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 145 uint32_t OCPolarity; /*!< Specifies the output polarity. 146 This parameter can be a value of @ref LPTIM_Output_Compare_Polarity */ 147 } LPTIM_OC_ConfigTypeDef; 148 149 /** 150 * @brief LPTIM Input Capture Configuration Structure definition 151 */ 152 typedef struct 153 { 154 uint32_t ICInputSource; /*!< Specifies source selected for IC channel. 155 This parameter can be a value of @ref LPTIM_Input_Capture_Source */ 156 157 uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. 158 This parameter can be a value of @ref LPTIM_Input_Capture_Prescaler */ 159 160 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. 161 This parameter can be a value of @ref LPTIM_Input_Capture_Polarity */ 162 163 uint32_t ICFilter; /*!< Specifies the input capture filter. 164 This parameter can be a value of @ref LPTIM_Input_Capture_Filter */ 165 } LPTIM_IC_ConfigTypeDef; 166 167 /** 168 * @brief HAL LPTIM State structure definition 169 */ 170 typedef enum 171 { 172 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ 173 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 174 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ 175 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 176 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ 177 } HAL_LPTIM_StateTypeDef; 178 179 /** 180 * @brief HAL Active channel structures definition 181 */ 182 typedef enum 183 { 184 HAL_LPTIM_ACTIVE_CHANNEL_1 = 0x01U, /*!< The active channel is 1 */ 185 HAL_LPTIM_ACTIVE_CHANNEL_2 = 0x02U, /*!< The active channel is 2 */ 186 HAL_LPTIM_ACTIVE_CHANNEL_CLEARED = 0x00U /*!< All active channels cleared */ 187 } HAL_LPTIM_ActiveChannel; 188 189 /** 190 * @brief LPTIM Channel States definition 191 */ 192 typedef enum 193 { 194 HAL_LPTIM_CHANNEL_STATE_RESET = 0x00U, /*!< LPTIM Channel initial state */ 195 HAL_LPTIM_CHANNEL_STATE_READY = 0x01U, /*!< LPTIM Channel ready for use */ 196 HAL_LPTIM_CHANNEL_STATE_BUSY = 0x02U, /*!< An internal process is ongoing on the LPTIM channel */ 197 } HAL_LPTIM_ChannelStateTypeDef; 198 199 /** 200 * @brief LPTIM handle Structure definition 201 */ 202 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 203 typedef struct __LPTIM_HandleTypeDef 204 #else 205 typedef struct 206 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 207 { 208 LPTIM_TypeDef *Instance; /*!< Register base address */ 209 210 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ 211 212 HAL_LPTIM_ActiveChannel Channel; /*!< Active channel */ 213 214 DMA_HandleTypeDef *hdma[3]; /*!< DMA Handlers array, This array is accessed by a @ref LPTIM_DMA_Handle_index */ 215 216 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ 217 218 HAL_LockTypeDef Lock; /*!< LPTIM locking object */ 219 220 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ 221 222 __IO HAL_LPTIM_ChannelStateTypeDef ChannelState[2]; /*!< LPTIM channel operation state */ 223 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 224 void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */ 225 void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */ 226 void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */ 227 void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */ 228 void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */ 229 void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */ 230 void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */ 231 void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */ 232 void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */ 233 void (* UpdateEventCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Update event detection Callback */ 234 void (* RepCounterWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Repetition counter register write complete Callback */ 235 void (* UpdateEventHalfCpltCallback)(struct __LPTIM_HandleTypeDef *hlptim);/*!< Update event half complete detection Callback */ 236 void (* ErrorCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Error Callback */ 237 void (* IC_CaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Input capture Callback */ 238 void (* IC_CaptureHalfCpltCallback)(struct __LPTIM_HandleTypeDef *htim); /*!< Input Capture half complete Callback */ 239 void (* IC_OverCaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Over capture Callback */ 240 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 241 } LPTIM_HandleTypeDef; 242 243 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 244 /** 245 * @brief HAL LPTIM Callback ID enumeration definition 246 */ 247 typedef enum 248 { 249 HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */ 250 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */ 251 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */ 252 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */ 253 HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */ 254 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */ 255 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */ 256 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */ 257 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */ 258 HAL_LPTIM_UPDATE_EVENT_CB_ID = 0x09U, /*!< Update event detection Callback ID */ 259 HAL_LPTIM_REP_COUNTER_WRITE_CB_ID = 0x0AU, /*!< Repetition counter register write complete Callback ID */ 260 HAL_LPTIM_UPDATE_EVENT_HALF_CB_ID = 0x0BU, /*!< Update event half complete detection Callback ID */ 261 HAL_LPTIM_ERROR_CB_ID = 0x0CU, /*!< LPTIM Error Callback ID */ 262 HAL_LPTIM_IC_CAPTURE_CB_ID = 0x0DU, /*!< Input capture Callback ID */ 263 HAL_LPTIM_IC_CAPTURE_HALF_CB_ID = 0x0EU, /*!< Input capture half complete Callback ID */ 264 HAL_LPTIM_OVER_CAPTURE_CB_ID = 0x0FU, /*!< Over capture Callback ID */ 265 } HAL_LPTIM_CallbackIDTypeDef; 266 267 /** 268 * @brief HAL TIM Callback pointer definition 269 */ 270 typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */ 271 272 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 273 /** 274 * @} 275 */ 276 277 /* Exported constants --------------------------------------------------------*/ 278 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants 279 * @{ 280 */ 281 282 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source 283 * @{ 284 */ 285 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U 286 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL 287 /** 288 * @} 289 */ 290 291 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler 292 * @{ 293 */ 294 #define LPTIM_PRESCALER_DIV1 0x00000000U 295 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 296 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 297 #define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1) 298 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 299 #define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2) 300 #define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2) 301 #define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC 302 /** 303 * @} 304 */ 305 306 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time 307 * @{ 308 */ 309 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U 310 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 311 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 312 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT 313 /** 314 * @} 315 */ 316 317 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity 318 * @{ 319 */ 320 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U 321 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 322 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 323 /** 324 * @} 325 */ 326 327 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source 328 * @{ 329 */ 330 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU 331 #define LPTIM_TRIGSOURCE_0 0x00000000U 332 #define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0 333 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 334 #define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) 335 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 336 #define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) 337 #define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) 338 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL 339 /** 340 * @} 341 */ 342 343 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity 344 * @{ 345 */ 346 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 347 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 348 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN 349 /** 350 * @} 351 */ 352 353 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time 354 * @{ 355 */ 356 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U 357 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 358 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 359 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT 360 /** 361 * @} 362 */ 363 364 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode 365 * @{ 366 */ 367 368 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U 369 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD 370 /** 371 * @} 372 */ 373 374 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source 375 * @{ 376 */ 377 378 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U 379 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE 380 /** 381 * @} 382 */ 383 384 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source 385 * @{ 386 */ 387 388 #define LPTIM_INPUT1SOURCE_GPIO 0x00000000U /*!< For LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5 and LPTIM6*/ 389 #if defined(STM32H503xx) 390 #define LPTIM_INPUT1SOURCE_COMP1 LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM1 and LPTIM2 */ 391 #define LPTIM_INPUT1SOURCE_LPTIM2_CH1 LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM1 */ 392 #define LPTIM_INPUT1SOURCE_LPTIM1_CH2 LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM2 */ 393 #endif /* STM32H503xx */ 394 /** 395 * @} 396 */ 397 398 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source 399 * @{ 400 */ 401 402 #define LPTIM_INPUT2SOURCE_GPIO 0x00000000U /*!< For LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5 and LPTIM6 */ 403 /** 404 * @} 405 */ 406 407 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition 408 * @{ 409 */ 410 411 #define LPTIM_FLAG_CC1O LPTIM_ISR_CC1OF 412 #define LPTIM_FLAG_CC2O LPTIM_ISR_CC2OF 413 #define LPTIM_FLAG_CC1 LPTIM_ISR_CC1IF 414 #define LPTIM_FLAG_CC2 LPTIM_ISR_CC2IF 415 #define LPTIM_FLAG_CMP1OK LPTIM_ISR_CMP1OK 416 #define LPTIM_FLAG_CMP2OK LPTIM_ISR_CMP2OK 417 #define LPTIM_FLAG_DIEROK LPTIM_ISR_DIEROK 418 #define LPTIM_FLAG_REPOK LPTIM_ISR_REPOK 419 #define LPTIM_FLAG_UPDATE LPTIM_ISR_UE 420 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN 421 #define LPTIM_FLAG_UP LPTIM_ISR_UP 422 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK 423 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG 424 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM 425 /** 426 * @} 427 */ 428 429 /** @defgroup LPTIM_DMA_sources LPTIM DMA Sources 430 * @{ 431 */ 432 #define LPTIM_DMA_UPDATE LPTIM_DIER_UEDE /*!< DMA request is triggered by the update event */ 433 #define LPTIM_DMA_CC1 LPTIM_DIER_CC1DE /*!< DMA request is triggered by the capture 1 event */ 434 #define LPTIM_DMA_CC2 LPTIM_DIER_CC2DE /*!< DMA request is triggered by the capture 2 event */ 435 436 /** 437 * @} 438 */ 439 440 /** @defgroup LPTIM_DMA_Handle_index LPTIM DMA Handle Index 441 * @{ 442 */ 443 #define LPTIM_DMA_ID_UPDATE ((uint16_t) 0x0000) /*!< Index of the DMA handle used for Update DMA requests */ 444 #define LPTIM_DMA_ID_CC1 ((uint16_t) 0x0001) /*!< Index of the DMA handle used for Capture/Update event 1 DMA request */ 445 #define LPTIM_DMA_ID_CC2 ((uint16_t) 0x0002) /*!< Index of the DMA handle used for Capture/Update event 2 DMA request */ 446 /** 447 * @} 448 */ 449 450 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition 451 * @{ 452 */ 453 #define LPTIM_IT_CC1O LPTIM_DIER_CC1OIE 454 #define LPTIM_IT_CC2O LPTIM_DIER_CC2OIE 455 #define LPTIM_IT_CC1 LPTIM_DIER_CC1IE 456 #define LPTIM_IT_CC2 LPTIM_DIER_CC2IE 457 #define LPTIM_IT_CMP1OK LPTIM_DIER_CMP1OKIE 458 #define LPTIM_IT_CMP2OK LPTIM_DIER_CMP2OKIE 459 #define LPTIM_IT_REPOK LPTIM_DIER_REPOKIE 460 #define LPTIM_IT_UPDATE LPTIM_DIER_UEIE 461 #define LPTIM_IT_DOWN LPTIM_DIER_DOWNIE 462 #define LPTIM_IT_UP LPTIM_DIER_UPIE 463 #define LPTIM_IT_ARROK LPTIM_DIER_ARROKIE 464 #define LPTIM_IT_EXTTRIG LPTIM_DIER_EXTTRIGIE 465 #define LPTIM_IT_ARRM LPTIM_DIER_ARRMIE 466 /** 467 * @} 468 */ 469 470 /** @defgroup LPTIM_Channel LPTIM Channel 471 * @{ 472 */ 473 #define LPTIM_CHANNEL_1 LL_LPTIM_CHANNEL_CH1 /*!< Capture/compare channel 1 identifier */ 474 #define LPTIM_CHANNEL_2 LL_LPTIM_CHANNEL_CH2 /*!< Capture/compare channel 2 identifier */ 475 /** 476 * @} 477 */ 478 479 /** @defgroup LPTIM_Output_Compare_Polarity LPTIM Output Compare Polarity 480 * @{ 481 */ 482 #define LPTIM_OCPOLARITY_HIGH 0x00000000U /*!< Capture/Compare output polarity */ 483 #define LPTIM_OCPOLARITY_LOW 0x00000001U /*!< Capture/Compare output polarity */ 484 /** 485 * @} 486 */ 487 488 /** @defgroup LPTIM_Input_Capture_Prescaler LPTIM Input Capture Prescaler 489 * @{ 490 */ 491 #define LPTIM_ICPSC_DIV1 0x00000000UL /*!< Capture performed each time an edge is detected on the capture input */ 492 #define LPTIM_ICPSC_DIV2 LPTIM_CCMR1_IC1PSC_0 /*!< Capture performed once every 2 events */ 493 #define LPTIM_ICPSC_DIV4 LPTIM_CCMR1_IC1PSC_1 /*!< Capture performed once every 4 events */ 494 #define LPTIM_ICPSC_DIV8 (LPTIM_CCMR1_IC1PSC_0|LPTIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 8 events */ 495 /** 496 * @} 497 */ 498 499 /** @defgroup LPTIM_Input_Capture_Polarity LPTIM Input Capture Polarity 500 * @{ 501 */ 502 #define LPTIM_ICPOLARITY_RISING 0x00000000UL /*!< Capture/Compare input rising polarity */ 503 #define LPTIM_ICPOLARITY_FALLING LPTIM_CCMR1_CC1P_0 /*!< Capture/Compare input falling polarity */ 504 #define LPTIM_ICPOLARITY_RISING_FALLING (LPTIM_CCMR1_CC1P_0|LPTIM_CCMR1_CC1P_1) /*!< Capture/Compare input rising and falling polarities */ 505 /** 506 * @} 507 */ 508 509 /** @defgroup LPTIM_Input_Capture_Filter LPTIM Input Capture Filter 510 * @{ 511 */ 512 #define LPTIM_ICFLT_CLOCK_DIV1 0x00000000UL /*!< any external input capture signal level change is considered as a valid transition */ 513 #define LPTIM_ICFLT_CLOCK_DIV2 LPTIM_CCMR1_IC1F_0 /*!< external input capture signal level change must be stable for at least 2 clock periods before it is considered as valid transition */ 514 #define LPTIM_ICFLT_CLOCK_DIV4 LPTIM_CCMR1_IC1F_1 /*!< external input capture signal level change must be stable for at least 4 clock periods before it is considered as valid transition */ 515 #define LPTIM_ICFLT_CLOCK_DIV8 (LPTIM_CCMR1_IC1F_0|LPTIM_CCMR1_IC1F_1) /*!< external input capture signal level change must be stable for at least 8 clock periods before it is considered as valid transition */ 516 /** 517 * @} 518 */ 519 520 /** @defgroup LPTIM_Input_Capture_Source LPTIM Input Capture Source 521 * @{ 522 */ 523 #define LPTIM_IC1SOURCE_GPIO 0x00000000UL /*!< For LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5 and LPTIM6 */ 524 #if defined(COMP1) 525 #define LPTIM_IC1SOURCE_COMP1 LPTIM_CFGR2_IC1SEL_0 /*!< For LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5 and LPTIM6 */ 526 #endif /* COMP1 */ 527 #if defined(STM32H503xx) 528 #define LPTIM_IC1SOURCE_EVENTOUT LPTIM_CFGR2_IC1SEL_1 /*!< For LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5 and LPTIM6 */ 529 #define LPTIM_IC1SOURCE_MCO1 (LPTIM_CFGR2_IC1SEL_0 | LPTIM_CFGR2_IC1SEL_1)/*!< For LPTIM1 */ 530 #define LPTIM_IC1SOURCE_MCO2 (LPTIM_CFGR2_IC1SEL_0 | LPTIM_CFGR2_IC1SEL_1)/*!< For LPTIM2 */ 531 #endif /* STM32H503xx*/ 532 533 #define LPTIM_IC2SOURCE_GPIO 0x00000000UL /*!< For LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5 and LPTIM6 */ 534 #define LPTIM_IC2SOURCE_LSI LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM1 */ 535 #define LPTIM_IC2SOURCE_LSE LPTIM_CFGR2_IC2SEL_1 /*!< For LPTIM1 */ 536 #if defined(STM32H503xx) 537 #define LPTIM_IC2SOURCE_HSE_1M (LPTIM_CFGR2_IC2SEL_0 | LPTIM_CFGR2_IC2SEL_1)/*!< For LPTIM1 */ 538 #endif /* STM32H503xx*/ 539 #define LPTIM_IC2SOURCE_HSI_1024 LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM2 */ 540 #define LPTIM_IC2SOURCE_CSI_128 LPTIM_CFGR2_IC2SEL_1 /*!< For LPTIM2 */ 541 #define LPTIM_IC2SOURCE_HSI_8 (LPTIM_CFGR2_IC2SEL_0 | LPTIM_CFGR2_IC2SEL_1)/*!< For LPTIM2 */ 542 /** 543 * @} 544 */ 545 /** 546 * @} 547 */ 548 549 /* Exported macros -----------------------------------------------------------*/ 550 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros 551 * @{ 552 */ 553 554 /** @brief Reset LPTIM handle state. 555 * @param __HANDLE__ LPTIM handle 556 * @retval None 557 */ 558 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 559 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 560 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 561 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 562 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 563 (__HANDLE__)->MspInitCallback = NULL; \ 564 (__HANDLE__)->MspDeInitCallback = NULL; \ 565 } while(0) 566 #else 567 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 568 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 569 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 570 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 571 } while(0) 572 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 573 574 /** 575 * @brief Enable the LPTIM peripheral. 576 * @param __HANDLE__ LPTIM handle 577 * @retval None 578 */ 579 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) 580 581 /** 582 * @brief Disable the LPTIM peripheral. 583 * @param __HANDLE__ LPTIM handle 584 * @retval None 585 */ 586 #define __HAL_LPTIM_DISABLE(__HANDLE__) \ 587 do { \ 588 if (((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC1E) == 0UL) \ 589 { \ 590 if(((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC2E) == 0UL) \ 591 { \ 592 (__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE); \ 593 } \ 594 } \ 595 } while(0) 596 597 /** 598 * @brief Start the LPTIM peripheral in Continuous mode. 599 * @param __HANDLE__ LPTIM handle 600 * @retval None 601 */ 602 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) 603 /** 604 * @brief Start the LPTIM peripheral in single mode. 605 * @param __HANDLE__ LPTIM handle 606 * @retval None 607 */ 608 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) 609 610 /** 611 * @brief Reset the LPTIM Counter register in synchronous mode. 612 * @param __HANDLE__ LPTIM handle 613 * @retval None 614 */ 615 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST) 616 617 /** 618 * @brief Reset after read of the LPTIM Counter register in asynchronous mode. 619 * @param __HANDLE__ LPTIM handle 620 * @retval None 621 */ 622 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE) 623 624 /** 625 * @brief Write the passed parameter in the Autoreload register. 626 * @param __HANDLE__ LPTIM handle 627 * @param __VALUE__ Autoreload value 628 * @retval None 629 * @note The ARR register can only be modified when the LPTIM instance is enabled. 630 */ 631 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) 632 633 /** 634 * @brief Write the passed parameter in the Compare register. 635 * @param __HANDLE__ LPTIM handle 636 * @param __VALUE__ Compare value 637 * @param __CHANNEL__ TIM Channel to be configured 638 * @retval None 639 * @note The CCRx registers can only be modified when the LPTIM instance is enabled. 640 */ 641 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __CHANNEL__, __VALUE__) \ 642 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__VALUE__)) :\ 643 ((__CHANNEL__) == LPTIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__VALUE__)) : 0U) 644 645 /** 646 * @brief Write the passed parameter in the Repetition register. 647 * @param __HANDLE__ LPTIM handle 648 * @param __VALUE__ Repetition value 649 * @retval None 650 */ 651 #define __HAL_LPTIM_REPETITIONCOUNTER_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->RCR = (__VALUE__)) 652 653 /** 654 * @brief Return the current Repetition value. 655 * @param __HANDLE__ LPTIM handle 656 * @retval Repetition register value 657 * @note The RCR register can only be modified when the LPTIM instance is enabled. 658 */ 659 #define __HAL_LPTIM_REPETITIONCOUNTER_GET(__HANDLE__) ((__HANDLE__)->Instance->RCR) 660 661 /** 662 * @brief Enable the LPTIM signal input/output on the corresponding pin. 663 * @param __HANDLE__ LPTIM handle 664 * @param __CHANNEL__ LPTIM Channels to be enabled. 665 * This parameter can be one of the following values: 666 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 667 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 668 * @retval None 669 */ 670 #define __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(__HANDLE__, __CHANNEL__) \ 671 do { \ 672 switch (__CHANNEL__) \ 673 { \ 674 case LPTIM_CHANNEL_1: \ 675 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC1E); \ 676 break; \ 677 case LPTIM_CHANNEL_2: \ 678 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC2E); \ 679 break; \ 680 default: \ 681 break; \ 682 } \ 683 } \ 684 while(0) 685 686 /** 687 * @brief Disable the LPTIM signal input/output on the corresponding pin. 688 * @param __HANDLE__ LPTIM handle 689 * @param __CHANNEL__ LPTIM Channels to be disabled. 690 * This parameter can be one of the following values: 691 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 692 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 693 * @retval None 694 */ 695 #define __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(__HANDLE__, __CHANNEL__) \ 696 do { \ 697 switch (__CHANNEL__) \ 698 { \ 699 case LPTIM_CHANNEL_1: \ 700 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC1E); \ 701 break; \ 702 case LPTIM_CHANNEL_2: \ 703 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC2E); \ 704 break; \ 705 default: \ 706 break; \ 707 } \ 708 } \ 709 while(0) 710 711 /** 712 * @brief Check whether the specified LPTIM flag is set or not. 713 * @param __HANDLE__ LPTIM handle 714 * @param __FLAG__ LPTIM flag to check 715 * This parameter can be a value of: 716 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 717 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 718 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 719 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 720 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 721 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 722 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 723 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 724 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 725 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 726 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 727 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 728 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 729 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 730 * @retval The state of the specified flag (SET or RESET). 731 */ 732 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) 733 734 /** 735 * @brief Clear the specified LPTIM flag. 736 * @param __HANDLE__ LPTIM handle. 737 * @param __FLAG__ LPTIM flag to clear. 738 * This parameter can be a value of: 739 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 740 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 741 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 742 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 743 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 744 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 745 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 746 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 747 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 748 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 749 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 750 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 751 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 752 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 753 * @retval None. 754 */ 755 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 756 757 /** 758 * @brief Enable the specified LPTIM interrupt. 759 * @param __HANDLE__ LPTIM handle. 760 * @param __INTERRUPT__ LPTIM interrupt to set. 761 * This parameter can be a value of: 762 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 763 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 764 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 765 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 766 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 767 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 768 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 769 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 770 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 771 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 772 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 773 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 774 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 775 * @retval None. 776 * @note The LPTIM interrupts can only be enabled when the LPTIM instance is enabled. 777 */ 778 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) 779 780 /** 781 * @brief Disable the specified LPTIM interrupt. 782 * @param __HANDLE__ LPTIM handle. 783 * @param __INTERRUPT__ LPTIM interrupt to set. 784 * This parameter can be a value of: 785 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 786 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 787 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 788 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 789 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 790 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 791 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 792 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 793 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 794 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 795 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 796 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 797 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 798 * @retval None. 799 * @note The LPTIM interrupts can only be disabled when the LPTIM instance is enabled. 800 */ 801 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= (~(__INTERRUPT__))) 802 803 /** @brief Enable the specified DMA request. 804 * @param __HANDLE__ specifies the TIM Handle. 805 * @param __DMA__ specifies the LPTIM DMA request to enable. 806 * This parameter can be one of the following values: 807 * @arg LPTIM_DMA_UPDATE: Update DMA request 808 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 809 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 810 * @retval None 811 */ 812 #define __HAL_LPTIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__)) 813 814 /** @brief Disable the specified DMA request. 815 * @param __HANDLE__ specifies the LPTIM Handle. 816 * @param __DMA__ specifies the LPTIM DMA request to disable. 817 * This parameter can be one of the following values: 818 * @arg LPTIM_DMA_UPDATE: Update DMA request 819 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 820 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 821 * @retval None 822 */ 823 #define __HAL_LPTIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__)) 824 825 /** 826 * @brief Check whether the specified LPTIM interrupt source is enabled or not. 827 * @param __HANDLE__ LPTIM handle. 828 * @param __INTERRUPT__ LPTIM interrupt to check. 829 * This parameter can be a value of: 830 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 831 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 832 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 833 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 834 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 835 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 836 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 837 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 838 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 839 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 840 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 841 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 842 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 843 * @retval Interrupt status. 844 */ 845 846 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER\ 847 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 848 849 /** 850 * @} 851 */ 852 853 /* Exported functions --------------------------------------------------------*/ 854 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions 855 * @{ 856 */ 857 858 /** @addtogroup LPTIM_Exported_Functions_Group1 859 * @brief Initialization and Configuration functions. 860 * @{ 861 */ 862 /* Initialization/de-initialization functions ********************************/ 863 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); 864 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); 865 866 /* MSP functions *************************************************************/ 867 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); 868 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); 869 /** 870 * @} 871 */ 872 873 /** @addtogroup LPTIM_Exported_Functions_Group2 874 * @brief Start-Stop operation functions. 875 * @{ 876 */ 877 /* Config functions **********************************************************/ 878 HAL_StatusTypeDef HAL_LPTIM_OC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_OC_ConfigTypeDef *sConfig, 879 uint32_t Channel); 880 881 /* Start/Stop operation functions *********************************************/ 882 /* ################################# PWM Mode ################################*/ 883 /* Blocking mode: Polling */ 884 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 885 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 886 /* Non-Blocking mode: Interrupt */ 887 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 888 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 889 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, const uint32_t *pData, 890 uint32_t Length); 891 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 892 893 /* ############################# One Pulse Mode ##############################*/ 894 /* Blocking mode: Polling */ 895 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 896 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 897 /* Non-Blocking mode: Interrupt */ 898 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 899 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 900 901 /* ############################## Set once Mode ##############################*/ 902 /* Blocking mode: Polling */ 903 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 904 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 905 /* Non-Blocking mode: Interrupt */ 906 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 907 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 908 909 /* ############################### Encoder Mode ##############################*/ 910 /* Blocking mode: Polling */ 911 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim); 912 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); 913 /* Non-Blocking mode: Interrupt */ 914 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim); 915 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); 916 917 /* ############################# Time out Mode ##############################*/ 918 /* Blocking mode: Polling */ 919 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 920 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); 921 /* Non-Blocking mode: Interrupt */ 922 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 923 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); 924 925 /* ############################## Counter Mode ###############################*/ 926 /* Blocking mode: Polling */ 927 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim); 928 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); 929 /* Non-Blocking mode: Interrupt */ 930 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim); 931 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); 932 933 /* ############################## Input Capture Mode ###############################*/ 934 /* Blocking mode: Polling */ 935 HAL_StatusTypeDef HAL_LPTIM_IC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_IC_ConfigTypeDef *sConfig, 936 uint32_t Channel); 937 HAL_StatusTypeDef HAL_LPTIM_IC_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 938 HAL_StatusTypeDef HAL_LPTIM_IC_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 939 /* Non-Blocking mode: Interrupt */ 940 HAL_StatusTypeDef HAL_LPTIM_IC_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 941 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 942 HAL_StatusTypeDef HAL_LPTIM_IC_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, uint32_t *pData, 943 uint32_t Length); 944 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 945 /** 946 * @} 947 */ 948 949 /** @addtogroup LPTIM_Exported_Functions_Group3 950 * @brief Read operation functions. 951 * @{ 952 */ 953 /* Reading operation functions ************************************************/ 954 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim); 955 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim); 956 uint32_t HAL_LPTIM_ReadCapturedValue(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 957 uint8_t HAL_LPTIM_IC_GetOffset(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 958 /** 959 * @} 960 */ 961 962 /** @addtogroup LPTIM_Exported_Functions_Group4 963 * @brief LPTIM IRQ handler and callback functions. 964 * @{ 965 */ 966 /* LPTIM IRQ functions *******************************************************/ 967 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); 968 969 /* CallBack functions ********************************************************/ 970 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); 971 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); 972 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); 973 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); 974 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); 975 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); 976 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); 977 void HAL_LPTIM_ErrorCallback(LPTIM_HandleTypeDef *hlptim); 978 void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim); 979 void HAL_LPTIM_UpdateEventHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 980 void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim); 981 void HAL_LPTIM_IC_CaptureCallback(LPTIM_HandleTypeDef *hlptim); 982 void HAL_LPTIM_IC_CaptureHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 983 void HAL_LPTIM_IC_OverCaptureCallback(LPTIM_HandleTypeDef *hlptim); 984 985 /* Callbacks Register/UnRegister functions ***********************************/ 986 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 987 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, 988 pLPTIM_CallbackTypeDef pCallback); 989 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); 990 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 991 /** 992 * @} 993 */ 994 995 /** @addtogroup LPTIM_Group5 996 * @brief Peripheral State functions. 997 * @{ 998 */ 999 /* Peripheral State functions ************************************************/ 1000 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim); 1001 /** 1002 * @} 1003 */ 1004 1005 /** 1006 * @} 1007 */ 1008 1009 /* Private types -------------------------------------------------------------*/ 1010 /** @defgroup LPTIM_Private_Types LPTIM Private Types 1011 * @{ 1012 */ 1013 1014 /** 1015 * @} 1016 */ 1017 1018 /* Private variables ---------------------------------------------------------*/ 1019 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables 1020 * @{ 1021 */ 1022 1023 /** 1024 * @} 1025 */ 1026 1027 /* Private constants ---------------------------------------------------------*/ 1028 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants 1029 * @{ 1030 */ 1031 1032 /** 1033 * @} 1034 */ 1035 1036 /* Private macros ------------------------------------------------------------*/ 1037 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros 1038 * @{ 1039 */ 1040 1041 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ 1042 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) 1043 1044 1045 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ 1046 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ 1047 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ 1048 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ 1049 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ 1050 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ 1051 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ 1052 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) 1053 1054 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) 1055 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ 1056 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ 1057 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ 1058 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) 1059 1060 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ 1061 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ 1062 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) 1063 1064 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ 1065 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ 1066 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ 1067 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ 1068 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ 1069 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ 1070 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ 1071 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ 1072 ((__TRIG__) == LPTIM_TRIGSOURCE_7)) 1073 1074 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ 1075 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ 1076 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) 1077 1078 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ 1079 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ 1080 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ 1081 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) 1082 1083 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ 1084 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) 1085 1086 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ 1087 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) 1088 1089 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) 1090 1091 #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ 1092 ((__PERIOD__) <= 0x0000FFFFUL)) 1093 1094 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL) 1095 1096 #define IS_LPTIM_OC_POLARITY(__OCPOLARITY__) (((__OCPOLARITY__) == LPTIM_OCPOLARITY_LOW) || \ 1097 ((__OCPOLARITY__) == LPTIM_OCPOLARITY_HIGH)) 1098 #define IS_LPTIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_ICPSC_DIV1) ||\ 1099 ((__PRESCALER__) == LPTIM_ICPSC_DIV2) ||\ 1100 ((__PRESCALER__) == LPTIM_ICPSC_DIV4) ||\ 1101 ((__PRESCALER__) == LPTIM_ICPSC_DIV8)) 1102 1103 #define IS_LPTIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ICPOLARITY_RISING) || \ 1104 ((__POLARITY__) == LPTIM_ICPOLARITY_FALLING) ||\ 1105 ((__POLARITY__) == LPTIM_ICPOLARITY_RISING_FALLING)) 1106 1107 #define IS_LPTIM_IC_FILTER(__FILTER__) (((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV1) ||\ 1108 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV2) ||\ 1109 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV4) ||\ 1110 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV8)) 1111 1112 #define IS_LPTIM_REPETITION(__REPETITION__) ((__REPETITION__) <= 0x000000FFUL) 1113 1114 #if defined(STM32H503xx) 1115 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1116 ((((__INSTANCE__) == LPTIM1) && \ 1117 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1118 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) || \ 1119 ((__SOURCE__) == LPTIM_INPUT1SOURCE_LPTIM2_CH1))) \ 1120 || \ 1121 (((__INSTANCE__) == LPTIM2) && \ 1122 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1123 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) || \ 1124 ((__SOURCE__) == LPTIM_INPUT1SOURCE_LPTIM1_CH2)))) 1125 #elif defined(LPTIM3) && defined(LPTIM4) && defined(LPTIM5) && defined(LPTIM6) 1126 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1127 ((((__INSTANCE__) == LPTIM1) || \ 1128 ((__INSTANCE__) == LPTIM2) || \ 1129 ((__INSTANCE__) == LPTIM3) || \ 1130 ((__INSTANCE__) == LPTIM4) || \ 1131 ((__INSTANCE__) == LPTIM5) || \ 1132 ((__INSTANCE__) == LPTIM6)) && \ 1133 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO))) 1134 #else 1135 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1136 ((((__INSTANCE__) == LPTIM1) || \ 1137 ((__INSTANCE__) == LPTIM2)) && \ 1138 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO))) 1139 #endif /* STM32H503xx */ 1140 1141 #if defined(STM32H503xx) 1142 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1143 ((((__INSTANCE__) == LPTIM1) || \ 1144 ((__INSTANCE__) == LPTIM2)) && \ 1145 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO))) 1146 #elif defined(LPTIM3) && defined(LPTIM5) && defined(LPTIM6) 1147 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1148 ((((__INSTANCE__) == LPTIM1) || \ 1149 ((__INSTANCE__) == LPTIM2) || \ 1150 ((__INSTANCE__) == LPTIM3) || \ 1151 ((__INSTANCE__) == LPTIM5) || \ 1152 ((__INSTANCE__) == LPTIM6)) && \ 1153 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO))) 1154 #else 1155 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1156 ((((__INSTANCE__) == LPTIM1) || \ 1157 ((__INSTANCE__) == LPTIM2)) && \ 1158 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO))) 1159 #endif /* STM32H503xx */ 1160 1161 #if defined(STM32H503xx) 1162 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1163 ((((__INSTANCE__) == LPTIM1) && \ 1164 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1165 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1) || \ 1166 ((__SOURCE__) == LPTIM_IC1SOURCE_EVENTOUT)|| \ 1167 ((__SOURCE__) == LPTIM_IC1SOURCE_MCO1))) \ 1168 || \ 1169 (((__INSTANCE__) == LPTIM2) && \ 1170 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1171 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1) || \ 1172 ((__SOURCE__) == LPTIM_IC1SOURCE_EVENTOUT)|| \ 1173 ((__SOURCE__) == LPTIM_IC1SOURCE_MCO2)))) 1174 1175 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1176 ((((__INSTANCE__) == LPTIM1) && \ 1177 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1178 ((__SOURCE__) == LPTIM_IC2SOURCE_LSI) || \ 1179 ((__SOURCE__) == LPTIM_IC2SOURCE_LSE) || \ 1180 ((__SOURCE__) == LPTIM_IC2SOURCE_HSE_1M))) \ 1181 || \ 1182 (((__INSTANCE__) == LPTIM2) && \ 1183 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1184 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_1024) || \ 1185 ((__SOURCE__) == LPTIM_IC2SOURCE_CSI_128) || \ 1186 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_8)))) 1187 #elif defined(LPTIM3) && defined(LPTIM5) && defined(LPTIM6) 1188 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1189 ((((__INSTANCE__) == LPTIM1) || \ 1190 ((__INSTANCE__) == LPTIM2) || \ 1191 ((__INSTANCE__) == LPTIM3) || \ 1192 ((__INSTANCE__) == LPTIM5) || \ 1193 ((__INSTANCE__) == LPTIM6)) && \ 1194 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO))) 1195 1196 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1197 ((((__INSTANCE__) == LPTIM1) && \ 1198 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1199 ((__SOURCE__) == LPTIM_IC2SOURCE_LSI) || \ 1200 ((__SOURCE__) == LPTIM_IC2SOURCE_LSE))) \ 1201 || \ 1202 (((__INSTANCE__) == LPTIM2) && \ 1203 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1204 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_1024) || \ 1205 ((__SOURCE__) == LPTIM_IC2SOURCE_CSI_128) || \ 1206 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_8))) \ 1207 || \ 1208 (((__INSTANCE__) == LPTIM3) && \ 1209 ((__SOURCE__) == LPTIM_IC2SOURCE_GPIO)) \ 1210 || \ 1211 (((__INSTANCE__) == LPTIM5) && \ 1212 ((__SOURCE__) == LPTIM_IC2SOURCE_GPIO)) \ 1213 || \ 1214 (((__INSTANCE__) == LPTIM6) && \ 1215 ((__SOURCE__) == LPTIM_IC2SOURCE_GPIO))) 1216 #else 1217 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1218 ((((__INSTANCE__) == LPTIM1) || \ 1219 ((__INSTANCE__) == LPTIM2)) && \ 1220 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO))) 1221 1222 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1223 ((((__INSTANCE__) == LPTIM1) && \ 1224 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1225 ((__SOURCE__) == LPTIM_IC2SOURCE_LSI) || \ 1226 ((__SOURCE__) == LPTIM_IC2SOURCE_LSE))) \ 1227 || \ 1228 (((__INSTANCE__) == LPTIM2) && \ 1229 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1230 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_1024) || \ 1231 ((__SOURCE__) == LPTIM_IC2SOURCE_CSI_128) || \ 1232 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_8)))) 1233 #endif /* STM32H503xx */ 1234 1235 #define LPTIM_CHANNEL_STATE_GET(__INSTANCE__, __CHANNEL__)\ 1236 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? (__INSTANCE__)->ChannelState[0] :\ 1237 (__INSTANCE__)->ChannelState[1]) 1238 1239 #define LPTIM_CHANNEL_STATE_SET(__INSTANCE__, __CHANNEL__, __CHANNEL_STATE__) \ 1240 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__INSTANCE__)->ChannelState[0] = (__CHANNEL_STATE__)) :\ 1241 ((__INSTANCE__)->ChannelState[1] = (__CHANNEL_STATE__))) 1242 1243 #define LPTIM_CHANNEL_STATE_SET_ALL(__INSTANCE__, __CHANNEL_STATE__) do { \ 1244 (__INSTANCE__)->ChannelState[0] =\ 1245 (__CHANNEL_STATE__); \ 1246 (__INSTANCE__)->ChannelState[1] =\ 1247 (__CHANNEL_STATE__); \ 1248 } while(0) 1249 1250 #if defined(STM32H503xx) 1251 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1252 ((((__INSTANCE__) == LPTIM1_NS) && \ 1253 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1254 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1255 || \ 1256 (((__INSTANCE__) == LPTIM2_NS) && \ 1257 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1258 ((__CHANNEL__) == LPTIM_CHANNEL_2)))) 1259 #elif defined(LPTIM3) && defined(LPTIM4) && defined(LPTIM5) && defined(LPTIM6) 1260 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1261 (((((__INSTANCE__) == LPTIM1_NS) || ((__INSTANCE__) == LPTIM1_S)) && \ 1262 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1263 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1264 || \ 1265 ((((__INSTANCE__) == LPTIM2_NS) || ((__INSTANCE__) == LPTIM2_S)) && \ 1266 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1267 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1268 || \ 1269 ((((__INSTANCE__) == LPTIM3_NS) || ((__INSTANCE__) == LPTIM3_S)) && \ 1270 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1271 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1272 || \ 1273 ((((__INSTANCE__) == LPTIM4_NS) || ((__INSTANCE__) == LPTIM4_S)) && \ 1274 ((__CHANNEL__) == LPTIM_CHANNEL_1)) \ 1275 || \ 1276 ((((__INSTANCE__) == LPTIM5_NS) || ((__INSTANCE__) == LPTIM5_S)) && \ 1277 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1278 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1279 || \ 1280 ((((__INSTANCE__) == LPTIM6_NS) || ((__INSTANCE__) == LPTIM6_S)) && \ 1281 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1282 ((__CHANNEL__) == LPTIM_CHANNEL_2)))) 1283 #else 1284 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1285 (((((__INSTANCE__) == LPTIM1_NS) || ((__INSTANCE__) == LPTIM1_S)) && \ 1286 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1287 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1288 || \ 1289 ((((__INSTANCE__) == LPTIM2_NS) || ((__INSTANCE__) == LPTIM2_S)) && \ 1290 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1291 ((__CHANNEL__) == LPTIM_CHANNEL_2)))) 1292 #endif /* STM32H503xx */ 1293 /** 1294 * @} 1295 */ 1296 1297 /* Private functions ---------------------------------------------------------*/ 1298 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 1299 * @{ 1300 */ 1301 /** 1302 * @} 1303 */ 1304 1305 /** 1306 * @} 1307 */ 1308 1309 #endif /* LPTIM1 || LPTIM2 || LPTIM3 || LPTIM4 || LPTIM5 || LPTIM6 */ 1310 /** 1311 * @} 1312 */ 1313 1314 #ifdef __cplusplus 1315 } 1316 #endif 1317 1318 #endif /* STM32H5xx_HAL_LPTIM_H */ 1319
