1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_SAI_H 21 #define STM32G4xx_HAL_SAI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_hal_def.h" 29 30 /** @addtogroup STM32G4xx_HAL_Driver 31 * @{ 32 */ 33 34 #if defined(SAI1) 35 36 /** @addtogroup SAI 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup SAI_Exported_Types SAI Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL State structures definition 47 */ 48 typedef enum 49 { 50 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 51 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 52 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 53 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 54 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 55 } HAL_SAI_StateTypeDef; 56 57 /** 58 * @brief SAI Callback prototype 59 */ 60 typedef void (*SAIcallback)(void); 61 62 /** @defgroup SAI_PDM_Structure_definition SAI PDM Structure definition 63 * @brief SAI PDM Init structure definition 64 * @{ 65 */ 66 typedef struct 67 { 68 FunctionalState Activation; /*!< Enable/disable PDM interface */ 69 uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used. 70 This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ 71 uint32_t ClockEnable; /*!< Specifies which clock must be enabled. 72 This parameter can be a values combination of @ref SAI_PDM_ClockEnable */ 73 } SAI_PdmInitTypeDef; 74 /** 75 * @} 76 */ 77 78 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 79 * @brief SAI Init Structure definition 80 * @{ 81 */ 82 typedef struct 83 { 84 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 85 This parameter can be a value of @ref SAI_Block_Mode */ 86 87 uint32_t Synchro; /*!< Specifies SAI Block synchronization 88 This parameter can be a value of @ref SAI_Block_Synchronization */ 89 90 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 91 for BlockA and BlockB 92 This parameter can be a value of @ref SAI_Block_SyncExt 93 @note If both audio blocks of same SAI are used, this parameter has 94 to be set to the same value for each audio block */ 95 96 uint32_t MckOutput; /*!< Specifies whether master clock output will be generated or not. 97 This parameter can be a value of @ref SAI_Block_MckOutput */ 98 99 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 100 This parameter can be a value of @ref SAI_Block_Output_Drive 101 @note This value has to be set before enabling the audio block 102 but after the audio block configuration. */ 103 104 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 105 This parameter can be a value of @ref SAI_Block_NoDivider 106 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length 107 should be aligned to a number equal to a power of 2, from 8 to 256. 108 If bit NODIV in the SAI_xCR1 register is set, the frame length can 109 take any of the values from 8 to 256. */ 110 111 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 112 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 113 114 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 115 This parameter can be a value of @ref SAI_Audio_Frequency */ 116 117 uint32_t Mckdiv; /*!< Specifies the master clock divider. 118 This parameter must be a number between Min_Data = 0 and Max_Data = 63. 119 @note This parameter is used only if AudioFrequency is set to 120 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 121 122 uint32_t MckOverSampling; /*!< Specifies the master clock oversampling. 123 This parameter can be a value of @ref SAI_Block_Mck_OverSampling */ 124 125 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 126 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 127 128 uint32_t CompandingMode; /*!< Specifies the companding mode type. 129 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 130 131 uint32_t TriState; /*!< Specifies the companding mode type. 132 This parameter can be a value of @ref SAI_TRIState_Management */ 133 134 SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */ 135 136 /* This part of the structure is automatically filled if your are using the high level initialisation 137 function HAL_SAI_InitProtocol */ 138 139 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 140 This parameter can be a value of @ref SAI_Block_Protocol */ 141 142 uint32_t DataSize; /*!< Specifies the SAI Block data size. 143 This parameter can be a value of @ref SAI_Block_Data_Size */ 144 145 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 146 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 147 148 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 149 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 150 } SAI_InitTypeDef; 151 /** 152 * @} 153 */ 154 155 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 156 * @brief SAI Frame Init structure definition 157 * @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware). 158 * @{ 159 */ 160 typedef struct 161 { 162 163 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 164 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 165 @note If master clock MCLK_x pin is declared as an output, the frame length 166 should be aligned to a number equal to power of 2 in order to keep 167 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 168 169 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 170 This Parameter specifies the length in number of bit clock (SCK + 1) 171 of the active level of FS signal in audio frame. 172 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 173 174 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 175 This parameter can be a value of @ref SAI_Block_FS_Definition */ 176 177 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 178 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 179 180 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 181 This parameter can be a value of @ref SAI_Block_FS_Offset */ 182 183 } SAI_FrameInitTypeDef; 184 /** 185 * @} 186 */ 187 188 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 189 * @brief SAI Block Slot Init Structure definition 190 * @note For SPDIF protocol, these parameters are not used (set by hardware). 191 * @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware). 192 * @{ 193 */ 194 typedef struct 195 { 196 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 197 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 198 199 uint32_t SlotSize; /*!< Specifies the Slot Size. 200 This parameter can be a value of @ref SAI_Block_Slot_Size */ 201 202 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 203 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 204 205 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 206 This parameter can be a value of @ref SAI_Block_Slot_Active */ 207 } SAI_SlotInitTypeDef; 208 /** 209 * @} 210 */ 211 212 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 213 * @brief SAI handle Structure definition 214 * @{ 215 */ 216 typedef struct __SAI_HandleTypeDef 217 { 218 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 219 220 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 221 222 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 223 224 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 225 226 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 227 228 uint16_t XferSize; /*!< SAI transfer size */ 229 230 uint16_t XferCount; /*!< SAI transfer counter */ 231 232 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 233 234 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 235 236 SAIcallback mutecallback; /*!< SAI mute callback */ 237 238 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 239 240 HAL_LockTypeDef Lock; /*!< SAI locking object */ 241 242 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 243 244 __IO uint32_t ErrorCode; /*!< SAI Error code */ 245 246 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 247 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 248 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 249 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 250 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 251 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 252 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 253 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 254 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 255 } SAI_HandleTypeDef; 256 /** 257 * @} 258 */ 259 260 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 261 /** 262 * @brief SAI callback ID enumeration definition 263 */ 264 typedef enum 265 { 266 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 267 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 268 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 269 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 270 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 271 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 272 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 273 } HAL_SAI_CallbackIDTypeDef; 274 275 /** 276 * @brief SAI callback pointer definition 277 */ 278 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 279 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 280 281 /** 282 * @} 283 */ 284 285 /* Exported constants --------------------------------------------------------*/ 286 /** @defgroup SAI_Exported_Constants SAI Exported Constants 287 * @{ 288 */ 289 290 /** @defgroup SAI_Error_Code SAI Error Code 291 * @{ 292 */ 293 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 294 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 295 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 296 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 297 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 298 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 299 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 300 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 301 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 302 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 303 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 304 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 305 /** 306 * @} 307 */ 308 309 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 310 * @{ 311 */ 312 #define SAI_SYNCEXT_DISABLE 0U 313 /** 314 * @} 315 */ 316 317 /** @defgroup SAI_Block_MckOutput SAI Block Master Clock Output 318 * @{ 319 */ 320 #define SAI_MCK_OUTPUT_DISABLE 0x00000000U 321 #define SAI_MCK_OUTPUT_ENABLE SAI_xCR1_MCKEN 322 /** 323 * @} 324 */ 325 326 /** @defgroup SAI_Protocol SAI Supported protocol 327 * @{ 328 */ 329 #define SAI_I2S_STANDARD 0U 330 #define SAI_I2S_MSBJUSTIFIED 1U 331 #define SAI_I2S_LSBJUSTIFIED 2U 332 #define SAI_PCM_LONG 3U 333 #define SAI_PCM_SHORT 4U 334 /** 335 * @} 336 */ 337 338 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 339 * @{ 340 */ 341 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 342 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 343 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 344 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 345 /** 346 * @} 347 */ 348 349 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 350 * @{ 351 */ 352 #define SAI_AUDIO_FREQUENCY_192K 192000U 353 #define SAI_AUDIO_FREQUENCY_96K 96000U 354 #define SAI_AUDIO_FREQUENCY_48K 48000U 355 #define SAI_AUDIO_FREQUENCY_44K 44100U 356 #define SAI_AUDIO_FREQUENCY_32K 32000U 357 #define SAI_AUDIO_FREQUENCY_22K 22050U 358 #define SAI_AUDIO_FREQUENCY_16K 16000U 359 #define SAI_AUDIO_FREQUENCY_11K 11025U 360 #define SAI_AUDIO_FREQUENCY_8K 8000U 361 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 362 /** 363 * @} 364 */ 365 366 /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling 367 * @{ 368 */ 369 #define SAI_MCK_OVERSAMPLING_DISABLE 0x00000000U 370 #define SAI_MCK_OVERSAMPLING_ENABLE SAI_xCR1_OSR 371 /** 372 * @} 373 */ 374 375 /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable 376 * @{ 377 */ 378 #define SAI_PDM_CLOCK1_ENABLE SAI_PDMCR_CKEN1 379 #define SAI_PDM_CLOCK2_ENABLE SAI_PDMCR_CKEN2 380 /** 381 * @} 382 */ 383 384 /** @defgroup SAI_Block_Mode SAI Block Mode 385 * @{ 386 */ 387 #define SAI_MODEMASTER_TX 0x00000000U 388 #define SAI_MODEMASTER_RX SAI_xCR1_MODE_0 389 #define SAI_MODESLAVE_TX SAI_xCR1_MODE_1 390 #define SAI_MODESLAVE_RX (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0) 391 392 /** 393 * @} 394 */ 395 396 /** @defgroup SAI_Block_Protocol SAI Block Protocol 397 * @{ 398 */ 399 #define SAI_FREE_PROTOCOL 0x00000000U 400 #define SAI_SPDIF_PROTOCOL SAI_xCR1_PRTCFG_0 401 #define SAI_AC97_PROTOCOL SAI_xCR1_PRTCFG_1 402 /** 403 * @} 404 */ 405 406 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 407 * @{ 408 */ 409 #define SAI_DATASIZE_8 SAI_xCR1_DS_1 410 #define SAI_DATASIZE_10 (SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 411 #define SAI_DATASIZE_16 SAI_xCR1_DS_2 412 #define SAI_DATASIZE_20 (SAI_xCR1_DS_2 | SAI_xCR1_DS_0) 413 #define SAI_DATASIZE_24 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1) 414 #define SAI_DATASIZE_32 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 415 /** 416 * @} 417 */ 418 419 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 420 * @{ 421 */ 422 #define SAI_FIRSTBIT_MSB 0x00000000U 423 #define SAI_FIRSTBIT_LSB SAI_xCR1_LSBFIRST 424 /** 425 * @} 426 */ 427 428 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 429 * @{ 430 */ 431 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 432 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 433 /** 434 * @} 435 */ 436 437 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 438 * @{ 439 */ 440 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 441 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 442 /** 443 * @} 444 */ 445 446 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 447 * @{ 448 */ 449 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 450 #define SAI_OUTPUTDRIVE_ENABLE SAI_xCR1_OUTDRIV 451 /** 452 * @} 453 */ 454 455 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 456 * @{ 457 */ 458 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 459 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NODIV 460 /** 461 * @} 462 */ 463 464 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 465 * @{ 466 */ 467 #define SAI_FS_STARTFRAME 0x00000000U 468 #define SAI_FS_CHANNEL_IDENTIFICATION SAI_xFRCR_FSDEF 469 /** 470 * @} 471 */ 472 473 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 474 * @{ 475 */ 476 #define SAI_FS_ACTIVE_LOW 0x00000000U 477 #define SAI_FS_ACTIVE_HIGH SAI_xFRCR_FSPOL 478 /** 479 * @} 480 */ 481 482 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 483 * @{ 484 */ 485 #define SAI_FS_FIRSTBIT 0x00000000U 486 #define SAI_FS_BEFOREFIRSTBIT SAI_xFRCR_FSOFF 487 /** 488 * @} 489 */ 490 491 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 492 * @{ 493 */ 494 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 495 #define SAI_SLOTSIZE_16B SAI_xSLOTR_SLOTSZ_0 496 #define SAI_SLOTSIZE_32B SAI_xSLOTR_SLOTSZ_1 497 /** 498 * @} 499 */ 500 501 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 502 * @{ 503 */ 504 #define SAI_SLOT_NOTACTIVE 0x00000000U 505 #define SAI_SLOTACTIVE_0 0x00000001U 506 #define SAI_SLOTACTIVE_1 0x00000002U 507 #define SAI_SLOTACTIVE_2 0x00000004U 508 #define SAI_SLOTACTIVE_3 0x00000008U 509 #define SAI_SLOTACTIVE_4 0x00000010U 510 #define SAI_SLOTACTIVE_5 0x00000020U 511 #define SAI_SLOTACTIVE_6 0x00000040U 512 #define SAI_SLOTACTIVE_7 0x00000080U 513 #define SAI_SLOTACTIVE_8 0x00000100U 514 #define SAI_SLOTACTIVE_9 0x00000200U 515 #define SAI_SLOTACTIVE_10 0x00000400U 516 #define SAI_SLOTACTIVE_11 0x00000800U 517 #define SAI_SLOTACTIVE_12 0x00001000U 518 #define SAI_SLOTACTIVE_13 0x00002000U 519 #define SAI_SLOTACTIVE_14 0x00004000U 520 #define SAI_SLOTACTIVE_15 0x00008000U 521 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 522 /** 523 * @} 524 */ 525 526 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 527 * @{ 528 */ 529 #define SAI_STEREOMODE 0x00000000U 530 #define SAI_MONOMODE SAI_xCR1_MONO 531 /** 532 * @} 533 */ 534 535 /** @defgroup SAI_TRIState_Management SAI TRIState Management 536 * @{ 537 */ 538 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 539 #define SAI_OUTPUT_RELEASED SAI_xCR2_TRIS 540 /** 541 * @} 542 */ 543 544 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 545 * @{ 546 */ 547 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 548 #define SAI_FIFOTHRESHOLD_1QF SAI_xCR2_FTH_0 549 #define SAI_FIFOTHRESHOLD_HF SAI_xCR2_FTH_1 550 #define SAI_FIFOTHRESHOLD_3QF (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0) 551 #define SAI_FIFOTHRESHOLD_FULL SAI_xCR2_FTH_2 552 /** 553 * @} 554 */ 555 556 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 557 * @{ 558 */ 559 #define SAI_NOCOMPANDING 0x00000000U 560 #define SAI_ULAW_1CPL_COMPANDING SAI_xCR2_COMP_1 561 #define SAI_ALAW_1CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0) 562 #define SAI_ULAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_CPL) 563 #define SAI_ALAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL) 564 /** 565 * @} 566 */ 567 568 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 569 * @{ 570 */ 571 #define SAI_ZERO_VALUE 0x00000000U 572 #define SAI_LAST_SENT_VALUE SAI_xCR2_MUTEVAL 573 /** 574 * @} 575 */ 576 577 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 578 * @{ 579 */ 580 #define SAI_IT_OVRUDR SAI_xIMR_OVRUDRIE 581 #define SAI_IT_MUTEDET SAI_xIMR_MUTEDETIE 582 #define SAI_IT_WCKCFG SAI_xIMR_WCKCFGIE 583 #define SAI_IT_FREQ SAI_xIMR_FREQIE 584 #define SAI_IT_CNRDY SAI_xIMR_CNRDYIE 585 #define SAI_IT_AFSDET SAI_xIMR_AFSDETIE 586 #define SAI_IT_LFSDET SAI_xIMR_LFSDETIE 587 /** 588 * @} 589 */ 590 591 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 592 * @{ 593 */ 594 #define SAI_FLAG_OVRUDR SAI_xSR_OVRUDR 595 #define SAI_FLAG_MUTEDET SAI_xSR_MUTEDET 596 #define SAI_FLAG_WCKCFG SAI_xSR_WCKCFG 597 #define SAI_FLAG_FREQ SAI_xSR_FREQ 598 #define SAI_FLAG_CNRDY SAI_xSR_CNRDY 599 #define SAI_FLAG_AFSDET SAI_xSR_AFSDET 600 #define SAI_FLAG_LFSDET SAI_xSR_LFSDET 601 /** 602 * @} 603 */ 604 605 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 606 * @{ 607 */ 608 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 609 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 610 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 611 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 612 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 613 #define SAI_FIFOSTATUS_FULL 0x00050000U 614 /** 615 * @} 616 */ 617 618 /** 619 * @} 620 */ 621 622 /* Exported macro ------------------------------------------------------------*/ 623 /** @defgroup SAI_Exported_Macros SAI Exported Macros 624 * @brief macros to handle interrupts and specific configurations 625 * @{ 626 */ 627 628 /** @brief Reset SAI handle state. 629 * @param __HANDLE__ specifies the SAI Handle. 630 * @retval None 631 */ 632 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 633 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 634 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 635 (__HANDLE__)->MspInitCallback = NULL; \ 636 (__HANDLE__)->MspDeInitCallback = NULL; \ 637 } while(0) 638 #else 639 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 640 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 641 642 /** @brief Enable the specified SAI interrupts. 643 * @param __HANDLE__ specifies the SAI Handle. 644 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 645 * This parameter can be one of the following values: 646 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 647 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 648 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 649 * @arg SAI_IT_FREQ: FIFO request interrupt enable 650 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 651 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 652 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 653 * @retval None 654 */ 655 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 656 657 /** @brief Disable the specified SAI interrupts. 658 * @param __HANDLE__ specifies the SAI Handle. 659 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 660 * This parameter can be one of the following values: 661 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 662 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 663 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 664 * @arg SAI_IT_FREQ: FIFO request interrupt enable 665 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 666 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 667 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 668 * @retval None 669 */ 670 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 671 672 /** @brief Check whether the specified SAI interrupt source is enabled or not. 673 * @param __HANDLE__ specifies the SAI Handle. 674 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 675 * This parameter can be one of the following values: 676 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 677 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 678 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 679 * @arg SAI_IT_FREQ: FIFO request interrupt enable 680 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 681 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 682 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 683 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 684 */ 685 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR\ 686 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 687 688 /** @brief Check whether the specified SAI flag is set or not. 689 * @param __HANDLE__ specifies the SAI Handle. 690 * @param __FLAG__ specifies the flag to check. 691 * This parameter can be one of the following values: 692 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 693 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 694 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 695 * @arg SAI_FLAG_FREQ: FIFO request flag. 696 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 697 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 698 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 699 * @retval The new state of __FLAG__ (TRUE or FALSE). 700 */ 701 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 702 703 /** @brief Clear the specified SAI pending flag. 704 * @param __HANDLE__ specifies the SAI Handle. 705 * @param __FLAG__ specifies the flag to check. 706 * This parameter can be any combination of the following values: 707 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 708 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 709 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 710 * @arg SAI_FLAG_FREQ: Clear FIFO request 711 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 712 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 713 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 714 * 715 * @retval None 716 */ 717 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 718 719 /** @brief Enable SAI. 720 * @param __HANDLE__ specifies the SAI Handle. 721 * @retval None 722 */ 723 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 724 725 /** @brief Disable SAI. 726 * @param __HANDLE__ specifies the SAI Handle. 727 * @retval None 728 */ 729 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 730 731 /** 732 * @} 733 */ 734 735 /* Include SAI HAL Extension module */ 736 #include "stm32g4xx_hal_sai_ex.h" 737 738 /* Exported functions --------------------------------------------------------*/ 739 /** @addtogroup SAI_Exported_Functions 740 * @{ 741 */ 742 743 /* Initialization/de-initialization functions ********************************/ 744 /** @addtogroup SAI_Exported_Functions_Group1 745 * @{ 746 */ 747 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 748 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 749 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 750 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 751 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 752 753 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 754 /* SAI callbacks register/unregister functions ********************************/ 755 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 756 HAL_SAI_CallbackIDTypeDef CallbackID, 757 pSAI_CallbackTypeDef pCallback); 758 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 759 HAL_SAI_CallbackIDTypeDef CallbackID); 760 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 761 /** 762 * @} 763 */ 764 765 /* I/O operation functions ***************************************************/ 766 /** @addtogroup SAI_Exported_Functions_Group2 767 * @{ 768 */ 769 /* Blocking mode: Polling */ 770 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 771 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 772 773 /* Non-Blocking mode: Interrupt */ 774 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 775 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 776 777 /* Non-Blocking mode: DMA */ 778 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 779 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 780 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 781 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 782 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 783 784 /* Abort function */ 785 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 786 787 /* Mute management */ 788 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 789 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 790 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 791 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 792 793 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 794 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 795 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 796 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 797 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 798 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 799 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 800 /** 801 * @} 802 */ 803 804 /** @addtogroup SAI_Exported_Functions_Group3 805 * @{ 806 */ 807 /* Peripheral State functions ************************************************/ 808 HAL_SAI_StateTypeDef HAL_SAI_GetState(const SAI_HandleTypeDef *hsai); 809 uint32_t HAL_SAI_GetError(const SAI_HandleTypeDef *hsai); 810 /** 811 * @} 812 */ 813 814 /** 815 * @} 816 */ 817 818 /* Private macros ------------------------------------------------------------*/ 819 /** @defgroup SAI_Private_Macros SAI Private Macros 820 * @{ 821 */ 822 #define IS_SAI_BLOCK_SYNCEXT(STATE) ((STATE) == SAI_SYNCEXT_DISABLE) 823 824 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 825 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 826 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 827 ((PROTOCOL) == SAI_PCM_LONG) ||\ 828 ((PROTOCOL) == SAI_PCM_SHORT)) 829 830 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 831 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 832 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 833 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 834 835 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 836 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 837 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 838 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 839 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 840 841 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ 842 ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE)) 843 844 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U)) 845 846 #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \ 847 (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U)) 848 849 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 850 ((MODE) == SAI_MODEMASTER_RX) || \ 851 ((MODE) == SAI_MODESLAVE_TX) || \ 852 ((MODE) == SAI_MODESLAVE_RX)) 853 854 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 855 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 856 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 857 858 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 859 ((DATASIZE) == SAI_DATASIZE_10) || \ 860 ((DATASIZE) == SAI_DATASIZE_16) || \ 861 ((DATASIZE) == SAI_DATASIZE_20) || \ 862 ((DATASIZE) == SAI_DATASIZE_24) || \ 863 ((DATASIZE) == SAI_DATASIZE_32)) 864 865 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 866 ((BIT) == SAI_FIRSTBIT_LSB)) 867 868 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 869 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 870 871 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 872 ((SYNCHRO) == SAI_SYNCHRONOUS)) 873 874 #define IS_SAI_BLOCK_MCK_OUTPUT(VALUE) (((VALUE) == SAI_MCK_OUTPUT_ENABLE) || \ 875 ((VALUE) == SAI_MCK_OUTPUT_DISABLE)) 876 877 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 878 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 879 880 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 881 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 882 883 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 884 885 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 886 ((VALUE) == SAI_LAST_SENT_VALUE)) 887 888 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 889 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 890 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 891 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 892 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 893 894 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 895 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 896 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 897 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 898 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 899 900 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 901 ((STATE) == SAI_OUTPUT_RELEASED)) 902 903 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 904 ((MODE) == SAI_STEREOMODE)) 905 906 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 907 908 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 909 910 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 911 ((SIZE) == SAI_SLOTSIZE_16B) || \ 912 ((SIZE) == SAI_SLOTSIZE_32B)) 913 914 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 915 916 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 917 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 918 919 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 920 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 921 922 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 923 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 924 925 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 63U) 926 927 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 928 929 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 930 931 /** 932 * @} 933 */ 934 935 /* Private functions ---------------------------------------------------------*/ 936 /** @defgroup SAI_Private_Functions SAI Private Functions 937 * @{ 938 */ 939 940 /** 941 * @} 942 */ 943 944 /** 945 * @} 946 */ 947 948 #endif /* SAI1 */ 949 950 /** 951 * @} 952 */ 953 954 #ifdef __cplusplus 955 } 956 #endif 957 958 #endif /* STM32G4xx_HAL_SAI_H */ 959 960
