1 /**
2 ******************************************************************************
3 * @file stm32g0xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2018 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32G0xx_LL_LPTIM_H
21 #define STM32G0xx_LL_LPTIM_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32g0xx.h"
29
30 /** @addtogroup STM32G0xx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPTIM1) || defined (LPTIM2)
35
36 /** @defgroup LPTIM_LL LPTIM
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
58 * @{
59 */
60
61 /**
62 * @brief LPTIM Init structure definition
63 */
64 typedef struct
65 {
66 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
67 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
68
69 This feature can be modified afterwards using unitary
70 function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary
76 function @ref LL_LPTIM_SetPrescaler().*/
77
78 uint32_t Waveform; /*!< Specifies the waveform shape.
79 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
80
81 This feature can be modified afterwards using unitary
82 function @ref LL_LPTIM_ConfigOutput().*/
83
84 uint32_t Polarity; /*!< Specifies waveform polarity.
85 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
86
87 This feature can be modified afterwards using unitary
88 function @ref LL_LPTIM_ConfigOutput().*/
89 } LL_LPTIM_InitTypeDef;
90
91 /**
92 * @}
93 */
94 #endif /* USE_FULL_LL_DRIVER */
95
96 /* Exported constants --------------------------------------------------------*/
97 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
98 * @{
99 */
100
101 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
102 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
103 * @{
104 */
105 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
106 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
107 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
108 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
109 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
110 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
111 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
112 /**
113 * @}
114 */
115
116 /** @defgroup LPTIM_LL_EC_IT IT Defines
117 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
118 * @{
119 */
120 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match */
121 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK */
122 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
123 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger edge event */
124 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK */
125 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Counter direction change down to up */
126 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Counter direction change up to down */
127 /**
128 * @}
129 */
130
131 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
132 * @{
133 */
134 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
135 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
136 /**
137 * @}
138 */
139
140 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
141 * @{
142 */
143 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
144 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
145 /**
146 * @}
147 */
148
149 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
150 * @{
151 */
152 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
153 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
154 /**
155 * @}
156 */
157
158 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
159 * @{
160 */
161 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
162 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
163 /**
164 * @}
165 */
166
167 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
168 * @{
169 */
170 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
171 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
172 /**
173 * @}
174 */
175
176 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
177 * @{
178 */
179 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
180 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
181 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
182 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
183 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
184 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
185 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
186 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
187 /**
188 * @}
189 */
190
191 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
192 * @{
193 */
194 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
195 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
196 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
197 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
198 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
199 #if defined(RTC_TAMPER3_SUPPORT)
200 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
201 #endif /* RTC_TAMPER3_SUPPORT */
202 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
203 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
204 #if defined(COMP3)
205 #define LL_LPTIM_TRIG_SOURCE_COMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to COMP3 output*/
206 #endif /* COMP3 */
207 /**
208 * @}
209 */
210
211 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
212 * @{
213 */
214 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
215 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
216 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
217 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
218 /**
219 * @}
220 */
221
222 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
223 * @{
224 */
225 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
226 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
227 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
228 /**
229 * @}
230 */
231
232 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
233 * @{
234 */
235 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
236 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
237 /**
238 * @}
239 */
240
241 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
242 * @{
243 */
244 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
245 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
246 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
247 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
248 /**
249 * @}
250 */
251
252 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
253 * @{
254 */
255 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
256 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
257 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
258 /**
259 * @}
260 */
261
262 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
263 * @{
264 */
265 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
266 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
267 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
268 /**
269 * @}
270 */
271
272 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
273 * @{
274 */
275 #define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
276 #define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM1 and LPTIM2 */
277 #define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM2 */
278 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0) /*!< For LPTIM2 */
279 /**
280 * @}
281 */
282
283 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
284 * @{
285 */
286 #define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /*!< For LPTIM1 */
287 #define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_CFGR2_IN2SEL_0 /*!< For LPTIM1 */
288 /**
289 * @}
290 */
291
292 /**
293 * @}
294 */
295
296 /* Exported macro ------------------------------------------------------------*/
297 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
298 * @{
299 */
300
301 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
302 * @{
303 */
304
305 /**
306 * @brief Write a value in LPTIM register
307 * @param __INSTANCE__ LPTIM Instance
308 * @param __REG__ Register to be written
309 * @param __VALUE__ Value to be written in the register
310 * @retval None
311 */
312 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
313
314 /**
315 * @brief Read a value in LPTIM register
316 * @param __INSTANCE__ LPTIM Instance
317 * @param __REG__ Register to be read
318 * @retval Register value
319 */
320 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
321 /**
322 * @}
323 */
324
325 /**
326 * @}
327 */
328
329 /* Exported functions --------------------------------------------------------*/
330 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
331 * @{
332 */
333
334 /** Legacy definitions for compatibility purpose
335 @cond 0
336 */
337 #define LL_LPTIM_ClearFLAG_CMPM LL_LPTIM_ClearFlag_CMPM
338 #define LL_LPTIM_ClearFLAG_CC1 LL_LPTIM_ClearFlag_CC1
339 #define LL_LPTIM_ClearFLAG_CC2 LL_LPTIM_ClearFlag_CC2
340 #define LL_LPTIM_ClearFLAG_CC1O LL_LPTIM_ClearFlag_CC1O
341 #define LL_LPTIM_ClearFLAG_CC2O LL_LPTIM_ClearFlag_CC2O
342 #define LL_LPTIM_ClearFLAG_ARRM LL_LPTIM_ClearFlag_ARRM
343 /**
344 @endcond
345 */
346
347 #if defined(USE_FULL_LL_DRIVER)
348 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
349 * @{
350 */
351
352 ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx);
353 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
354 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
355 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
356 /**
357 * @}
358 */
359 #endif /* USE_FULL_LL_DRIVER */
360
361 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
362 * @{
363 */
364
365 /**
366 * @brief Enable the LPTIM instance
367 * @note After setting the ENABLE bit, a delay of two counter clock is needed
368 * before the LPTIM instance is actually enabled.
369 * @rmtoll CR ENABLE LL_LPTIM_Enable
370 * @param LPTIMx Low-Power Timer instance
371 * @retval None
372 */
LL_LPTIM_Enable(LPTIM_TypeDef * LPTIMx)373 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
374 {
375 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
376 }
377
378 /**
379 * @brief Indicates whether the LPTIM instance is enabled.
380 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
381 * @param LPTIMx Low-Power Timer instance
382 * @retval State of bit (1 or 0).
383 */
LL_LPTIM_IsEnabled(const LPTIM_TypeDef * LPTIMx)384 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
385 {
386 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
387 }
388
389 /**
390 * @brief Starts the LPTIM counter in the desired mode.
391 * @note LPTIM instance must be enabled before starting the counter.
392 * @note It is possible to change on the fly from One Shot mode to
393 * Continuous mode.
394 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
395 * CR SNGSTRT LL_LPTIM_StartCounter
396 * @param LPTIMx Low-Power Timer instance
397 * @param OperatingMode This parameter can be one of the following values:
398 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
399 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
400 * @retval None
401 */
LL_LPTIM_StartCounter(LPTIM_TypeDef * LPTIMx,uint32_t OperatingMode)402 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
403 {
404 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
405 }
406
407 /**
408 * @brief Enable reset after read.
409 * @note After calling this function any read access to LPTIM_CNT
410 * register will asynchronously reset the LPTIM_CNT register content.
411 * @rmtoll CR RSTARE LL_LPTIM_EnableResetAfterRead
412 * @param LPTIMx Low-Power Timer instance
413 * @retval None
414 */
LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef * LPTIMx)415 __STATIC_INLINE void LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef *LPTIMx)
416 {
417 SET_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
418 }
419
420 /**
421 * @brief Disable reset after read.
422 * @rmtoll CR RSTARE LL_LPTIM_DisableResetAfterRead
423 * @param LPTIMx Low-Power Timer instance
424 * @retval None
425 */
LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef * LPTIMx)426 __STATIC_INLINE void LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef *LPTIMx)
427 {
428 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
429 }
430
431 /**
432 * @brief Indicate whether the reset after read feature is enabled.
433 * @rmtoll CR RSTARE LL_LPTIM_IsEnabledResetAfterRead
434 * @param LPTIMx Low-Power Timer instance
435 * @retval State of bit (1 or 0).
436 */
LL_LPTIM_IsEnabledResetAfterRead(const LPTIM_TypeDef * LPTIMx)437 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledResetAfterRead(const LPTIM_TypeDef *LPTIMx)
438 {
439 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_RSTARE) == LPTIM_CR_RSTARE) ? 1UL : 0UL));
440 }
441
442 /**
443 * @brief Reset of the LPTIM_CNT counter register (synchronous).
444 * @note Due to the synchronous nature of this reset, it only takes
445 * place after a synchronization delay of 3 LPTIM core clock cycles
446 * (LPTIM core clock may be different from APB clock).
447 * @note COUNTRST is automatically cleared by hardware
448 * @rmtoll CR COUNTRST LL_LPTIM_ResetCounter\n
449 * @param LPTIMx Low-Power Timer instance
450 * @retval None
451 */
LL_LPTIM_ResetCounter(LPTIM_TypeDef * LPTIMx)452 __STATIC_INLINE void LL_LPTIM_ResetCounter(LPTIM_TypeDef *LPTIMx)
453 {
454 SET_BIT(LPTIMx->CR, LPTIM_CR_COUNTRST);
455 }
456
457 /**
458 * @brief Set the LPTIM registers update mode (enable/disable register preload)
459 * @note This function must be called when the LPTIM instance is disabled.
460 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
461 * @param LPTIMx Low-Power Timer instance
462 * @param UpdateMode This parameter can be one of the following values:
463 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
464 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
465 * @retval None
466 */
LL_LPTIM_SetUpdateMode(LPTIM_TypeDef * LPTIMx,uint32_t UpdateMode)467 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
468 {
469 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
470 }
471
472 /**
473 * @brief Get the LPTIM registers update mode
474 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
475 * @param LPTIMx Low-Power Timer instance
476 * @retval Returned value can be one of the following values:
477 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
478 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
479 */
LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef * LPTIMx)480 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
481 {
482 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
483 }
484
485 /**
486 * @brief Set the auto reload value
487 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
488 * @note After a write to the LPTIMx_ARR register a new write operation to the
489 * same register can only be performed when the previous write operation
490 * is completed. Any successive write before the ARROK flag is set, will
491 * lead to unpredictable results.
492 * @note autoreload value be strictly greater than the compare value.
493 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
494 * @param LPTIMx Low-Power Timer instance
495 * @param AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
496 * @retval None
497 */
LL_LPTIM_SetAutoReload(LPTIM_TypeDef * LPTIMx,uint32_t AutoReload)498 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
499 {
500 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
501 }
502
503 /**
504 * @brief Get actual auto reload value
505 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
506 * @param LPTIMx Low-Power Timer instance
507 * @retval AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
508 */
LL_LPTIM_GetAutoReload(const LPTIM_TypeDef * LPTIMx)509 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
510 {
511 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
512 }
513
514 /**
515 * @brief Set the compare value
516 * @note After a write to the LPTIMx_CMP register a new write operation to the
517 * same register can only be performed when the previous write operation
518 * is completed. Any successive write before the CMPOK flag is set, will
519 * lead to unpredictable results.
520 * @rmtoll CMP CMP LL_LPTIM_SetCompare
521 * @param LPTIMx Low-Power Timer instance
522 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
523 * @retval None
524 */
LL_LPTIM_SetCompare(LPTIM_TypeDef * LPTIMx,uint32_t CompareValue)525 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
526 {
527 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
528 }
529
530 /**
531 * @brief Get actual compare value
532 * @rmtoll CMP CMP LL_LPTIM_GetCompare
533 * @param LPTIMx Low-Power Timer instance
534 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
535 */
LL_LPTIM_GetCompare(const LPTIM_TypeDef * LPTIMx)536 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
537 {
538 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
539 }
540
541 /**
542 * @brief Get actual counter value
543 * @note When the LPTIM instance is running with an asynchronous clock, reading
544 * the LPTIMx_CNT register may return unreliable values. So in this case
545 * it is necessary to perform two consecutive read accesses and verify
546 * that the two returned values are identical.
547 * @rmtoll CNT CNT LL_LPTIM_GetCounter
548 * @param LPTIMx Low-Power Timer instance
549 * @retval Counter value
550 */
LL_LPTIM_GetCounter(const LPTIM_TypeDef * LPTIMx)551 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
552 {
553 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
554 }
555
556 /**
557 * @brief Set the counter mode (selection of the LPTIM counter clock source).
558 * @note The counter mode can be set only when the LPTIM instance is disabled.
559 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
560 * @param LPTIMx Low-Power Timer instance
561 * @param CounterMode This parameter can be one of the following values:
562 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
563 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
564 * @retval None
565 */
LL_LPTIM_SetCounterMode(LPTIM_TypeDef * LPTIMx,uint32_t CounterMode)566 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
567 {
568 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
569 }
570
571 /**
572 * @brief Get the counter mode
573 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
574 * @param LPTIMx Low-Power Timer instance
575 * @retval Returned value can be one of the following values:
576 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
577 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
578 */
LL_LPTIM_GetCounterMode(const LPTIM_TypeDef * LPTIMx)579 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
580 {
581 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
582 }
583
584 /**
585 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
586 * @note This function must be called when the LPTIM instance is disabled.
587 * @note Regarding the LPTIM output polarity the change takes effect
588 * immediately, so the output default value will change immediately after
589 * the polarity is re-configured, even before the timer is enabled.
590 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
591 * CFGR WAVPOL LL_LPTIM_ConfigOutput
592 * @param LPTIMx Low-Power Timer instance
593 * @param Waveform This parameter can be one of the following values:
594 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
595 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
596 * @param Polarity This parameter can be one of the following values:
597 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
598 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
599 * @retval None
600 */
LL_LPTIM_ConfigOutput(LPTIM_TypeDef * LPTIMx,uint32_t Waveform,uint32_t Polarity)601 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
602 {
603 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
604 }
605
606 /**
607 * @brief Set waveform shape
608 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
609 * @param LPTIMx Low-Power Timer instance
610 * @param Waveform This parameter can be one of the following values:
611 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
612 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
613 * @retval None
614 */
LL_LPTIM_SetWaveform(LPTIM_TypeDef * LPTIMx,uint32_t Waveform)615 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
616 {
617 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
618 }
619
620 /**
621 * @brief Get actual waveform shape
622 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
623 * @param LPTIMx Low-Power Timer instance
624 * @retval Returned value can be one of the following values:
625 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
626 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
627 */
LL_LPTIM_GetWaveform(const LPTIM_TypeDef * LPTIMx)628 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
629 {
630 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
631 }
632
633 /**
634 * @brief Set output polarity
635 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
636 * @param LPTIMx Low-Power Timer instance
637 * @param Polarity This parameter can be one of the following values:
638 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
639 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
640 * @retval None
641 */
LL_LPTIM_SetPolarity(LPTIM_TypeDef * LPTIMx,uint32_t Polarity)642 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
643 {
644 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
645 }
646
647 /**
648 * @brief Get actual output polarity
649 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
650 * @param LPTIMx Low-Power Timer instance
651 * @retval Returned value can be one of the following values:
652 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
653 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
654 */
LL_LPTIM_GetPolarity(const LPTIM_TypeDef * LPTIMx)655 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
656 {
657 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
658 }
659
660 /**
661 * @brief Set actual prescaler division ratio.
662 * @note This function must be called when the LPTIM instance is disabled.
663 * @note When the LPTIM is configured to be clocked by an internal clock source
664 * and the LPTIM counter is configured to be updated by active edges
665 * detected on the LPTIM external Input1, the internal clock provided to
666 * the LPTIM must be not be prescaled.
667 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
668 * @param LPTIMx Low-Power Timer instance
669 * @param Prescaler This parameter can be one of the following values:
670 * @arg @ref LL_LPTIM_PRESCALER_DIV1
671 * @arg @ref LL_LPTIM_PRESCALER_DIV2
672 * @arg @ref LL_LPTIM_PRESCALER_DIV4
673 * @arg @ref LL_LPTIM_PRESCALER_DIV8
674 * @arg @ref LL_LPTIM_PRESCALER_DIV16
675 * @arg @ref LL_LPTIM_PRESCALER_DIV32
676 * @arg @ref LL_LPTIM_PRESCALER_DIV64
677 * @arg @ref LL_LPTIM_PRESCALER_DIV128
678 * @retval None
679 */
LL_LPTIM_SetPrescaler(LPTIM_TypeDef * LPTIMx,uint32_t Prescaler)680 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
681 {
682 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
683 }
684
685 /**
686 * @brief Get actual prescaler division ratio.
687 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
688 * @param LPTIMx Low-Power Timer instance
689 * @retval Returned value can be one of the following values:
690 * @arg @ref LL_LPTIM_PRESCALER_DIV1
691 * @arg @ref LL_LPTIM_PRESCALER_DIV2
692 * @arg @ref LL_LPTIM_PRESCALER_DIV4
693 * @arg @ref LL_LPTIM_PRESCALER_DIV8
694 * @arg @ref LL_LPTIM_PRESCALER_DIV16
695 * @arg @ref LL_LPTIM_PRESCALER_DIV32
696 * @arg @ref LL_LPTIM_PRESCALER_DIV64
697 * @arg @ref LL_LPTIM_PRESCALER_DIV128
698 */
LL_LPTIM_GetPrescaler(const LPTIM_TypeDef * LPTIMx)699 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
700 {
701 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
702 }
703
704 /**
705 * @brief Set LPTIM input 1 source (default GPIO).
706 * @rmtoll CFGR2 IN1SEL LL_LPTIM_SetInput1Src
707 * @param LPTIMx Low-Power Timer instance
708 * @param Src This parameter can be one of the following values:
709 * @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
710 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
711 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
712 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
713 * @retval None
714 */
LL_LPTIM_SetInput1Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)715 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
716 {
717 MODIFY_REG(LPTIMx->CFGR2, LPTIM_CFGR2_IN1SEL, Src);
718 }
719
720 /**
721 * @brief Set LPTIM input 2 source (default GPIO).
722 * @rmtoll CFGR2 IN2SEL LL_LPTIM_SetInput2Src
723 * @param LPTIMx Low-Power Timer instance
724 * @param Src This parameter can be one of the following values:
725 * @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
726 * @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
727 * @retval None
728 */
LL_LPTIM_SetInput2Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)729 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
730 {
731 MODIFY_REG(LPTIMx->CFGR2, LPTIM_CFGR2_IN2SEL, Src);
732 }
733
734 /**
735 * @}
736 */
737
738 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
739 * @{
740 */
741
742 /**
743 * @brief Enable the timeout function
744 * @note This function must be called when the LPTIM instance is disabled.
745 * @note The first trigger event will start the timer, any successive trigger
746 * event will reset the counter and the timer will restart.
747 * @note The timeout value corresponds to the compare value; if no trigger
748 * occurs within the expected time frame, the MCU is waked-up by the
749 * compare match event.
750 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
751 * @param LPTIMx Low-Power Timer instance
752 * @retval None
753 */
LL_LPTIM_EnableTimeout(LPTIM_TypeDef * LPTIMx)754 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
755 {
756 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
757 }
758
759 /**
760 * @brief Disable the timeout function
761 * @note This function must be called when the LPTIM instance is disabled.
762 * @note A trigger event arriving when the timer is already started will be
763 * ignored.
764 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
765 * @param LPTIMx Low-Power Timer instance
766 * @retval None
767 */
LL_LPTIM_DisableTimeout(LPTIM_TypeDef * LPTIMx)768 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
769 {
770 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
771 }
772
773 /**
774 * @brief Indicate whether the timeout function is enabled.
775 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
776 * @param LPTIMx Low-Power Timer instance
777 * @retval State of bit (1 or 0).
778 */
LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef * LPTIMx)779 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
780 {
781 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
782 }
783
784 /**
785 * @brief Start the LPTIM counter
786 * @note This function must be called when the LPTIM instance is disabled.
787 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
788 * @param LPTIMx Low-Power Timer instance
789 * @retval None
790 */
LL_LPTIM_TrigSw(LPTIM_TypeDef * LPTIMx)791 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
792 {
793 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
794 }
795
796 /**
797 * @brief Configure the external trigger used as a trigger event for the LPTIM.
798 * @note This function must be called when the LPTIM instance is disabled.
799 * @note An internal clock source must be present when a digital filter is
800 * required for the trigger.
801 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
802 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
803 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
804 * @param LPTIMx Low-Power Timer instance
805 * @param Source This parameter can be one of the following values:
806 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
807 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
808 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
809 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
810 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
811 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (*)
812 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
813 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
814 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP3 (*)
815 *
816 * (*) Value not defined in all devices. \n
817 *
818 * @param Filter This parameter can be one of the following values:
819 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
820 * @arg @ref LL_LPTIM_TRIG_FILTER_2
821 * @arg @ref LL_LPTIM_TRIG_FILTER_4
822 * @arg @ref LL_LPTIM_TRIG_FILTER_8
823 * @param Polarity This parameter can be one of the following values:
824 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
825 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
826 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
827 * @retval None
828 */
LL_LPTIM_ConfigTrigger(LPTIM_TypeDef * LPTIMx,uint32_t Source,uint32_t Filter,uint32_t Polarity)829 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
830 {
831 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
832 }
833
834 /**
835 * @brief Get actual external trigger source.
836 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
837 * @param LPTIMx Low-Power Timer instance
838 * @retval Returned value can be one of the following values:
839 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
840 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
841 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
842 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
843 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
844 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (*)
845 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
846 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
847 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP3 (*)
848 *
849 * (*) Value not defined in all devices. \n
850 *
851 */
LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef * LPTIMx)852 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
853 {
854 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
855 }
856
857 /**
858 * @brief Get actual external trigger filter.
859 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
860 * @param LPTIMx Low-Power Timer instance
861 * @retval Returned value can be one of the following values:
862 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
863 * @arg @ref LL_LPTIM_TRIG_FILTER_2
864 * @arg @ref LL_LPTIM_TRIG_FILTER_4
865 * @arg @ref LL_LPTIM_TRIG_FILTER_8
866 */
LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef * LPTIMx)867 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
868 {
869 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
870 }
871
872 /**
873 * @brief Get actual external trigger polarity.
874 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
875 * @param LPTIMx Low-Power Timer instance
876 * @retval Returned value can be one of the following values:
877 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
878 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
879 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
880 */
LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef * LPTIMx)881 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
882 {
883 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
884 }
885
886 /**
887 * @}
888 */
889
890 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
891 * @{
892 */
893
894 /**
895 * @brief Set the source of the clock used by the LPTIM instance.
896 * @note This function must be called when the LPTIM instance is disabled.
897 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
898 * @param LPTIMx Low-Power Timer instance
899 * @param ClockSource This parameter can be one of the following values:
900 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
901 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
902 * @retval None
903 */
LL_LPTIM_SetClockSource(LPTIM_TypeDef * LPTIMx,uint32_t ClockSource)904 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
905 {
906 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
907 }
908
909 /**
910 * @brief Get actual LPTIM instance clock source.
911 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
912 * @param LPTIMx Low-Power Timer instance
913 * @retval Returned value can be one of the following values:
914 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
915 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
916 */
LL_LPTIM_GetClockSource(const LPTIM_TypeDef * LPTIMx)917 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
918 {
919 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
920 }
921
922 /**
923 * @brief Configure the active edge or edges used by the counter when
924 the LPTIM is clocked by an external clock source.
925 * @note This function must be called when the LPTIM instance is disabled.
926 * @note When both external clock signal edges are considered active ones,
927 * the LPTIM must also be clocked by an internal clock source with a
928 * frequency equal to at least four times the external clock frequency.
929 * @note An internal clock source must be present when a digital filter is
930 * required for external clock.
931 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
932 * CFGR CKPOL LL_LPTIM_ConfigClock
933 * @param LPTIMx Low-Power Timer instance
934 * @param ClockFilter This parameter can be one of the following values:
935 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
936 * @arg @ref LL_LPTIM_CLK_FILTER_2
937 * @arg @ref LL_LPTIM_CLK_FILTER_4
938 * @arg @ref LL_LPTIM_CLK_FILTER_8
939 * @param ClockPolarity This parameter can be one of the following values:
940 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
941 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
942 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
943 * @retval None
944 */
LL_LPTIM_ConfigClock(LPTIM_TypeDef * LPTIMx,uint32_t ClockFilter,uint32_t ClockPolarity)945 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
946 {
947 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
948 }
949
950 /**
951 * @brief Get actual clock polarity
952 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
953 * @param LPTIMx Low-Power Timer instance
954 * @retval Returned value can be one of the following values:
955 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
956 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
957 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
958 */
LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef * LPTIMx)959 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
960 {
961 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
962 }
963
964 /**
965 * @brief Get actual clock digital filter
966 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
967 * @param LPTIMx Low-Power Timer instance
968 * @retval Returned value can be one of the following values:
969 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
970 * @arg @ref LL_LPTIM_CLK_FILTER_2
971 * @arg @ref LL_LPTIM_CLK_FILTER_4
972 * @arg @ref LL_LPTIM_CLK_FILTER_8
973 */
LL_LPTIM_GetClockFilter(const LPTIM_TypeDef * LPTIMx)974 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
975 {
976 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
977 }
978
979 /**
980 * @}
981 */
982
983 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
984 * @{
985 */
986
987 /**
988 * @brief Configure the encoder mode.
989 * @note This function must be called when the LPTIM instance is disabled.
990 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
991 * @param LPTIMx Low-Power Timer instance
992 * @param EncoderMode This parameter can be one of the following values:
993 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
994 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
995 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
996 * @retval None
997 */
LL_LPTIM_SetEncoderMode(LPTIM_TypeDef * LPTIMx,uint32_t EncoderMode)998 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
999 {
1000 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
1001 }
1002
1003 /**
1004 * @brief Get actual encoder mode.
1005 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
1006 * @param LPTIMx Low-Power Timer instance
1007 * @retval Returned value can be one of the following values:
1008 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
1009 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
1010 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
1011 */
LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef * LPTIMx)1012 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
1013 {
1014 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
1015 }
1016
1017 /**
1018 * @brief Enable the encoder mode
1019 * @note This function must be called when the LPTIM instance is disabled.
1020 * @note In this mode the LPTIM instance must be clocked by an internal clock
1021 * source. Also, the prescaler division ratio must be equal to 1.
1022 * @note LPTIM instance must be configured in continuous mode prior enabling
1023 * the encoder mode.
1024 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
1025 * @param LPTIMx Low-Power Timer instance
1026 * @retval None
1027 */
LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef * LPTIMx)1028 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
1029 {
1030 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
1031 }
1032
1033 /**
1034 * @brief Disable the encoder mode
1035 * @note This function must be called when the LPTIM instance is disabled.
1036 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
1037 * @param LPTIMx Low-Power Timer instance
1038 * @retval None
1039 */
LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef * LPTIMx)1040 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
1041 {
1042 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
1043 }
1044
1045 /**
1046 * @brief Indicates whether the LPTIM operates in encoder mode.
1047 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
1048 * @param LPTIMx Low-Power Timer instance
1049 * @retval State of bit (1 or 0).
1050 */
LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef * LPTIMx)1051 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
1052 {
1053 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
1054 }
1055
1056 /**
1057 * @}
1058 */
1059
1060 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
1061 * @{
1062 */
1063
1064
1065 /**
1066 * @brief Clear the compare match flag (CMPMCF)
1067 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFlag_CMPM
1068 * @param LPTIMx Low-Power Timer instance
1069 * @retval None
1070 */
LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef * LPTIMx)1071 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef *LPTIMx)
1072 {
1073 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
1074 }
1075
1076 /**
1077 * @brief Inform application whether a compare match interrupt has occurred.
1078 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
1079 * @param LPTIMx Low-Power Timer instance
1080 * @retval State of bit (1 or 0).
1081 */
LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef * LPTIMx)1082 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
1083 {
1084 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
1085 }
1086
1087 /**
1088 * @brief Clear the autoreload match flag (ARRMCF)
1089 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFlag_ARRM
1090 * @param LPTIMx Low-Power Timer instance
1091 * @retval None
1092 */
LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef * LPTIMx)1093 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef *LPTIMx)
1094 {
1095 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
1096 }
1097
1098 /**
1099 * @brief Inform application whether a autoreload match interrupt has occurred.
1100 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
1101 * @param LPTIMx Low-Power Timer instance
1102 * @retval State of bit (1 or 0).
1103 */
LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef * LPTIMx)1104 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
1105 {
1106 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
1107 }
1108
1109 /**
1110 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
1111 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
1112 * @param LPTIMx Low-Power Timer instance
1113 * @retval None
1114 */
LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef * LPTIMx)1115 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1116 {
1117 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1118 }
1119
1120 /**
1121 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1122 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1123 * @param LPTIMx Low-Power Timer instance
1124 * @retval State of bit (1 or 0).
1125 */
LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1126 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1127 {
1128 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1129 }
1130
1131 /**
1132 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1133 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1134 * @param LPTIMx Low-Power Timer instance
1135 * @retval None
1136 */
LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef * LPTIMx)1137 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1138 {
1139 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1140 }
1141
1142 /**
1143 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully
1144 completed. If so, a new one can be initiated.
1145 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1146 * @param LPTIMx Low-Power Timer instance
1147 * @retval State of bit (1 or 0).
1148 */
LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef * LPTIMx)1149 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1150 {
1151 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1152 }
1153
1154 /**
1155 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1156 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1157 * @param LPTIMx Low-Power Timer instance
1158 * @retval None
1159 */
LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef * LPTIMx)1160 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1161 {
1162 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1163 }
1164
1165 /**
1166 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully
1167 completed. If so, a new one can be initiated.
1168 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1169 * @param LPTIMx Low-Power Timer instance
1170 * @retval State of bit (1 or 0).
1171 */
LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef * LPTIMx)1172 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1173 {
1174 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1175 }
1176
1177 /**
1178 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1179 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1180 * @param LPTIMx Low-Power Timer instance
1181 * @retval None
1182 */
LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef * LPTIMx)1183 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1184 {
1185 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1186 }
1187
1188 /**
1189 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance
1190 operates in encoder mode).
1191 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1192 * @param LPTIMx Low-Power Timer instance
1193 * @retval State of bit (1 or 0).
1194 */
LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef * LPTIMx)1195 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1196 {
1197 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1198 }
1199
1200 /**
1201 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1202 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1203 * @param LPTIMx Low-Power Timer instance
1204 * @retval None
1205 */
LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef * LPTIMx)1206 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1207 {
1208 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1209 }
1210
1211 /**
1212 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance
1213 operates in encoder mode).
1214 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1215 * @param LPTIMx Low-Power Timer instance
1216 * @retval State of bit (1 or 0).
1217 */
LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef * LPTIMx)1218 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1219 {
1220 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1221 }
1222
1223 /**
1224 * @}
1225 */
1226
1227 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1228 * @{
1229 */
1230
1231 /**
1232 * @brief Enable compare match interrupt (CMPMIE).
1233 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1234 * @param LPTIMx Low-Power Timer instance
1235 * @retval None
1236 */
LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef * LPTIMx)1237 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1238 {
1239 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1240 }
1241
1242 /**
1243 * @brief Disable compare match interrupt (CMPMIE).
1244 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1245 * @param LPTIMx Low-Power Timer instance
1246 * @retval None
1247 */
LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef * LPTIMx)1248 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1249 {
1250 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1251 }
1252
1253 /**
1254 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1255 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1256 * @param LPTIMx Low-Power Timer instance
1257 * @retval State of bit (1 or 0).
1258 */
LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef * LPTIMx)1259 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1260 {
1261 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1262 }
1263
1264 /**
1265 * @brief Enable autoreload match interrupt (ARRMIE).
1266 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1267 * @param LPTIMx Low-Power Timer instance
1268 * @retval None
1269 */
LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef * LPTIMx)1270 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1271 {
1272 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1273 }
1274
1275 /**
1276 * @brief Disable autoreload match interrupt (ARRMIE).
1277 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1278 * @param LPTIMx Low-Power Timer instance
1279 * @retval None
1280 */
LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef * LPTIMx)1281 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1282 {
1283 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1284 }
1285
1286 /**
1287 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1288 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1289 * @param LPTIMx Low-Power Timer instance
1290 * @retval State of bit (1 or 0).
1291 */
LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef * LPTIMx)1292 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1293 {
1294 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1295 }
1296
1297 /**
1298 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1299 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1300 * @param LPTIMx Low-Power Timer instance
1301 * @retval None
1302 */
LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1303 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1304 {
1305 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1306 }
1307
1308 /**
1309 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1310 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1311 * @param LPTIMx Low-Power Timer instance
1312 * @retval None
1313 */
LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1314 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1315 {
1316 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1317 }
1318
1319 /**
1320 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1321 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1322 * @param LPTIMx Low-Power Timer instance
1323 * @retval State of bit (1 or 0).
1324 */
LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1325 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1326 {
1327 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1328 }
1329
1330 /**
1331 * @brief Enable compare register write completed interrupt (CMPOKIE).
1332 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1333 * @param LPTIMx Low-Power Timer instance
1334 * @retval None
1335 */
LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1336 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1337 {
1338 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1339 }
1340
1341 /**
1342 * @brief Disable compare register write completed interrupt (CMPOKIE).
1343 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1344 * @param LPTIMx Low-Power Timer instance
1345 * @retval None
1346 */
LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1347 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1348 {
1349 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1350 }
1351
1352 /**
1353 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1354 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1355 * @param LPTIMx Low-Power Timer instance
1356 * @retval State of bit (1 or 0).
1357 */
LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef * LPTIMx)1358 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1359 {
1360 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1361 }
1362
1363 /**
1364 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1365 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1366 * @param LPTIMx Low-Power Timer instance
1367 * @retval None
1368 */
LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef * LPTIMx)1369 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1370 {
1371 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1372 }
1373
1374 /**
1375 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1376 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1377 * @param LPTIMx Low-Power Timer instance
1378 * @retval None
1379 */
LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef * LPTIMx)1380 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1381 {
1382 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1383 }
1384
1385 /**
1386 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1387 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1388 * @param LPTIMx Low-Power Timer instance
1389 * @retval State of bit(1 or 0).
1390 */
LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef * LPTIMx)1391 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1392 {
1393 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1394 }
1395
1396 /**
1397 * @brief Enable direction change to up interrupt (UPIE).
1398 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1399 * @param LPTIMx Low-Power Timer instance
1400 * @retval None
1401 */
LL_LPTIM_EnableIT_UP(LPTIM_TypeDef * LPTIMx)1402 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1403 {
1404 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1405 }
1406
1407 /**
1408 * @brief Disable direction change to up interrupt (UPIE).
1409 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1410 * @param LPTIMx Low-Power Timer instance
1411 * @retval None
1412 */
LL_LPTIM_DisableIT_UP(LPTIM_TypeDef * LPTIMx)1413 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1414 {
1415 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1416 }
1417
1418 /**
1419 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1420 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1421 * @param LPTIMx Low-Power Timer instance
1422 * @retval State of bit(1 or 0).
1423 */
LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef * LPTIMx)1424 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1425 {
1426 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1427 }
1428
1429 /**
1430 * @brief Enable direction change to down interrupt (DOWNIE).
1431 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1432 * @param LPTIMx Low-Power Timer instance
1433 * @retval None
1434 */
LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef * LPTIMx)1435 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1436 {
1437 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1438 }
1439
1440 /**
1441 * @brief Disable direction change to down interrupt (DOWNIE).
1442 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1443 * @param LPTIMx Low-Power Timer instance
1444 * @retval None
1445 */
LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef * LPTIMx)1446 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1447 {
1448 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1449 }
1450
1451 /**
1452 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1453 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1454 * @param LPTIMx Low-Power Timer instance
1455 * @retval State of bit(1 or 0).
1456 */
LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef * LPTIMx)1457 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1458 {
1459 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1460 }
1461
1462 /**
1463 * @}
1464 */
1465
1466 /**
1467 * @}
1468 */
1469
1470 /**
1471 * @}
1472 */
1473
1474 #endif /* LPTIM1 || LPTIM2 */
1475
1476 /**
1477 * @}
1478 */
1479
1480 #ifdef __cplusplus
1481 }
1482 #endif
1483
1484 #endif /* STM32G0xx_LL_LPTIM_H */
1485
