1 /**
2 ******************************************************************************
3 * @file stm32f7xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32F7xx_LL_LPTIM_H
21 #define STM32F7xx_LL_LPTIM_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32f7xx.h"
29
30 /** @addtogroup STM32F7xx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPTIM1)
35
36 /** @defgroup LPTIM_LL LPTIM
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
58 * @{
59 */
60
61 /**
62 * @brief LPTIM Init structure definition
63 */
64 typedef struct
65 {
66 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
67 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
68
69 This feature can be modified afterwards using unitary
70 function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary
76 function @ref LL_LPTIM_SetPrescaler().*/
77
78 uint32_t Waveform; /*!< Specifies the waveform shape.
79 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
80
81 This feature can be modified afterwards using unitary
82 function @ref LL_LPTIM_ConfigOutput().*/
83
84 uint32_t Polarity; /*!< Specifies waveform polarity.
85 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
86
87 This feature can be modified afterwards using unitary
88 function @ref LL_LPTIM_ConfigOutput().*/
89 } LL_LPTIM_InitTypeDef;
90
91 /**
92 * @}
93 */
94 #endif /* USE_FULL_LL_DRIVER */
95
96 /* Exported constants --------------------------------------------------------*/
97 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
98 * @{
99 */
100
101 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
102 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
103 * @{
104 */
105 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
106 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
107 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
108 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
109 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
110 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
111 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
112 /**
113 * @}
114 */
115
116 /** @defgroup LPTIM_LL_EC_IT IT Defines
117 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
118 * @{
119 */
120 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match */
121 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK */
122 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
123 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger edge event */
124 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK */
125 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Counter direction change down to up */
126 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Counter direction change up to down */
127 /**
128 * @}
129 */
130
131 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
132 * @{
133 */
134 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
135 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
136 /**
137 * @}
138 */
139
140 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
141 * @{
142 */
143 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
144 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
145 /**
146 * @}
147 */
148
149 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
150 * @{
151 */
152 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
153 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
154 /**
155 * @}
156 */
157
158 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
159 * @{
160 */
161 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
162 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
163 /**
164 * @}
165 */
166
167 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
168 * @{
169 */
170 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
171 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
172 /**
173 * @}
174 */
175
176 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
177 * @{
178 */
179 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
180 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
181 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
182 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
183 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
184 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
185 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
186 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
187 /**
188 * @}
189 */
190
191 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
192 * @{
193 */
194 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
195 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
196 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
197 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
198 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
199 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
200 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
201 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
202 /**
203 * @}
204 */
205
206 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
207 * @{
208 */
209 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
210 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
211 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
212 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
213 /**
214 * @}
215 */
216
217 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
218 * @{
219 */
220 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
221 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
222 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
223 /**
224 * @}
225 */
226
227 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
228 * @{
229 */
230 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
231 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
232 /**
233 * @}
234 */
235
236 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
237 * @{
238 */
239 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
240 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
241 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
242 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
243 /**
244 * @}
245 */
246
247 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
248 * @{
249 */
250 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
251 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
252 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
253 /**
254 * @}
255 */
256
257 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
258 * @{
259 */
260 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
261 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
262 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
263 /**
264 * @}
265 */
266
267 /**
268 * @}
269 */
270
271 /* Exported macro ------------------------------------------------------------*/
272 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
273 * @{
274 */
275
276 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
277 * @{
278 */
279
280 /**
281 * @brief Write a value in LPTIM register
282 * @param __INSTANCE__ LPTIM Instance
283 * @param __REG__ Register to be written
284 * @param __VALUE__ Value to be written in the register
285 * @retval None
286 */
287 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
288
289 /**
290 * @brief Read a value in LPTIM register
291 * @param __INSTANCE__ LPTIM Instance
292 * @param __REG__ Register to be read
293 * @retval Register value
294 */
295 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
296 /**
297 * @}
298 */
299
300 /**
301 * @}
302 */
303
304 /* Exported functions --------------------------------------------------------*/
305 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
306 * @{
307 */
308
309 /** Legacy definitions for compatibility purpose
310 @cond 0
311 */
312 #define LL_LPTIM_ClearFLAG_CMPM LL_LPTIM_ClearFlag_CMPM
313 #define LL_LPTIM_ClearFLAG_CC1 LL_LPTIM_ClearFlag_CC1
314 #define LL_LPTIM_ClearFLAG_CC2 LL_LPTIM_ClearFlag_CC2
315 #define LL_LPTIM_ClearFLAG_CC1O LL_LPTIM_ClearFlag_CC1O
316 #define LL_LPTIM_ClearFLAG_CC2O LL_LPTIM_ClearFlag_CC2O
317 #define LL_LPTIM_ClearFLAG_ARRM LL_LPTIM_ClearFlag_ARRM
318 /**
319 @endcond
320 */
321
322 #if defined(USE_FULL_LL_DRIVER)
323 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
324 * @{
325 */
326
327 ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx);
328 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
329 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
330 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
331 /**
332 * @}
333 */
334 #endif /* USE_FULL_LL_DRIVER */
335
336 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
337 * @{
338 */
339
340 /**
341 * @brief Enable the LPTIM instance
342 * @note After setting the ENABLE bit, a delay of two counter clock is needed
343 * before the LPTIM instance is actually enabled.
344 * @rmtoll CR ENABLE LL_LPTIM_Enable
345 * @param LPTIMx Low-Power Timer instance
346 * @retval None
347 */
LL_LPTIM_Enable(LPTIM_TypeDef * LPTIMx)348 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
349 {
350 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
351 }
352
353 /**
354 * @brief Indicates whether the LPTIM instance is enabled.
355 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
356 * @param LPTIMx Low-Power Timer instance
357 * @retval State of bit (1 or 0).
358 */
LL_LPTIM_IsEnabled(const LPTIM_TypeDef * LPTIMx)359 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
360 {
361 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
362 }
363
364 /**
365 * @brief Starts the LPTIM counter in the desired mode.
366 * @note LPTIM instance must be enabled before starting the counter.
367 * @note It is possible to change on the fly from One Shot mode to
368 * Continuous mode.
369 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
370 * CR SNGSTRT LL_LPTIM_StartCounter
371 * @param LPTIMx Low-Power Timer instance
372 * @param OperatingMode This parameter can be one of the following values:
373 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
374 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
375 * @retval None
376 */
LL_LPTIM_StartCounter(LPTIM_TypeDef * LPTIMx,uint32_t OperatingMode)377 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
378 {
379 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
380 }
381
382 /**
383 * @brief Set the LPTIM registers update mode (enable/disable register preload)
384 * @note This function must be called when the LPTIM instance is disabled.
385 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
386 * @param LPTIMx Low-Power Timer instance
387 * @param UpdateMode This parameter can be one of the following values:
388 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
389 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
390 * @retval None
391 */
LL_LPTIM_SetUpdateMode(LPTIM_TypeDef * LPTIMx,uint32_t UpdateMode)392 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
393 {
394 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
395 }
396
397 /**
398 * @brief Get the LPTIM registers update mode
399 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
400 * @param LPTIMx Low-Power Timer instance
401 * @retval Returned value can be one of the following values:
402 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
403 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
404 */
LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef * LPTIMx)405 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
406 {
407 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
408 }
409
410 /**
411 * @brief Set the auto reload value
412 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
413 * @note After a write to the LPTIMx_ARR register a new write operation to the
414 * same register can only be performed when the previous write operation
415 * is completed. Any successive write before the ARROK flag is set, will
416 * lead to unpredictable results.
417 * @note autoreload value be strictly greater than the compare value.
418 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
419 * @param LPTIMx Low-Power Timer instance
420 * @param AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
421 * @retval None
422 */
LL_LPTIM_SetAutoReload(LPTIM_TypeDef * LPTIMx,uint32_t AutoReload)423 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
424 {
425 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
426 }
427
428 /**
429 * @brief Get actual auto reload value
430 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
431 * @param LPTIMx Low-Power Timer instance
432 * @retval AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
433 */
LL_LPTIM_GetAutoReload(const LPTIM_TypeDef * LPTIMx)434 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
435 {
436 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
437 }
438
439 /**
440 * @brief Set the compare value
441 * @note After a write to the LPTIMx_CMP register a new write operation to the
442 * same register can only be performed when the previous write operation
443 * is completed. Any successive write before the CMPOK flag is set, will
444 * lead to unpredictable results.
445 * @rmtoll CMP CMP LL_LPTIM_SetCompare
446 * @param LPTIMx Low-Power Timer instance
447 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
448 * @retval None
449 */
LL_LPTIM_SetCompare(LPTIM_TypeDef * LPTIMx,uint32_t CompareValue)450 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
451 {
452 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
453 }
454
455 /**
456 * @brief Get actual compare value
457 * @rmtoll CMP CMP LL_LPTIM_GetCompare
458 * @param LPTIMx Low-Power Timer instance
459 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
460 */
LL_LPTIM_GetCompare(const LPTIM_TypeDef * LPTIMx)461 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
462 {
463 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
464 }
465
466 /**
467 * @brief Get actual counter value
468 * @note When the LPTIM instance is running with an asynchronous clock, reading
469 * the LPTIMx_CNT register may return unreliable values. So in this case
470 * it is necessary to perform two consecutive read accesses and verify
471 * that the two returned values are identical.
472 * @rmtoll CNT CNT LL_LPTIM_GetCounter
473 * @param LPTIMx Low-Power Timer instance
474 * @retval Counter value
475 */
LL_LPTIM_GetCounter(const LPTIM_TypeDef * LPTIMx)476 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
477 {
478 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
479 }
480
481 /**
482 * @brief Set the counter mode (selection of the LPTIM counter clock source).
483 * @note The counter mode can be set only when the LPTIM instance is disabled.
484 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
485 * @param LPTIMx Low-Power Timer instance
486 * @param CounterMode This parameter can be one of the following values:
487 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
488 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
489 * @retval None
490 */
LL_LPTIM_SetCounterMode(LPTIM_TypeDef * LPTIMx,uint32_t CounterMode)491 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
492 {
493 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
494 }
495
496 /**
497 * @brief Get the counter mode
498 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
499 * @param LPTIMx Low-Power Timer instance
500 * @retval Returned value can be one of the following values:
501 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
502 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
503 */
LL_LPTIM_GetCounterMode(const LPTIM_TypeDef * LPTIMx)504 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
505 {
506 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
507 }
508
509 /**
510 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
511 * @note This function must be called when the LPTIM instance is disabled.
512 * @note Regarding the LPTIM output polarity the change takes effect
513 * immediately, so the output default value will change immediately after
514 * the polarity is re-configured, even before the timer is enabled.
515 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
516 * CFGR WAVPOL LL_LPTIM_ConfigOutput
517 * @param LPTIMx Low-Power Timer instance
518 * @param Waveform This parameter can be one of the following values:
519 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
520 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
521 * @param Polarity This parameter can be one of the following values:
522 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
523 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
524 * @retval None
525 */
LL_LPTIM_ConfigOutput(LPTIM_TypeDef * LPTIMx,uint32_t Waveform,uint32_t Polarity)526 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
527 {
528 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
529 }
530
531 /**
532 * @brief Set waveform shape
533 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
534 * @param LPTIMx Low-Power Timer instance
535 * @param Waveform This parameter can be one of the following values:
536 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
537 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
538 * @retval None
539 */
LL_LPTIM_SetWaveform(LPTIM_TypeDef * LPTIMx,uint32_t Waveform)540 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
541 {
542 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
543 }
544
545 /**
546 * @brief Get actual waveform shape
547 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
548 * @param LPTIMx Low-Power Timer instance
549 * @retval Returned value can be one of the following values:
550 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
551 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
552 */
LL_LPTIM_GetWaveform(const LPTIM_TypeDef * LPTIMx)553 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
554 {
555 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
556 }
557
558 /**
559 * @brief Set output polarity
560 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
561 * @param LPTIMx Low-Power Timer instance
562 * @param Polarity This parameter can be one of the following values:
563 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
564 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
565 * @retval None
566 */
LL_LPTIM_SetPolarity(LPTIM_TypeDef * LPTIMx,uint32_t Polarity)567 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
568 {
569 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
570 }
571
572 /**
573 * @brief Get actual output polarity
574 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
575 * @param LPTIMx Low-Power Timer instance
576 * @retval Returned value can be one of the following values:
577 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
578 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
579 */
LL_LPTIM_GetPolarity(const LPTIM_TypeDef * LPTIMx)580 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
581 {
582 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
583 }
584
585 /**
586 * @brief Set actual prescaler division ratio.
587 * @note This function must be called when the LPTIM instance is disabled.
588 * @note When the LPTIM is configured to be clocked by an internal clock source
589 * and the LPTIM counter is configured to be updated by active edges
590 * detected on the LPTIM external Input1, the internal clock provided to
591 * the LPTIM must be not be prescaled.
592 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
593 * @param LPTIMx Low-Power Timer instance
594 * @param Prescaler This parameter can be one of the following values:
595 * @arg @ref LL_LPTIM_PRESCALER_DIV1
596 * @arg @ref LL_LPTIM_PRESCALER_DIV2
597 * @arg @ref LL_LPTIM_PRESCALER_DIV4
598 * @arg @ref LL_LPTIM_PRESCALER_DIV8
599 * @arg @ref LL_LPTIM_PRESCALER_DIV16
600 * @arg @ref LL_LPTIM_PRESCALER_DIV32
601 * @arg @ref LL_LPTIM_PRESCALER_DIV64
602 * @arg @ref LL_LPTIM_PRESCALER_DIV128
603 * @retval None
604 */
LL_LPTIM_SetPrescaler(LPTIM_TypeDef * LPTIMx,uint32_t Prescaler)605 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
606 {
607 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
608 }
609
610 /**
611 * @brief Get actual prescaler division ratio.
612 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
613 * @param LPTIMx Low-Power Timer instance
614 * @retval Returned value can be one of the following values:
615 * @arg @ref LL_LPTIM_PRESCALER_DIV1
616 * @arg @ref LL_LPTIM_PRESCALER_DIV2
617 * @arg @ref LL_LPTIM_PRESCALER_DIV4
618 * @arg @ref LL_LPTIM_PRESCALER_DIV8
619 * @arg @ref LL_LPTIM_PRESCALER_DIV16
620 * @arg @ref LL_LPTIM_PRESCALER_DIV32
621 * @arg @ref LL_LPTIM_PRESCALER_DIV64
622 * @arg @ref LL_LPTIM_PRESCALER_DIV128
623 */
LL_LPTIM_GetPrescaler(const LPTIM_TypeDef * LPTIMx)624 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
625 {
626 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
627 }
628
629 /**
630 * @}
631 */
632
633 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
634 * @{
635 */
636
637 /**
638 * @brief Enable the timeout function
639 * @note This function must be called when the LPTIM instance is disabled.
640 * @note The first trigger event will start the timer, any successive trigger
641 * event will reset the counter and the timer will restart.
642 * @note The timeout value corresponds to the compare value; if no trigger
643 * occurs within the expected time frame, the MCU is waked-up by the
644 * compare match event.
645 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
646 * @param LPTIMx Low-Power Timer instance
647 * @retval None
648 */
LL_LPTIM_EnableTimeout(LPTIM_TypeDef * LPTIMx)649 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
650 {
651 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
652 }
653
654 /**
655 * @brief Disable the timeout function
656 * @note This function must be called when the LPTIM instance is disabled.
657 * @note A trigger event arriving when the timer is already started will be
658 * ignored.
659 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
660 * @param LPTIMx Low-Power Timer instance
661 * @retval None
662 */
LL_LPTIM_DisableTimeout(LPTIM_TypeDef * LPTIMx)663 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
664 {
665 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
666 }
667
668 /**
669 * @brief Indicate whether the timeout function is enabled.
670 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
671 * @param LPTIMx Low-Power Timer instance
672 * @retval State of bit (1 or 0).
673 */
LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef * LPTIMx)674 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
675 {
676 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
677 }
678
679 /**
680 * @brief Start the LPTIM counter
681 * @note This function must be called when the LPTIM instance is disabled.
682 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
683 * @param LPTIMx Low-Power Timer instance
684 * @retval None
685 */
LL_LPTIM_TrigSw(LPTIM_TypeDef * LPTIMx)686 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
687 {
688 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
689 }
690
691 /**
692 * @brief Configure the external trigger used as a trigger event for the LPTIM.
693 * @note This function must be called when the LPTIM instance is disabled.
694 * @note An internal clock source must be present when a digital filter is
695 * required for the trigger.
696 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
697 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
698 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
699 * @param LPTIMx Low-Power Timer instance
700 * @param Source This parameter can be one of the following values:
701 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
702 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
703 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
704 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
705 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
706 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
707 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
708 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
709 * @param Filter This parameter can be one of the following values:
710 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
711 * @arg @ref LL_LPTIM_TRIG_FILTER_2
712 * @arg @ref LL_LPTIM_TRIG_FILTER_4
713 * @arg @ref LL_LPTIM_TRIG_FILTER_8
714 * @param Polarity This parameter can be one of the following values:
715 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
716 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
717 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
718 * @retval None
719 */
LL_LPTIM_ConfigTrigger(LPTIM_TypeDef * LPTIMx,uint32_t Source,uint32_t Filter,uint32_t Polarity)720 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
721 {
722 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
723 }
724
725 /**
726 * @brief Get actual external trigger source.
727 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
728 * @param LPTIMx Low-Power Timer instance
729 * @retval Returned value can be one of the following values:
730 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
731 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
732 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
733 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
734 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
735 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
736 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
737 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
738 */
LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef * LPTIMx)739 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
740 {
741 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
742 }
743
744 /**
745 * @brief Get actual external trigger filter.
746 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
747 * @param LPTIMx Low-Power Timer instance
748 * @retval Returned value can be one of the following values:
749 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
750 * @arg @ref LL_LPTIM_TRIG_FILTER_2
751 * @arg @ref LL_LPTIM_TRIG_FILTER_4
752 * @arg @ref LL_LPTIM_TRIG_FILTER_8
753 */
LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef * LPTIMx)754 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
755 {
756 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
757 }
758
759 /**
760 * @brief Get actual external trigger polarity.
761 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
762 * @param LPTIMx Low-Power Timer instance
763 * @retval Returned value can be one of the following values:
764 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
765 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
766 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
767 */
LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef * LPTIMx)768 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
769 {
770 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
771 }
772
773 /**
774 * @}
775 */
776
777 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
778 * @{
779 */
780
781 /**
782 * @brief Set the source of the clock used by the LPTIM instance.
783 * @note This function must be called when the LPTIM instance is disabled.
784 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
785 * @param LPTIMx Low-Power Timer instance
786 * @param ClockSource This parameter can be one of the following values:
787 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
788 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
789 * @retval None
790 */
LL_LPTIM_SetClockSource(LPTIM_TypeDef * LPTIMx,uint32_t ClockSource)791 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
792 {
793 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
794 }
795
796 /**
797 * @brief Get actual LPTIM instance clock source.
798 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
799 * @param LPTIMx Low-Power Timer instance
800 * @retval Returned value can be one of the following values:
801 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
802 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
803 */
LL_LPTIM_GetClockSource(const LPTIM_TypeDef * LPTIMx)804 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
805 {
806 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
807 }
808
809 /**
810 * @brief Configure the active edge or edges used by the counter when
811 the LPTIM is clocked by an external clock source.
812 * @note This function must be called when the LPTIM instance is disabled.
813 * @note When both external clock signal edges are considered active ones,
814 * the LPTIM must also be clocked by an internal clock source with a
815 * frequency equal to at least four times the external clock frequency.
816 * @note An internal clock source must be present when a digital filter is
817 * required for external clock.
818 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
819 * CFGR CKPOL LL_LPTIM_ConfigClock
820 * @param LPTIMx Low-Power Timer instance
821 * @param ClockFilter This parameter can be one of the following values:
822 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
823 * @arg @ref LL_LPTIM_CLK_FILTER_2
824 * @arg @ref LL_LPTIM_CLK_FILTER_4
825 * @arg @ref LL_LPTIM_CLK_FILTER_8
826 * @param ClockPolarity This parameter can be one of the following values:
827 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
828 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
829 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
830 * @retval None
831 */
LL_LPTIM_ConfigClock(LPTIM_TypeDef * LPTIMx,uint32_t ClockFilter,uint32_t ClockPolarity)832 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
833 {
834 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
835 }
836
837 /**
838 * @brief Get actual clock polarity
839 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
840 * @param LPTIMx Low-Power Timer instance
841 * @retval Returned value can be one of the following values:
842 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
843 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
844 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
845 */
LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef * LPTIMx)846 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
847 {
848 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
849 }
850
851 /**
852 * @brief Get actual clock digital filter
853 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
854 * @param LPTIMx Low-Power Timer instance
855 * @retval Returned value can be one of the following values:
856 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
857 * @arg @ref LL_LPTIM_CLK_FILTER_2
858 * @arg @ref LL_LPTIM_CLK_FILTER_4
859 * @arg @ref LL_LPTIM_CLK_FILTER_8
860 */
LL_LPTIM_GetClockFilter(const LPTIM_TypeDef * LPTIMx)861 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
862 {
863 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
864 }
865
866 /**
867 * @}
868 */
869
870 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
871 * @{
872 */
873
874 /**
875 * @brief Configure the encoder mode.
876 * @note This function must be called when the LPTIM instance is disabled.
877 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
878 * @param LPTIMx Low-Power Timer instance
879 * @param EncoderMode This parameter can be one of the following values:
880 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
881 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
882 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
883 * @retval None
884 */
LL_LPTIM_SetEncoderMode(LPTIM_TypeDef * LPTIMx,uint32_t EncoderMode)885 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
886 {
887 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
888 }
889
890 /**
891 * @brief Get actual encoder mode.
892 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
893 * @param LPTIMx Low-Power Timer instance
894 * @retval Returned value can be one of the following values:
895 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
896 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
897 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
898 */
LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef * LPTIMx)899 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
900 {
901 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
902 }
903
904 /**
905 * @brief Enable the encoder mode
906 * @note This function must be called when the LPTIM instance is disabled.
907 * @note In this mode the LPTIM instance must be clocked by an internal clock
908 * source. Also, the prescaler division ratio must be equal to 1.
909 * @note LPTIM instance must be configured in continuous mode prior enabling
910 * the encoder mode.
911 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
912 * @param LPTIMx Low-Power Timer instance
913 * @retval None
914 */
LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef * LPTIMx)915 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
916 {
917 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
918 }
919
920 /**
921 * @brief Disable the encoder mode
922 * @note This function must be called when the LPTIM instance is disabled.
923 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
924 * @param LPTIMx Low-Power Timer instance
925 * @retval None
926 */
LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef * LPTIMx)927 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
928 {
929 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
930 }
931
932 /**
933 * @brief Indicates whether the LPTIM operates in encoder mode.
934 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
935 * @param LPTIMx Low-Power Timer instance
936 * @retval State of bit (1 or 0).
937 */
LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef * LPTIMx)938 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
939 {
940 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
941 }
942
943 /**
944 * @}
945 */
946
947 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
948 * @{
949 */
950
951
952 /**
953 * @brief Clear the compare match flag (CMPMCF)
954 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFlag_CMPM
955 * @param LPTIMx Low-Power Timer instance
956 * @retval None
957 */
LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef * LPTIMx)958 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef *LPTIMx)
959 {
960 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
961 }
962
963 /**
964 * @brief Inform application whether a compare match interrupt has occurred.
965 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
966 * @param LPTIMx Low-Power Timer instance
967 * @retval State of bit (1 or 0).
968 */
LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef * LPTIMx)969 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
970 {
971 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
972 }
973
974 /**
975 * @brief Clear the autoreload match flag (ARRMCF)
976 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFlag_ARRM
977 * @param LPTIMx Low-Power Timer instance
978 * @retval None
979 */
LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef * LPTIMx)980 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef *LPTIMx)
981 {
982 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
983 }
984
985 /**
986 * @brief Inform application whether a autoreload match interrupt has occurred.
987 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
988 * @param LPTIMx Low-Power Timer instance
989 * @retval State of bit (1 or 0).
990 */
LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef * LPTIMx)991 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
992 {
993 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
994 }
995
996 /**
997 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
998 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
999 * @param LPTIMx Low-Power Timer instance
1000 * @retval None
1001 */
LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef * LPTIMx)1002 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1003 {
1004 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1005 }
1006
1007 /**
1008 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1009 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1010 * @param LPTIMx Low-Power Timer instance
1011 * @retval State of bit (1 or 0).
1012 */
LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1013 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1014 {
1015 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1016 }
1017
1018 /**
1019 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1020 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1021 * @param LPTIMx Low-Power Timer instance
1022 * @retval None
1023 */
LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef * LPTIMx)1024 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1025 {
1026 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1027 }
1028
1029 /**
1030 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully
1031 completed. If so, a new one can be initiated.
1032 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1033 * @param LPTIMx Low-Power Timer instance
1034 * @retval State of bit (1 or 0).
1035 */
LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef * LPTIMx)1036 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1037 {
1038 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1039 }
1040
1041 /**
1042 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1043 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1044 * @param LPTIMx Low-Power Timer instance
1045 * @retval None
1046 */
LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef * LPTIMx)1047 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1048 {
1049 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1050 }
1051
1052 /**
1053 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully
1054 completed. If so, a new one can be initiated.
1055 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1056 * @param LPTIMx Low-Power Timer instance
1057 * @retval State of bit (1 or 0).
1058 */
LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef * LPTIMx)1059 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1060 {
1061 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1062 }
1063
1064 /**
1065 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1066 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1067 * @param LPTIMx Low-Power Timer instance
1068 * @retval None
1069 */
LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef * LPTIMx)1070 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1071 {
1072 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1073 }
1074
1075 /**
1076 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance
1077 operates in encoder mode).
1078 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1079 * @param LPTIMx Low-Power Timer instance
1080 * @retval State of bit (1 or 0).
1081 */
LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef * LPTIMx)1082 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1083 {
1084 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1085 }
1086
1087 /**
1088 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1089 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1090 * @param LPTIMx Low-Power Timer instance
1091 * @retval None
1092 */
LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef * LPTIMx)1093 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1094 {
1095 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1096 }
1097
1098 /**
1099 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance
1100 operates in encoder mode).
1101 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1102 * @param LPTIMx Low-Power Timer instance
1103 * @retval State of bit (1 or 0).
1104 */
LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef * LPTIMx)1105 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1106 {
1107 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1108 }
1109
1110 /**
1111 * @}
1112 */
1113
1114 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1115 * @{
1116 */
1117
1118 /**
1119 * @brief Enable compare match interrupt (CMPMIE).
1120 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1121 * @param LPTIMx Low-Power Timer instance
1122 * @retval None
1123 */
LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef * LPTIMx)1124 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1125 {
1126 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1127 }
1128
1129 /**
1130 * @brief Disable compare match interrupt (CMPMIE).
1131 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1132 * @param LPTIMx Low-Power Timer instance
1133 * @retval None
1134 */
LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef * LPTIMx)1135 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1136 {
1137 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1138 }
1139
1140 /**
1141 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1142 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1143 * @param LPTIMx Low-Power Timer instance
1144 * @retval State of bit (1 or 0).
1145 */
LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef * LPTIMx)1146 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1147 {
1148 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1149 }
1150
1151 /**
1152 * @brief Enable autoreload match interrupt (ARRMIE).
1153 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1154 * @param LPTIMx Low-Power Timer instance
1155 * @retval None
1156 */
LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef * LPTIMx)1157 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1158 {
1159 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1160 }
1161
1162 /**
1163 * @brief Disable autoreload match interrupt (ARRMIE).
1164 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1165 * @param LPTIMx Low-Power Timer instance
1166 * @retval None
1167 */
LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef * LPTIMx)1168 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1169 {
1170 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1171 }
1172
1173 /**
1174 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1175 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1176 * @param LPTIMx Low-Power Timer instance
1177 * @retval State of bit (1 or 0).
1178 */
LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef * LPTIMx)1179 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1180 {
1181 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1182 }
1183
1184 /**
1185 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1186 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1187 * @param LPTIMx Low-Power Timer instance
1188 * @retval None
1189 */
LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1190 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1191 {
1192 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1193 }
1194
1195 /**
1196 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1197 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1198 * @param LPTIMx Low-Power Timer instance
1199 * @retval None
1200 */
LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1201 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1202 {
1203 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1204 }
1205
1206 /**
1207 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1208 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1209 * @param LPTIMx Low-Power Timer instance
1210 * @retval State of bit (1 or 0).
1211 */
LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1212 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1213 {
1214 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1215 }
1216
1217 /**
1218 * @brief Enable compare register write completed interrupt (CMPOKIE).
1219 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1220 * @param LPTIMx Low-Power Timer instance
1221 * @retval None
1222 */
LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1223 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1224 {
1225 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1226 }
1227
1228 /**
1229 * @brief Disable compare register write completed interrupt (CMPOKIE).
1230 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1231 * @param LPTIMx Low-Power Timer instance
1232 * @retval None
1233 */
LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1234 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1235 {
1236 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1237 }
1238
1239 /**
1240 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1241 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1242 * @param LPTIMx Low-Power Timer instance
1243 * @retval State of bit (1 or 0).
1244 */
LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef * LPTIMx)1245 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1246 {
1247 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1248 }
1249
1250 /**
1251 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1252 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1253 * @param LPTIMx Low-Power Timer instance
1254 * @retval None
1255 */
LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef * LPTIMx)1256 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1257 {
1258 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1259 }
1260
1261 /**
1262 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1263 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1264 * @param LPTIMx Low-Power Timer instance
1265 * @retval None
1266 */
LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef * LPTIMx)1267 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1268 {
1269 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1270 }
1271
1272 /**
1273 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1274 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1275 * @param LPTIMx Low-Power Timer instance
1276 * @retval State of bit(1 or 0).
1277 */
LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef * LPTIMx)1278 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1279 {
1280 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1281 }
1282
1283 /**
1284 * @brief Enable direction change to up interrupt (UPIE).
1285 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1286 * @param LPTIMx Low-Power Timer instance
1287 * @retval None
1288 */
LL_LPTIM_EnableIT_UP(LPTIM_TypeDef * LPTIMx)1289 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1290 {
1291 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1292 }
1293
1294 /**
1295 * @brief Disable direction change to up interrupt (UPIE).
1296 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1297 * @param LPTIMx Low-Power Timer instance
1298 * @retval None
1299 */
LL_LPTIM_DisableIT_UP(LPTIM_TypeDef * LPTIMx)1300 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1301 {
1302 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1303 }
1304
1305 /**
1306 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1307 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1308 * @param LPTIMx Low-Power Timer instance
1309 * @retval State of bit(1 or 0).
1310 */
LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef * LPTIMx)1311 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1312 {
1313 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1314 }
1315
1316 /**
1317 * @brief Enable direction change to down interrupt (DOWNIE).
1318 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1319 * @param LPTIMx Low-Power Timer instance
1320 * @retval None
1321 */
LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef * LPTIMx)1322 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1323 {
1324 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1325 }
1326
1327 /**
1328 * @brief Disable direction change to down interrupt (DOWNIE).
1329 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1330 * @param LPTIMx Low-Power Timer instance
1331 * @retval None
1332 */
LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef * LPTIMx)1333 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1334 {
1335 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1336 }
1337
1338 /**
1339 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1340 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1341 * @param LPTIMx Low-Power Timer instance
1342 * @retval State of bit(1 or 0).
1343 */
LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef * LPTIMx)1344 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1345 {
1346 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1347 }
1348
1349 /**
1350 * @}
1351 */
1352
1353 /**
1354 * @}
1355 */
1356
1357 /**
1358 * @}
1359 */
1360
1361 #endif /* LPTIM1 */
1362
1363 /**
1364 * @}
1365 */
1366
1367 #ifdef __cplusplus
1368 }
1369 #endif
1370
1371 #endif /* STM32F7xx_LL_LPTIM_H */
1372
