1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_spdifrx.h 4 * @author MCD Application Team 5 * @brief Header file of SPDIFRX HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F7xx_HAL_SPDIFRX_H 21 #define STM32F7xx_HAL_SPDIFRX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f7xx_hal_def.h" 29 30 31 /** @addtogroup STM32F7xx_HAL_Driver 32 * @{ 33 */ 34 #if defined (SPDIFRX) 35 36 /** @addtogroup SPDIFRX 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief SPDIFRX Init structure definition 47 */ 48 typedef struct 49 { 50 uint32_t InputSelection; /*!< Specifies the SPDIF input selection. 51 This parameter can be a value of @ref SPDIFRX_Input_Selection */ 52 53 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase. 54 This parameter can be a value of @ref SPDIFRX_Max_Retries */ 55 56 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input. 57 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */ 58 59 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status 60 from channel A or B. 61 This parameter can be a value of @ref SPDIFRX_Channel_Selection */ 62 63 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 64 This parameter can be a value of @ref SPDIFRX_Data_Format */ 65 66 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 67 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 68 69 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not 70 into the received frame. 71 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 72 73 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not 74 into the received frame. 75 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 76 77 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 78 This parameter can be a value of @ref SPDIFRX_V_Mask */ 79 80 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not 81 into the received frame. 82 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 83 } SPDIFRX_InitTypeDef; 84 85 /** 86 * @brief SPDIFRX SetDataFormat structure definition 87 */ 88 typedef struct 89 { 90 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 91 This parameter can be a value of @ref SPDIFRX_Data_Format */ 92 93 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 94 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 95 96 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not 97 into the received frame. 98 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 99 100 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not 101 into the received frame. 102 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 103 104 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 105 This parameter can be a value of @ref SPDIFRX_V_Mask */ 106 107 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not 108 into the received frame. 109 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 110 111 } SPDIFRX_SetDataFormatTypeDef; 112 113 /** 114 * @brief HAL State structures definition 115 */ 116 typedef enum 117 { 118 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */ 119 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */ 120 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */ 121 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */ 122 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */ 123 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */ 124 } HAL_SPDIFRX_StateTypeDef; 125 126 /** 127 * @brief SPDIFRX handle Structure definition 128 */ 129 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 130 typedef struct __SPDIFRX_HandleTypeDef 131 #else 132 typedef struct 133 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 134 { 135 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */ 136 137 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */ 138 139 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */ 140 141 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */ 142 143 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */ 144 145 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter 146 (This field is initialized at the 147 same value as transfer size at the 148 beginning of the transfer and 149 decremented when a sample is received. 150 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 151 152 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */ 153 154 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter 155 (This field is initialized at the 156 same value as transfer size at the 157 beginning of the transfer and 158 decremented when a sample is received. 159 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 160 161 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information 162 DMA handle parameters */ 163 164 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */ 165 166 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */ 167 168 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */ 169 170 __IO uint32_t ErrorCode; /* SPDIFRX Error code */ 171 172 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 173 void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow half completed 174 callback */ 175 void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow completed callback */ 176 void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow half completed 177 callback */ 178 void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow completed callback */ 179 void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX error callback */ 180 void (* MspInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Msp Init callback */ 181 void (* MspDeInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Msp DeInit callback */ 182 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 183 184 } SPDIFRX_HandleTypeDef; 185 186 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 187 /** 188 * @brief HAL SPDIFRX Callback ID enumeration definition 189 */ 190 typedef enum 191 { 192 HAL_SPDIFRX_RX_HALF_CB_ID = 0x00U, /*!< SPDIFRX Data flow half completed callback ID */ 193 HAL_SPDIFRX_RX_CPLT_CB_ID = 0x01U, /*!< SPDIFRX Data flow completed callback */ 194 HAL_SPDIFRX_CX_HALF_CB_ID = 0x02U, /*!< SPDIFRX Control flow half completed callback */ 195 HAL_SPDIFRX_CX_CPLT_CB_ID = 0x03U, /*!< SPDIFRX Control flow completed callback */ 196 HAL_SPDIFRX_ERROR_CB_ID = 0x04U, /*!< SPDIFRX error callback */ 197 HAL_SPDIFRX_MSPINIT_CB_ID = 0x05U, /*!< SPDIFRX Msp Init callback ID */ 198 HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U /*!< SPDIFRX Msp DeInit callback ID */ 199 } HAL_SPDIFRX_CallbackIDTypeDef; 200 201 /** 202 * @brief HAL SPDIFRX Callback pointer definition 203 */ 204 typedef void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef *hspdif); /*!< pointer to an SPDIFRX callback 205 function */ 206 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 207 /** 208 * @} 209 */ 210 /* Exported constants --------------------------------------------------------*/ 211 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants 212 * @{ 213 */ 214 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code 215 * @{ 216 */ 217 #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 218 #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ 219 #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U) /*!< OVR error */ 220 #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U) /*!< Parity error */ 221 #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */ 222 #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U) /*!< Unknown Error error */ 223 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 224 #define HAL_SPDIFRX_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 225 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 226 /** 227 * @} 228 */ 229 230 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection 231 * @{ 232 */ 233 #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U) 234 #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U) 235 #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U) 236 #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U) 237 /** 238 * @} 239 */ 240 241 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries 242 * @{ 243 */ 244 #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U) 245 #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U) 246 #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U) 247 #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U) 248 /** 249 * @} 250 */ 251 252 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity 253 * @{ 254 */ 255 #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U) 256 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA) 257 /** 258 * @} 259 */ 260 261 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask 262 * @{ 263 */ 264 #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U) 265 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK) 266 /** 267 * @} 268 */ 269 270 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask 271 * @{ 272 */ 273 #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied 274 into the SPDIF_DR */ 275 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied 276 into the SPDIF_DR, zeros are written instead*/ 277 /** 278 * @} 279 */ 280 281 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask 282 * @{ 283 */ 284 #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U) 285 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK) 286 /** 287 * @} 288 */ 289 290 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask 291 * @{ 292 */ 293 #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U) 294 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK) 295 /** 296 * @} 297 */ 298 299 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection 300 * @{ 301 */ 302 #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U) 303 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL) 304 /** 305 * @} 306 */ 307 308 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format 309 * @{ 310 */ 311 #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U) 312 #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U) 313 #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U) 314 /** 315 * @} 316 */ 317 318 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode 319 * @{ 320 */ 321 #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U) 322 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO) 323 /** 324 * @} 325 */ 326 327 /** @defgroup SPDIFRX_State SPDIFRX State 328 * @{ 329 */ 330 331 #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU) 332 #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U) 333 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN) 334 /** 335 * @} 336 */ 337 338 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition 339 * @{ 340 */ 341 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE) 342 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE) 343 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE) 344 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE) 345 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE) 346 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE) 347 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE ) 348 /** 349 * @} 350 */ 351 352 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition 353 * @{ 354 */ 355 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE) 356 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE) 357 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR) 358 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR) 359 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD) 360 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD) 361 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR) 362 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR) 363 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR) 364 /** 365 * @} 366 */ 367 368 /** 369 * @} 370 */ 371 372 /* Exported macros -----------------------------------------------------------*/ 373 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros 374 * @{ 375 */ 376 377 /** @brief Reset SPDIFRX handle state 378 * @param __HANDLE__ SPDIFRX handle. 379 * @retval None 380 */ 381 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 382 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\ 383 (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\ 384 (__HANDLE__)->MspInitCallback = NULL;\ 385 (__HANDLE__)->MspDeInitCallback = NULL;\ 386 }while(0) 387 #else 388 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET) 389 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 390 391 /** @brief Disable the specified SPDIFRX peripheral (IDLE State). 392 * @param __HANDLE__ specifies the SPDIFRX Handle. 393 * @retval None 394 */ 395 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE) 396 397 /** @brief Enable the specified SPDIFRX peripheral (SYNC State). 398 * @param __HANDLE__ specifies the SPDIFRX Handle. 399 * @retval None 400 */ 401 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC) 402 403 404 /** @brief Enable the specified SPDIFRX peripheral (RCV State). 405 * @param __HANDLE__ specifies the SPDIFRX Handle. 406 * @retval None 407 */ 408 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV) 409 410 411 /** @brief Enable or disable the specified SPDIFRX interrupts. 412 * @param __HANDLE__ specifies the SPDIFRX Handle. 413 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 414 * This parameter can be one of the following values: 415 * @arg SPDIFRX_IT_RXNE 416 * @arg SPDIFRX_IT_CSRNE 417 * @arg SPDIFRX_IT_PERRIE 418 * @arg SPDIFRX_IT_OVRIE 419 * @arg SPDIFRX_IT_SBLKIE 420 * @arg SPDIFRX_IT_SYNCDIE 421 * @arg SPDIFRX_IT_IFEIE 422 * @retval None 423 */ 424 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 425 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR\ 426 &= (uint16_t)(~(__INTERRUPT__))) 427 428 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled. 429 * @param __HANDLE__ specifies the SPDIFRX Handle. 430 * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check. 431 * This parameter can be one of the following values: 432 * @arg SPDIFRX_IT_RXNE 433 * @arg SPDIFRX_IT_CSRNE 434 * @arg SPDIFRX_IT_PERRIE 435 * @arg SPDIFRX_IT_OVRIE 436 * @arg SPDIFRX_IT_SBLKIE 437 * @arg SPDIFRX_IT_SYNCDIE 438 * @arg SPDIFRX_IT_IFEIE 439 * @retval The new state of __IT__ (TRUE or FALSE). 440 */ 441 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR\ 442 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 443 444 /** @brief Checks whether the specified SPDIFRX flag is set or not. 445 * @param __HANDLE__ specifies the SPDIFRX Handle. 446 * @param __FLAG__ specifies the flag to check. 447 * This parameter can be one of the following values: 448 * @arg SPDIFRX_FLAG_RXNE 449 * @arg SPDIFRX_FLAG_CSRNE 450 * @arg SPDIFRX_FLAG_PERR 451 * @arg SPDIFRX_FLAG_OVR 452 * @arg SPDIFRX_FLAG_SBD 453 * @arg SPDIFRX_FLAG_SYNCD 454 * @arg SPDIFRX_FLAG_FERR 455 * @arg SPDIFRX_FLAG_SERR 456 * @arg SPDIFRX_FLAG_TERR 457 * @retval The new state of __FLAG__ (TRUE or FALSE). 458 */ 459 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR)\ 460 & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 461 462 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit. 463 * @param __HANDLE__ specifies the USART Handle. 464 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 465 * to clear the corresponding interrupt 466 * This parameter can be one of the following values: 467 * @arg SPDIFRX_FLAG_PERR 468 * @arg SPDIFRX_FLAG_OVR 469 * @arg SPDIFRX_SR_SBD 470 * @arg SPDIFRX_SR_SYNCD 471 * @retval None 472 */ 473 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__)) 474 475 /** 476 * @} 477 */ 478 479 /* Exported functions --------------------------------------------------------*/ 480 /** @addtogroup SPDIFRX_Exported_Functions 481 * @{ 482 */ 483 484 /** @addtogroup SPDIFRX_Exported_Functions_Group1 485 * @{ 486 */ 487 /* Initialization/de-initialization functions **********************************/ 488 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif); 489 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif); 490 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif); 491 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif); 492 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat); 493 494 /* Callbacks Register/UnRegister functions ***********************************/ 495 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 496 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, 497 pSPDIFRX_CallbackTypeDef pCallback); 498 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, 499 HAL_SPDIFRX_CallbackIDTypeDef CallbackID); 500 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 501 /** 502 * @} 503 */ 504 505 /** @addtogroup SPDIFRX_Exported_Functions_Group2 506 * @{ 507 */ 508 /* I/O operation functions ***************************************************/ 509 /* Blocking mode: Polling */ 510 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, 511 uint32_t Timeout); 512 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, 513 uint32_t Timeout); 514 515 /* Non-Blocking mode: Interrupt */ 516 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 517 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 518 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif); 519 520 /* Non-Blocking mode: DMA */ 521 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 522 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 523 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif); 524 525 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 526 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 527 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 528 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif); 529 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 530 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 531 /** 532 * @} 533 */ 534 535 /** @addtogroup SPDIFRX_Exported_Functions_Group3 536 * @{ 537 */ 538 /* Peripheral Control and State functions ************************************/ 539 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif); 540 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif); 541 /** 542 * @} 543 */ 544 545 /** 546 * @} 547 */ 548 /* Private types -------------------------------------------------------------*/ 549 /* Private variables ---------------------------------------------------------*/ 550 /* Private constants ---------------------------------------------------------*/ 551 /* Private macros ------------------------------------------------------------*/ 552 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros 553 * @{ 554 */ 555 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \ 556 ((INPUT) == SPDIFRX_INPUT_IN2) || \ 557 ((INPUT) == SPDIFRX_INPUT_IN3) || \ 558 ((INPUT) == SPDIFRX_INPUT_IN0)) 559 560 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \ 561 ((RET) == SPDIFRX_MAXRETRIES_3) || \ 562 ((RET) == SPDIFRX_MAXRETRIES_15) || \ 563 ((RET) == SPDIFRX_MAXRETRIES_63)) 564 565 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \ 566 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF)) 567 568 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \ 569 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF)) 570 571 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \ 572 ((VAL) == SPDIFRX_VALIDITYMASK_ON)) 573 574 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \ 575 ((VAL) == SPDIFRX_PARITYERRORMASK_ON)) 576 577 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \ 578 ((CHANNEL) == SPDIFRX_CHANNEL_B)) 579 580 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \ 581 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \ 582 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS)) 583 584 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \ 585 ((MODE) == SPDIFRX_STEREOMODE_ENABLE)) 586 587 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \ 588 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF)) 589 590 /** 591 * @} 592 */ 593 594 /* Private functions ---------------------------------------------------------*/ 595 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions 596 * @{ 597 */ 598 /** 599 * @} 600 */ 601 602 /** 603 * @} 604 */ 605 #endif /* SPDIFRX */ 606 /** 607 * @} 608 */ 609 610 611 #ifdef __cplusplus 612 } 613 #endif 614 615 616 #endif /* STM32F7xx_HAL_SPDIFRX_H */ 617
