1 /**
2 ******************************************************************************
3 * @file stm32f4xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32F4xx_LL_LPTIM_H
21 #define STM32F4xx_LL_LPTIM_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32f4xx.h"
29
30 /** @addtogroup STM32F4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPTIM1)
35
36 /** @defgroup LPTIM_LL LPTIM
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
58 * @{
59 */
60
61 /**
62 * @brief LPTIM Init structure definition
63 */
64 typedef struct
65 {
66 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
67 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
68
69 This feature can be modified afterwards using unitary
70 function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary
76 function @ref LL_LPTIM_SetPrescaler().*/
77
78 uint32_t Waveform; /*!< Specifies the waveform shape.
79 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
80
81 This feature can be modified afterwards using unitary
82 function @ref LL_LPTIM_ConfigOutput().*/
83
84 uint32_t Polarity; /*!< Specifies waveform polarity.
85 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
86
87 This feature can be modified afterwards using unitary
88 function @ref LL_LPTIM_ConfigOutput().*/
89 } LL_LPTIM_InitTypeDef;
90
91 /**
92 * @}
93 */
94 #endif /* USE_FULL_LL_DRIVER */
95
96 /* Exported constants --------------------------------------------------------*/
97 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
98 * @{
99 */
100
101 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
102 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
103 * @{
104 */
105 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
106 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
107 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
108 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
109 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
110 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
111 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
112 /**
113 * @}
114 */
115
116 /** @defgroup LPTIM_LL_EC_IT IT Defines
117 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
118 * @{
119 */
120 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match */
121 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK */
122 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
123 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger edge event */
124 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK */
125 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Counter direction change down to up */
126 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Counter direction change up to down */
127 /**
128 * @}
129 */
130
131 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
132 * @{
133 */
134 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
135 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
136 /**
137 * @}
138 */
139
140 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
141 * @{
142 */
143 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
144 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
145 /**
146 * @}
147 */
148
149 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
150 * @{
151 */
152 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
153 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
154 /**
155 * @}
156 */
157
158 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
159 * @{
160 */
161 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
162 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
163 /**
164 * @}
165 */
166
167 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
168 * @{
169 */
170 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
171 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
172 /**
173 * @}
174 */
175
176 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
177 * @{
178 */
179 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
180 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
181 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
182 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
183 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
184 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
185 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
186 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
187 /**
188 * @}
189 */
190
191 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
192 * @{
193 */
194 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
195 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
196 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
197 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
198 #define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to TIM1*/
199 #define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to TIM5*/
200 /**
201 * @}
202 */
203
204 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
205 * @{
206 */
207 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
208 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
209 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
210 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
211 /**
212 * @}
213 */
214
215 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
216 * @{
217 */
218 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
219 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
220 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
221 /**
222 * @}
223 */
224
225 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
226 * @{
227 */
228 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
229 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
230 /**
231 * @}
232 */
233
234 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
235 * @{
236 */
237 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
238 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
239 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
240 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
241 /**
242 * @}
243 */
244
245 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
246 * @{
247 */
248 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
249 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
250 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
251 /**
252 * @}
253 */
254
255 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
256 * @{
257 */
258 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
259 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
260 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
261 /**
262 * @}
263 */
264
265 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
266 * @{
267 */
268 #define LL_LPTIM_INPUT1_SRC_PAD_AF 0x00000000U
269 #define LL_LPTIM_INPUT1_SRC_PAD_PA4 LPTIM_OR_OR_0
270 #define LL_LPTIM_INPUT1_SRC_PAD_PB9 LPTIM_OR_OR_1
271 #define LL_LPTIM_INPUT1_SRC_TIM_DAC LPTIM_OR_OR
272 /**
273 * @}
274 */
275
276 /**
277 * @}
278 */
279
280 /* Exported macro ------------------------------------------------------------*/
281 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
282 * @{
283 */
284
285 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
286 * @{
287 */
288
289 /**
290 * @brief Write a value in LPTIM register
291 * @param __INSTANCE__ LPTIM Instance
292 * @param __REG__ Register to be written
293 * @param __VALUE__ Value to be written in the register
294 * @retval None
295 */
296 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
297
298 /**
299 * @brief Read a value in LPTIM register
300 * @param __INSTANCE__ LPTIM Instance
301 * @param __REG__ Register to be read
302 * @retval Register value
303 */
304 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
305 /**
306 * @}
307 */
308
309 /**
310 * @}
311 */
312
313 /* Exported functions --------------------------------------------------------*/
314 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
315 * @{
316 */
317
318 /** Legacy definitions for compatibility purpose
319 @cond 0
320 */
321 #define LL_LPTIM_ClearFLAG_CMPM LL_LPTIM_ClearFlag_CMPM
322 #define LL_LPTIM_ClearFLAG_CC1 LL_LPTIM_ClearFlag_CC1
323 #define LL_LPTIM_ClearFLAG_CC2 LL_LPTIM_ClearFlag_CC2
324 #define LL_LPTIM_ClearFLAG_CC1O LL_LPTIM_ClearFlag_CC1O
325 #define LL_LPTIM_ClearFLAG_CC2O LL_LPTIM_ClearFlag_CC2O
326 #define LL_LPTIM_ClearFLAG_ARRM LL_LPTIM_ClearFlag_ARRM
327 /**
328 @endcond
329 */
330
331 #if defined(USE_FULL_LL_DRIVER)
332 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
333 * @{
334 */
335
336 ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx);
337 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
338 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
339 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
340 /**
341 * @}
342 */
343 #endif /* USE_FULL_LL_DRIVER */
344
345 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
346 * @{
347 */
348
349 /**
350 * @brief Enable the LPTIM instance
351 * @note After setting the ENABLE bit, a delay of two counter clock is needed
352 * before the LPTIM instance is actually enabled.
353 * @rmtoll CR ENABLE LL_LPTIM_Enable
354 * @param LPTIMx Low-Power Timer instance
355 * @retval None
356 */
LL_LPTIM_Enable(LPTIM_TypeDef * LPTIMx)357 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
358 {
359 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
360 }
361
362 /**
363 * @brief Indicates whether the LPTIM instance is enabled.
364 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
365 * @param LPTIMx Low-Power Timer instance
366 * @retval State of bit (1 or 0).
367 */
LL_LPTIM_IsEnabled(const LPTIM_TypeDef * LPTIMx)368 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
369 {
370 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
371 }
372
373 /**
374 * @brief Starts the LPTIM counter in the desired mode.
375 * @note LPTIM instance must be enabled before starting the counter.
376 * @note It is possible to change on the fly from One Shot mode to
377 * Continuous mode.
378 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
379 * CR SNGSTRT LL_LPTIM_StartCounter
380 * @param LPTIMx Low-Power Timer instance
381 * @param OperatingMode This parameter can be one of the following values:
382 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
383 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
384 * @retval None
385 */
LL_LPTIM_StartCounter(LPTIM_TypeDef * LPTIMx,uint32_t OperatingMode)386 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
387 {
388 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
389 }
390
391 /**
392 * @brief Set the LPTIM registers update mode (enable/disable register preload)
393 * @note This function must be called when the LPTIM instance is disabled.
394 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
395 * @param LPTIMx Low-Power Timer instance
396 * @param UpdateMode This parameter can be one of the following values:
397 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
398 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
399 * @retval None
400 */
LL_LPTIM_SetUpdateMode(LPTIM_TypeDef * LPTIMx,uint32_t UpdateMode)401 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
402 {
403 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
404 }
405
406 /**
407 * @brief Get the LPTIM registers update mode
408 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
409 * @param LPTIMx Low-Power Timer instance
410 * @retval Returned value can be one of the following values:
411 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
412 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
413 */
LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef * LPTIMx)414 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
415 {
416 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
417 }
418
419 /**
420 * @brief Set the auto reload value
421 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
422 * @note After a write to the LPTIMx_ARR register a new write operation to the
423 * same register can only be performed when the previous write operation
424 * is completed. Any successive write before the ARROK flag is set, will
425 * lead to unpredictable results.
426 * @note autoreload value be strictly greater than the compare value.
427 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
428 * @param LPTIMx Low-Power Timer instance
429 * @param AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
430 * @retval None
431 */
LL_LPTIM_SetAutoReload(LPTIM_TypeDef * LPTIMx,uint32_t AutoReload)432 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
433 {
434 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
435 }
436
437 /**
438 * @brief Get actual auto reload value
439 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
440 * @param LPTIMx Low-Power Timer instance
441 * @retval AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
442 */
LL_LPTIM_GetAutoReload(const LPTIM_TypeDef * LPTIMx)443 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
444 {
445 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
446 }
447
448 /**
449 * @brief Set the compare value
450 * @note After a write to the LPTIMx_CMP register a new write operation to the
451 * same register can only be performed when the previous write operation
452 * is completed. Any successive write before the CMPOK flag is set, will
453 * lead to unpredictable results.
454 * @rmtoll CMP CMP LL_LPTIM_SetCompare
455 * @param LPTIMx Low-Power Timer instance
456 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
457 * @retval None
458 */
LL_LPTIM_SetCompare(LPTIM_TypeDef * LPTIMx,uint32_t CompareValue)459 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
460 {
461 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
462 }
463
464 /**
465 * @brief Get actual compare value
466 * @rmtoll CMP CMP LL_LPTIM_GetCompare
467 * @param LPTIMx Low-Power Timer instance
468 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
469 */
LL_LPTIM_GetCompare(const LPTIM_TypeDef * LPTIMx)470 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
471 {
472 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
473 }
474
475 /**
476 * @brief Get actual counter value
477 * @note When the LPTIM instance is running with an asynchronous clock, reading
478 * the LPTIMx_CNT register may return unreliable values. So in this case
479 * it is necessary to perform two consecutive read accesses and verify
480 * that the two returned values are identical.
481 * @rmtoll CNT CNT LL_LPTIM_GetCounter
482 * @param LPTIMx Low-Power Timer instance
483 * @retval Counter value
484 */
LL_LPTIM_GetCounter(const LPTIM_TypeDef * LPTIMx)485 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
486 {
487 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
488 }
489
490 /**
491 * @brief Set the counter mode (selection of the LPTIM counter clock source).
492 * @note The counter mode can be set only when the LPTIM instance is disabled.
493 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
494 * @param LPTIMx Low-Power Timer instance
495 * @param CounterMode This parameter can be one of the following values:
496 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
497 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
498 * @retval None
499 */
LL_LPTIM_SetCounterMode(LPTIM_TypeDef * LPTIMx,uint32_t CounterMode)500 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
501 {
502 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
503 }
504
505 /**
506 * @brief Get the counter mode
507 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
508 * @param LPTIMx Low-Power Timer instance
509 * @retval Returned value can be one of the following values:
510 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
511 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
512 */
LL_LPTIM_GetCounterMode(const LPTIM_TypeDef * LPTIMx)513 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
514 {
515 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
516 }
517
518 /**
519 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
520 * @note This function must be called when the LPTIM instance is disabled.
521 * @note Regarding the LPTIM output polarity the change takes effect
522 * immediately, so the output default value will change immediately after
523 * the polarity is re-configured, even before the timer is enabled.
524 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
525 * CFGR WAVPOL LL_LPTIM_ConfigOutput
526 * @param LPTIMx Low-Power Timer instance
527 * @param Waveform This parameter can be one of the following values:
528 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
529 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
530 * @param Polarity This parameter can be one of the following values:
531 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
532 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
533 * @retval None
534 */
LL_LPTIM_ConfigOutput(LPTIM_TypeDef * LPTIMx,uint32_t Waveform,uint32_t Polarity)535 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
536 {
537 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
538 }
539
540 /**
541 * @brief Set waveform shape
542 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
543 * @param LPTIMx Low-Power Timer instance
544 * @param Waveform This parameter can be one of the following values:
545 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
546 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
547 * @retval None
548 */
LL_LPTIM_SetWaveform(LPTIM_TypeDef * LPTIMx,uint32_t Waveform)549 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
550 {
551 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
552 }
553
554 /**
555 * @brief Get actual waveform shape
556 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
557 * @param LPTIMx Low-Power Timer instance
558 * @retval Returned value can be one of the following values:
559 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
560 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
561 */
LL_LPTIM_GetWaveform(const LPTIM_TypeDef * LPTIMx)562 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
563 {
564 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
565 }
566
567 /**
568 * @brief Set output polarity
569 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
570 * @param LPTIMx Low-Power Timer instance
571 * @param Polarity This parameter can be one of the following values:
572 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
573 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
574 * @retval None
575 */
LL_LPTIM_SetPolarity(LPTIM_TypeDef * LPTIMx,uint32_t Polarity)576 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
577 {
578 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
579 }
580
581 /**
582 * @brief Get actual output polarity
583 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
584 * @param LPTIMx Low-Power Timer instance
585 * @retval Returned value can be one of the following values:
586 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
587 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
588 */
LL_LPTIM_GetPolarity(const LPTIM_TypeDef * LPTIMx)589 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
590 {
591 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
592 }
593
594 /**
595 * @brief Set actual prescaler division ratio.
596 * @note This function must be called when the LPTIM instance is disabled.
597 * @note When the LPTIM is configured to be clocked by an internal clock source
598 * and the LPTIM counter is configured to be updated by active edges
599 * detected on the LPTIM external Input1, the internal clock provided to
600 * the LPTIM must be not be prescaled.
601 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
602 * @param LPTIMx Low-Power Timer instance
603 * @param Prescaler This parameter can be one of the following values:
604 * @arg @ref LL_LPTIM_PRESCALER_DIV1
605 * @arg @ref LL_LPTIM_PRESCALER_DIV2
606 * @arg @ref LL_LPTIM_PRESCALER_DIV4
607 * @arg @ref LL_LPTIM_PRESCALER_DIV8
608 * @arg @ref LL_LPTIM_PRESCALER_DIV16
609 * @arg @ref LL_LPTIM_PRESCALER_DIV32
610 * @arg @ref LL_LPTIM_PRESCALER_DIV64
611 * @arg @ref LL_LPTIM_PRESCALER_DIV128
612 * @retval None
613 */
LL_LPTIM_SetPrescaler(LPTIM_TypeDef * LPTIMx,uint32_t Prescaler)614 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
615 {
616 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
617 }
618
619 /**
620 * @brief Get actual prescaler division ratio.
621 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
622 * @param LPTIMx Low-Power Timer instance
623 * @retval Returned value can be one of the following values:
624 * @arg @ref LL_LPTIM_PRESCALER_DIV1
625 * @arg @ref LL_LPTIM_PRESCALER_DIV2
626 * @arg @ref LL_LPTIM_PRESCALER_DIV4
627 * @arg @ref LL_LPTIM_PRESCALER_DIV8
628 * @arg @ref LL_LPTIM_PRESCALER_DIV16
629 * @arg @ref LL_LPTIM_PRESCALER_DIV32
630 * @arg @ref LL_LPTIM_PRESCALER_DIV64
631 * @arg @ref LL_LPTIM_PRESCALER_DIV128
632 */
LL_LPTIM_GetPrescaler(const LPTIM_TypeDef * LPTIMx)633 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
634 {
635 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
636 }
637
638 /**
639 * @brief Set LPTIM input 1 source (default GPIO).
640 * @rmtoll OR OR LL_LPTIM_SetInput1Src
641 * @param LPTIMx Low-Power Timer instance
642 * @param Src This parameter can be one of the following values:
643 * @arg @ref LL_LPTIM_INPUT1_SRC_PAD_AF
644 * @arg @ref LL_LPTIM_INPUT1_SRC_PAD_PA4
645 * @arg @ref LL_LPTIM_INPUT1_SRC_PAD_PB9
646 * @arg @ref LL_LPTIM_INPUT1_SRC_TIM_DAC
647 * @retval None
648 */
LL_LPTIM_SetInput1Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)649 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
650 {
651 MODIFY_REG(LPTIMx->OR, LPTIM_OR_OR, Src);
652 }
653
654 /**
655 * @}
656 */
657
658 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
659 * @{
660 */
661
662 /**
663 * @brief Enable the timeout function
664 * @note This function must be called when the LPTIM instance is disabled.
665 * @note The first trigger event will start the timer, any successive trigger
666 * event will reset the counter and the timer will restart.
667 * @note The timeout value corresponds to the compare value; if no trigger
668 * occurs within the expected time frame, the MCU is waked-up by the
669 * compare match event.
670 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
671 * @param LPTIMx Low-Power Timer instance
672 * @retval None
673 */
LL_LPTIM_EnableTimeout(LPTIM_TypeDef * LPTIMx)674 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
675 {
676 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
677 }
678
679 /**
680 * @brief Disable the timeout function
681 * @note This function must be called when the LPTIM instance is disabled.
682 * @note A trigger event arriving when the timer is already started will be
683 * ignored.
684 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
685 * @param LPTIMx Low-Power Timer instance
686 * @retval None
687 */
LL_LPTIM_DisableTimeout(LPTIM_TypeDef * LPTIMx)688 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
689 {
690 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
691 }
692
693 /**
694 * @brief Indicate whether the timeout function is enabled.
695 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
696 * @param LPTIMx Low-Power Timer instance
697 * @retval State of bit (1 or 0).
698 */
LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef * LPTIMx)699 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
700 {
701 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
702 }
703
704 /**
705 * @brief Start the LPTIM counter
706 * @note This function must be called when the LPTIM instance is disabled.
707 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
708 * @param LPTIMx Low-Power Timer instance
709 * @retval None
710 */
LL_LPTIM_TrigSw(LPTIM_TypeDef * LPTIMx)711 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
712 {
713 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
714 }
715
716 /**
717 * @brief Configure the external trigger used as a trigger event for the LPTIM.
718 * @note This function must be called when the LPTIM instance is disabled.
719 * @note An internal clock source must be present when a digital filter is
720 * required for the trigger.
721 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
722 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
723 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
724 * @param LPTIMx Low-Power Timer instance
725 * @param Source This parameter can be one of the following values:
726 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
727 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
728 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
729 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
730 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
731 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
732 * @param Filter This parameter can be one of the following values:
733 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
734 * @arg @ref LL_LPTIM_TRIG_FILTER_2
735 * @arg @ref LL_LPTIM_TRIG_FILTER_4
736 * @arg @ref LL_LPTIM_TRIG_FILTER_8
737 * @param Polarity This parameter can be one of the following values:
738 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
739 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
740 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
741 * @retval None
742 */
LL_LPTIM_ConfigTrigger(LPTIM_TypeDef * LPTIMx,uint32_t Source,uint32_t Filter,uint32_t Polarity)743 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
744 {
745 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
746 }
747
748 /**
749 * @brief Get actual external trigger source.
750 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
751 * @param LPTIMx Low-Power Timer instance
752 * @retval Returned value can be one of the following values:
753 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
754 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
755 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
756 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
757 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
758 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
759 */
LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef * LPTIMx)760 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
761 {
762 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
763 }
764
765 /**
766 * @brief Get actual external trigger filter.
767 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
768 * @param LPTIMx Low-Power Timer instance
769 * @retval Returned value can be one of the following values:
770 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
771 * @arg @ref LL_LPTIM_TRIG_FILTER_2
772 * @arg @ref LL_LPTIM_TRIG_FILTER_4
773 * @arg @ref LL_LPTIM_TRIG_FILTER_8
774 */
LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef * LPTIMx)775 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
776 {
777 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
778 }
779
780 /**
781 * @brief Get actual external trigger polarity.
782 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
783 * @param LPTIMx Low-Power Timer instance
784 * @retval Returned value can be one of the following values:
785 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
786 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
787 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
788 */
LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef * LPTIMx)789 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
790 {
791 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
792 }
793
794 /**
795 * @}
796 */
797
798 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
799 * @{
800 */
801
802 /**
803 * @brief Set the source of the clock used by the LPTIM instance.
804 * @note This function must be called when the LPTIM instance is disabled.
805 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
806 * @param LPTIMx Low-Power Timer instance
807 * @param ClockSource This parameter can be one of the following values:
808 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
809 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
810 * @retval None
811 */
LL_LPTIM_SetClockSource(LPTIM_TypeDef * LPTIMx,uint32_t ClockSource)812 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
813 {
814 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
815 }
816
817 /**
818 * @brief Get actual LPTIM instance clock source.
819 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
820 * @param LPTIMx Low-Power Timer instance
821 * @retval Returned value can be one of the following values:
822 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
823 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
824 */
LL_LPTIM_GetClockSource(const LPTIM_TypeDef * LPTIMx)825 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
826 {
827 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
828 }
829
830 /**
831 * @brief Configure the active edge or edges used by the counter when
832 the LPTIM is clocked by an external clock source.
833 * @note This function must be called when the LPTIM instance is disabled.
834 * @note When both external clock signal edges are considered active ones,
835 * the LPTIM must also be clocked by an internal clock source with a
836 * frequency equal to at least four times the external clock frequency.
837 * @note An internal clock source must be present when a digital filter is
838 * required for external clock.
839 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
840 * CFGR CKPOL LL_LPTIM_ConfigClock
841 * @param LPTIMx Low-Power Timer instance
842 * @param ClockFilter This parameter can be one of the following values:
843 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
844 * @arg @ref LL_LPTIM_CLK_FILTER_2
845 * @arg @ref LL_LPTIM_CLK_FILTER_4
846 * @arg @ref LL_LPTIM_CLK_FILTER_8
847 * @param ClockPolarity This parameter can be one of the following values:
848 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
849 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
850 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
851 * @retval None
852 */
LL_LPTIM_ConfigClock(LPTIM_TypeDef * LPTIMx,uint32_t ClockFilter,uint32_t ClockPolarity)853 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
854 {
855 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
856 }
857
858 /**
859 * @brief Get actual clock polarity
860 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
861 * @param LPTIMx Low-Power Timer instance
862 * @retval Returned value can be one of the following values:
863 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
864 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
865 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
866 */
LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef * LPTIMx)867 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
868 {
869 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
870 }
871
872 /**
873 * @brief Get actual clock digital filter
874 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
875 * @param LPTIMx Low-Power Timer instance
876 * @retval Returned value can be one of the following values:
877 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
878 * @arg @ref LL_LPTIM_CLK_FILTER_2
879 * @arg @ref LL_LPTIM_CLK_FILTER_4
880 * @arg @ref LL_LPTIM_CLK_FILTER_8
881 */
LL_LPTIM_GetClockFilter(const LPTIM_TypeDef * LPTIMx)882 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
883 {
884 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
885 }
886
887 /**
888 * @}
889 */
890
891 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
892 * @{
893 */
894
895 /**
896 * @brief Configure the encoder mode.
897 * @note This function must be called when the LPTIM instance is disabled.
898 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
899 * @param LPTIMx Low-Power Timer instance
900 * @param EncoderMode This parameter can be one of the following values:
901 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
902 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
903 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
904 * @retval None
905 */
LL_LPTIM_SetEncoderMode(LPTIM_TypeDef * LPTIMx,uint32_t EncoderMode)906 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
907 {
908 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
909 }
910
911 /**
912 * @brief Get actual encoder mode.
913 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
914 * @param LPTIMx Low-Power Timer instance
915 * @retval Returned value can be one of the following values:
916 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
917 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
918 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
919 */
LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef * LPTIMx)920 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
921 {
922 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
923 }
924
925 /**
926 * @brief Enable the encoder mode
927 * @note This function must be called when the LPTIM instance is disabled.
928 * @note In this mode the LPTIM instance must be clocked by an internal clock
929 * source. Also, the prescaler division ratio must be equal to 1.
930 * @note LPTIM instance must be configured in continuous mode prior enabling
931 * the encoder mode.
932 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
933 * @param LPTIMx Low-Power Timer instance
934 * @retval None
935 */
LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef * LPTIMx)936 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
937 {
938 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
939 }
940
941 /**
942 * @brief Disable the encoder mode
943 * @note This function must be called when the LPTIM instance is disabled.
944 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
945 * @param LPTIMx Low-Power Timer instance
946 * @retval None
947 */
LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef * LPTIMx)948 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
949 {
950 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
951 }
952
953 /**
954 * @brief Indicates whether the LPTIM operates in encoder mode.
955 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
956 * @param LPTIMx Low-Power Timer instance
957 * @retval State of bit (1 or 0).
958 */
LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef * LPTIMx)959 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
960 {
961 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
962 }
963
964 /**
965 * @}
966 */
967
968 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
969 * @{
970 */
971
972
973 /**
974 * @brief Clear the compare match flag (CMPMCF)
975 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFlag_CMPM
976 * @param LPTIMx Low-Power Timer instance
977 * @retval None
978 */
LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef * LPTIMx)979 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef *LPTIMx)
980 {
981 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
982 }
983
984 /**
985 * @brief Inform application whether a compare match interrupt has occurred.
986 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
987 * @param LPTIMx Low-Power Timer instance
988 * @retval State of bit (1 or 0).
989 */
LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef * LPTIMx)990 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
991 {
992 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
993 }
994
995 /**
996 * @brief Clear the autoreload match flag (ARRMCF)
997 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFlag_ARRM
998 * @param LPTIMx Low-Power Timer instance
999 * @retval None
1000 */
LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef * LPTIMx)1001 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef *LPTIMx)
1002 {
1003 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
1004 }
1005
1006 /**
1007 * @brief Inform application whether a autoreload match interrupt has occurred.
1008 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
1009 * @param LPTIMx Low-Power Timer instance
1010 * @retval State of bit (1 or 0).
1011 */
LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef * LPTIMx)1012 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
1013 {
1014 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
1015 }
1016
1017 /**
1018 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
1019 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
1020 * @param LPTIMx Low-Power Timer instance
1021 * @retval None
1022 */
LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef * LPTIMx)1023 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1024 {
1025 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1026 }
1027
1028 /**
1029 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1030 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1031 * @param LPTIMx Low-Power Timer instance
1032 * @retval State of bit (1 or 0).
1033 */
LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1034 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1035 {
1036 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1037 }
1038
1039 /**
1040 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1041 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1042 * @param LPTIMx Low-Power Timer instance
1043 * @retval None
1044 */
LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef * LPTIMx)1045 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1046 {
1047 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1048 }
1049
1050 /**
1051 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully
1052 completed. If so, a new one can be initiated.
1053 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1054 * @param LPTIMx Low-Power Timer instance
1055 * @retval State of bit (1 or 0).
1056 */
LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef * LPTIMx)1057 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1058 {
1059 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1060 }
1061
1062 /**
1063 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1064 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1065 * @param LPTIMx Low-Power Timer instance
1066 * @retval None
1067 */
LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef * LPTIMx)1068 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1069 {
1070 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1071 }
1072
1073 /**
1074 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully
1075 completed. If so, a new one can be initiated.
1076 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1077 * @param LPTIMx Low-Power Timer instance
1078 * @retval State of bit (1 or 0).
1079 */
LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef * LPTIMx)1080 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1081 {
1082 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1083 }
1084
1085 /**
1086 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1087 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1088 * @param LPTIMx Low-Power Timer instance
1089 * @retval None
1090 */
LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef * LPTIMx)1091 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1092 {
1093 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1094 }
1095
1096 /**
1097 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance
1098 operates in encoder mode).
1099 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1100 * @param LPTIMx Low-Power Timer instance
1101 * @retval State of bit (1 or 0).
1102 */
LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef * LPTIMx)1103 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1104 {
1105 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1106 }
1107
1108 /**
1109 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1110 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1111 * @param LPTIMx Low-Power Timer instance
1112 * @retval None
1113 */
LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef * LPTIMx)1114 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1115 {
1116 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1117 }
1118
1119 /**
1120 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance
1121 operates in encoder mode).
1122 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1123 * @param LPTIMx Low-Power Timer instance
1124 * @retval State of bit (1 or 0).
1125 */
LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef * LPTIMx)1126 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1127 {
1128 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1129 }
1130
1131 /**
1132 * @}
1133 */
1134
1135 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1136 * @{
1137 */
1138
1139 /**
1140 * @brief Enable compare match interrupt (CMPMIE).
1141 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1142 * @param LPTIMx Low-Power Timer instance
1143 * @retval None
1144 */
LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef * LPTIMx)1145 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1146 {
1147 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1148 }
1149
1150 /**
1151 * @brief Disable compare match interrupt (CMPMIE).
1152 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1153 * @param LPTIMx Low-Power Timer instance
1154 * @retval None
1155 */
LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef * LPTIMx)1156 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1157 {
1158 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1159 }
1160
1161 /**
1162 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1163 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1164 * @param LPTIMx Low-Power Timer instance
1165 * @retval State of bit (1 or 0).
1166 */
LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef * LPTIMx)1167 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1168 {
1169 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1170 }
1171
1172 /**
1173 * @brief Enable autoreload match interrupt (ARRMIE).
1174 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1175 * @param LPTIMx Low-Power Timer instance
1176 * @retval None
1177 */
LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef * LPTIMx)1178 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1179 {
1180 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1181 }
1182
1183 /**
1184 * @brief Disable autoreload match interrupt (ARRMIE).
1185 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1186 * @param LPTIMx Low-Power Timer instance
1187 * @retval None
1188 */
LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef * LPTIMx)1189 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1190 {
1191 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1192 }
1193
1194 /**
1195 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1196 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1197 * @param LPTIMx Low-Power Timer instance
1198 * @retval State of bit (1 or 0).
1199 */
LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef * LPTIMx)1200 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1201 {
1202 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1203 }
1204
1205 /**
1206 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1207 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1208 * @param LPTIMx Low-Power Timer instance
1209 * @retval None
1210 */
LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1211 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1212 {
1213 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1214 }
1215
1216 /**
1217 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1218 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1219 * @param LPTIMx Low-Power Timer instance
1220 * @retval None
1221 */
LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1222 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1223 {
1224 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1225 }
1226
1227 /**
1228 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1229 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1230 * @param LPTIMx Low-Power Timer instance
1231 * @retval State of bit (1 or 0).
1232 */
LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1233 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1234 {
1235 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1236 }
1237
1238 /**
1239 * @brief Enable compare register write completed interrupt (CMPOKIE).
1240 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1241 * @param LPTIMx Low-Power Timer instance
1242 * @retval None
1243 */
LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1244 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1245 {
1246 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1247 }
1248
1249 /**
1250 * @brief Disable compare register write completed interrupt (CMPOKIE).
1251 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1252 * @param LPTIMx Low-Power Timer instance
1253 * @retval None
1254 */
LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1255 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1256 {
1257 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1258 }
1259
1260 /**
1261 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1262 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1263 * @param LPTIMx Low-Power Timer instance
1264 * @retval State of bit (1 or 0).
1265 */
LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef * LPTIMx)1266 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1267 {
1268 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1269 }
1270
1271 /**
1272 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1273 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1274 * @param LPTIMx Low-Power Timer instance
1275 * @retval None
1276 */
LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef * LPTIMx)1277 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1278 {
1279 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1280 }
1281
1282 /**
1283 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1284 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1285 * @param LPTIMx Low-Power Timer instance
1286 * @retval None
1287 */
LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef * LPTIMx)1288 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1289 {
1290 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1291 }
1292
1293 /**
1294 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1295 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1296 * @param LPTIMx Low-Power Timer instance
1297 * @retval State of bit(1 or 0).
1298 */
LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef * LPTIMx)1299 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1300 {
1301 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1302 }
1303
1304 /**
1305 * @brief Enable direction change to up interrupt (UPIE).
1306 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1307 * @param LPTIMx Low-Power Timer instance
1308 * @retval None
1309 */
LL_LPTIM_EnableIT_UP(LPTIM_TypeDef * LPTIMx)1310 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1311 {
1312 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1313 }
1314
1315 /**
1316 * @brief Disable direction change to up interrupt (UPIE).
1317 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1318 * @param LPTIMx Low-Power Timer instance
1319 * @retval None
1320 */
LL_LPTIM_DisableIT_UP(LPTIM_TypeDef * LPTIMx)1321 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1322 {
1323 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1324 }
1325
1326 /**
1327 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1328 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1329 * @param LPTIMx Low-Power Timer instance
1330 * @retval State of bit(1 or 0).
1331 */
LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef * LPTIMx)1332 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1333 {
1334 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1335 }
1336
1337 /**
1338 * @brief Enable direction change to down interrupt (DOWNIE).
1339 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1340 * @param LPTIMx Low-Power Timer instance
1341 * @retval None
1342 */
LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef * LPTIMx)1343 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1344 {
1345 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1346 }
1347
1348 /**
1349 * @brief Disable direction change to down interrupt (DOWNIE).
1350 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1351 * @param LPTIMx Low-Power Timer instance
1352 * @retval None
1353 */
LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef * LPTIMx)1354 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1355 {
1356 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1357 }
1358
1359 /**
1360 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1361 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1362 * @param LPTIMx Low-Power Timer instance
1363 * @retval State of bit(1 or 0).
1364 */
LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef * LPTIMx)1365 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1366 {
1367 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1368 }
1369
1370 /**
1371 * @}
1372 */
1373
1374 /**
1375 * @}
1376 */
1377
1378 /**
1379 * @}
1380 */
1381
1382 #endif /* LPTIM1 */
1383
1384 /**
1385 * @}
1386 */
1387
1388 #ifdef __cplusplus
1389 }
1390 #endif
1391
1392 #endif /* STM32F4xx_LL_LPTIM_H */
1393
