1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_spi.h 4 * @author MCD Application Team 5 * @brief Header file of SPI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F4xx_HAL_SPI_H 21 #define STM32F4xx_HAL_SPI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f4xx_hal_def.h" 29 30 /** @addtogroup STM32F4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup SPI 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SPI_Exported_Types SPI Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief SPI Configuration Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t Mode; /*!< Specifies the SPI operating mode. 49 This parameter can be a value of @ref SPI_Mode */ 50 51 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 52 This parameter can be a value of @ref SPI_Direction */ 53 54 uint32_t DataSize; /*!< Specifies the SPI data size. 55 This parameter can be a value of @ref SPI_Data_Size */ 56 57 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 58 This parameter can be a value of @ref SPI_Clock_Polarity */ 59 60 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 61 This parameter can be a value of @ref SPI_Clock_Phase */ 62 63 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 64 hardware (NSS pin) or by software using the SSI bit. 65 This parameter can be a value of @ref SPI_Slave_Select_management */ 66 67 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 68 used to configure the transmit and receive SCK clock. 69 This parameter can be a value of @ref SPI_BaudRate_Prescaler 70 @note The communication clock is derived from the master 71 clock. The slave clock does not need to be set. */ 72 73 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 74 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 75 76 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 77 This parameter can be a value of @ref SPI_TI_mode */ 78 79 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 80 This parameter can be a value of @ref SPI_CRC_Calculation */ 81 82 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 83 This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ 84 } SPI_InitTypeDef; 85 86 /** 87 * @brief HAL SPI State structure definition 88 */ 89 typedef enum 90 { 91 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 92 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 93 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 94 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 95 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 96 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 97 HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 98 HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 99 } HAL_SPI_StateTypeDef; 100 101 /** 102 * @brief SPI handle Structure definition 103 */ 104 typedef struct __SPI_HandleTypeDef 105 { 106 SPI_TypeDef *Instance; /*!< SPI registers base address */ 107 108 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 109 110 uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 111 112 uint16_t TxXferSize; /*!< SPI Tx Transfer size */ 113 114 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 115 116 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 117 118 uint16_t RxXferSize; /*!< SPI Rx Transfer size */ 119 120 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 121 122 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ 123 124 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ 125 126 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ 127 128 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ 129 130 HAL_LockTypeDef Lock; /*!< Locking object */ 131 132 __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 133 134 __IO uint32_t ErrorCode; /*!< SPI Error code */ 135 136 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 137 void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ 138 void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ 139 void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ 140 void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ 141 void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ 142 void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ 143 void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ 144 void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ 145 void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ 146 void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ 147 148 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 149 } SPI_HandleTypeDef; 150 151 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 152 /** 153 * @brief HAL SPI Callback ID enumeration definition 154 */ 155 typedef enum 156 { 157 HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ 158 HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ 159 HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ 160 HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ 161 HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ 162 HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ 163 HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ 164 HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ 165 HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ 166 HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ 167 168 } HAL_SPI_CallbackIDTypeDef; 169 170 /** 171 * @brief HAL SPI Callback pointer definition 172 */ 173 typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ 174 175 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 176 /** 177 * @} 178 */ 179 180 /* Exported constants --------------------------------------------------------*/ 181 /** @defgroup SPI_Exported_Constants SPI Exported Constants 182 * @{ 183 */ 184 185 /** @defgroup SPI_Error_Code SPI Error Code 186 * @{ 187 */ 188 #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ 189 #define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ 190 #define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ 191 #define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ 192 #define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */ 193 #define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 194 #define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ 195 #define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ 196 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 197 #define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ 198 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 199 /** 200 * @} 201 */ 202 203 /** @defgroup SPI_Mode SPI Mode 204 * @{ 205 */ 206 #define SPI_MODE_SLAVE (0x00000000U) 207 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 208 /** 209 * @} 210 */ 211 212 /** @defgroup SPI_Direction SPI Direction Mode 213 * @{ 214 */ 215 #define SPI_DIRECTION_2LINES (0x00000000U) 216 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 217 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 218 /** 219 * @} 220 */ 221 222 /** @defgroup SPI_Data_Size SPI Data Size 223 * @{ 224 */ 225 #define SPI_DATASIZE_8BIT (0x00000000U) 226 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 227 /** 228 * @} 229 */ 230 231 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 232 * @{ 233 */ 234 #define SPI_POLARITY_LOW (0x00000000U) 235 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 236 /** 237 * @} 238 */ 239 240 /** @defgroup SPI_Clock_Phase SPI Clock Phase 241 * @{ 242 */ 243 #define SPI_PHASE_1EDGE (0x00000000U) 244 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 245 /** 246 * @} 247 */ 248 249 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management 250 * @{ 251 */ 252 #define SPI_NSS_SOFT SPI_CR1_SSM 253 #define SPI_NSS_HARD_INPUT (0x00000000U) 254 #define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) 255 /** 256 * @} 257 */ 258 259 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 260 * @{ 261 */ 262 #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) 263 #define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) 264 #define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) 265 #define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) 266 #define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) 267 #define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) 268 #define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) 269 #define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 270 /** 271 * @} 272 */ 273 274 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission 275 * @{ 276 */ 277 #define SPI_FIRSTBIT_MSB (0x00000000U) 278 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 279 /** 280 * @} 281 */ 282 283 /** @defgroup SPI_TI_mode SPI TI Mode 284 * @{ 285 */ 286 #define SPI_TIMODE_DISABLE (0x00000000U) 287 #define SPI_TIMODE_ENABLE SPI_CR2_FRF 288 /** 289 * @} 290 */ 291 292 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 293 * @{ 294 */ 295 #define SPI_CRCCALCULATION_DISABLE (0x00000000U) 296 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 297 /** 298 * @} 299 */ 300 301 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition 302 * @{ 303 */ 304 #define SPI_IT_TXE SPI_CR2_TXEIE 305 #define SPI_IT_RXNE SPI_CR2_RXNEIE 306 #define SPI_IT_ERR SPI_CR2_ERRIE 307 /** 308 * @} 309 */ 310 311 /** @defgroup SPI_Flags_definition SPI Flags Definition 312 * @{ 313 */ 314 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ 315 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ 316 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ 317 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ 318 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ 319 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ 320 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ 321 #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\ 322 | SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE) 323 /** 324 * @} 325 */ 326 327 /** 328 * @} 329 */ 330 331 /* Exported macros -----------------------------------------------------------*/ 332 /** @defgroup SPI_Exported_Macros SPI Exported Macros 333 * @{ 334 */ 335 336 /** @brief Reset SPI handle state. 337 * @param __HANDLE__ specifies the SPI Handle. 338 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 339 * @retval None 340 */ 341 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 342 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 343 (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ 344 (__HANDLE__)->MspInitCallback = NULL; \ 345 (__HANDLE__)->MspDeInitCallback = NULL; \ 346 } while(0) 347 #else 348 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 349 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 350 351 /** @brief Enable the specified SPI interrupts. 352 * @param __HANDLE__ specifies the SPI Handle. 353 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 354 * @param __INTERRUPT__ specifies the interrupt source to enable. 355 * This parameter can be one of the following values: 356 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 357 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 358 * @arg SPI_IT_ERR: Error interrupt enable 359 * @retval None 360 */ 361 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 362 363 /** @brief Disable the specified SPI interrupts. 364 * @param __HANDLE__ specifies the SPI handle. 365 * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. 366 * @param __INTERRUPT__ specifies the interrupt source to disable. 367 * This parameter can be one of the following values: 368 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 369 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 370 * @arg SPI_IT_ERR: Error interrupt enable 371 * @retval None 372 */ 373 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 374 375 /** @brief Check whether the specified SPI interrupt source is enabled or not. 376 * @param __HANDLE__ specifies the SPI Handle. 377 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 378 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 379 * This parameter can be one of the following values: 380 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 381 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 382 * @arg SPI_IT_ERR: Error interrupt enable 383 * @retval The new state of __IT__ (TRUE or FALSE). 384 */ 385 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 386 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 387 388 /** @brief Check whether the specified SPI flag is set or not. 389 * @param __HANDLE__ specifies the SPI Handle. 390 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 391 * @param __FLAG__ specifies the flag to check. 392 * This parameter can be one of the following values: 393 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 394 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 395 * @arg SPI_FLAG_CRCERR: CRC error flag 396 * @arg SPI_FLAG_MODF: Mode fault flag 397 * @arg SPI_FLAG_OVR: Overrun flag 398 * @arg SPI_FLAG_BSY: Busy flag 399 * @arg SPI_FLAG_FRE: Frame format error flag 400 * @retval The new state of __FLAG__ (TRUE or FALSE). 401 */ 402 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 403 404 /** @brief Clear the SPI CRCERR pending flag. 405 * @param __HANDLE__ specifies the SPI Handle. 406 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 407 * @retval None 408 */ 409 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 410 411 /** @brief Clear the SPI MODF pending flag. 412 * @param __HANDLE__ specifies the SPI Handle. 413 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 414 * @retval None 415 */ 416 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 417 do{ \ 418 __IO uint32_t tmpreg_modf = 0x00U; \ 419 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 420 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ 421 UNUSED(tmpreg_modf); \ 422 } while(0U) 423 424 /** @brief Clear the SPI OVR pending flag. 425 * @param __HANDLE__ specifies the SPI Handle. 426 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 427 * @retval None 428 */ 429 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 430 do{ \ 431 __IO uint32_t tmpreg_ovr = 0x00U; \ 432 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 433 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 434 UNUSED(tmpreg_ovr); \ 435 } while(0U) 436 437 /** @brief Clear the SPI FRE pending flag. 438 * @param __HANDLE__ specifies the SPI Handle. 439 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 440 * @retval None 441 */ 442 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ 443 do{ \ 444 __IO uint32_t tmpreg_fre = 0x00U; \ 445 tmpreg_fre = (__HANDLE__)->Instance->SR; \ 446 UNUSED(tmpreg_fre); \ 447 }while(0U) 448 449 /** @brief Enable the SPI peripheral. 450 * @param __HANDLE__ specifies the SPI Handle. 451 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 452 * @retval None 453 */ 454 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 455 456 /** @brief Disable the SPI peripheral. 457 * @param __HANDLE__ specifies the SPI Handle. 458 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 459 * @retval None 460 */ 461 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 462 463 /** 464 * @} 465 */ 466 467 /* Private macros ------------------------------------------------------------*/ 468 /** @defgroup SPI_Private_Macros SPI Private Macros 469 * @{ 470 */ 471 472 /** @brief Set the SPI transmit-only mode. 473 * @param __HANDLE__ specifies the SPI Handle. 474 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 475 * @retval None 476 */ 477 #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 478 479 /** @brief Set the SPI receive-only mode. 480 * @param __HANDLE__ specifies the SPI Handle. 481 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 482 * @retval None 483 */ 484 #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 485 486 /** @brief Reset the CRC calculation of the SPI. 487 * @param __HANDLE__ specifies the SPI Handle. 488 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 489 * @retval None 490 */ 491 #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ 492 SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) 493 494 /** @brief Check whether the specified SPI flag is set or not. 495 * @param __SR__ copy of SPI SR register. 496 * @param __FLAG__ specifies the flag to check. 497 * This parameter can be one of the following values: 498 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 499 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 500 * @arg SPI_FLAG_CRCERR: CRC error flag 501 * @arg SPI_FLAG_MODF: Mode fault flag 502 * @arg SPI_FLAG_OVR: Overrun flag 503 * @arg SPI_FLAG_BSY: Busy flag 504 * @arg SPI_FLAG_FRE: Frame format error flag 505 * @retval SET or RESET. 506 */ 507 #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ 508 ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) 509 510 /** @brief Check whether the specified SPI Interrupt is set or not. 511 * @param __CR2__ copy of SPI CR2 register. 512 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 513 * This parameter can be one of the following values: 514 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 515 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 516 * @arg SPI_IT_ERR: Error interrupt enable 517 * @retval SET or RESET. 518 */ 519 #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ 520 (__INTERRUPT__)) ? SET : RESET) 521 522 /** @brief Checks if SPI Mode parameter is in allowed range. 523 * @param __MODE__ specifies the SPI Mode. 524 * This parameter can be a value of @ref SPI_Mode 525 * @retval None 526 */ 527 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ 528 ((__MODE__) == SPI_MODE_MASTER)) 529 530 /** @brief Checks if SPI Direction Mode parameter is in allowed range. 531 * @param __MODE__ specifies the SPI Direction Mode. 532 * This parameter can be a value of @ref SPI_Direction 533 * @retval None 534 */ 535 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 536 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ 537 ((__MODE__) == SPI_DIRECTION_1LINE)) 538 539 /** @brief Checks if SPI Direction Mode parameter is 2 lines. 540 * @param __MODE__ specifies the SPI Direction Mode. 541 * @retval None 542 */ 543 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) 544 545 /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. 546 * @param __MODE__ specifies the SPI Direction Mode. 547 * @retval None 548 */ 549 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 550 ((__MODE__) == SPI_DIRECTION_1LINE)) 551 552 /** @brief Checks if SPI Data Size parameter is in allowed range. 553 * @param __DATASIZE__ specifies the SPI Data Size. 554 * This parameter can be a value of @ref SPI_Data_Size 555 * @retval None 556 */ 557 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ 558 ((__DATASIZE__) == SPI_DATASIZE_8BIT)) 559 560 /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. 561 * @param __CPOL__ specifies the SPI serial clock steady state. 562 * This parameter can be a value of @ref SPI_Clock_Polarity 563 * @retval None 564 */ 565 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ 566 ((__CPOL__) == SPI_POLARITY_HIGH)) 567 568 /** @brief Checks if SPI Clock Phase parameter is in allowed range. 569 * @param __CPHA__ specifies the SPI Clock Phase. 570 * This parameter can be a value of @ref SPI_Clock_Phase 571 * @retval None 572 */ 573 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ 574 ((__CPHA__) == SPI_PHASE_2EDGE)) 575 576 /** @brief Checks if SPI Slave Select parameter is in allowed range. 577 * @param __NSS__ specifies the SPI Slave Select management parameter. 578 * This parameter can be a value of @ref SPI_Slave_Select_management 579 * @retval None 580 */ 581 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 582 ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 583 ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 584 585 /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. 586 * @param __PRESCALER__ specifies the SPI Baudrate prescaler. 587 * This parameter can be a value of @ref SPI_BaudRate_Prescaler 588 * @retval None 589 */ 590 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ 591 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ 592 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ 593 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ 594 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ 595 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ 596 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ 597 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) 598 599 /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. 600 * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). 601 * This parameter can be a value of @ref SPI_MSB_LSB_transmission 602 * @retval None 603 */ 604 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ 605 ((__BIT__) == SPI_FIRSTBIT_LSB)) 606 607 /** @brief Checks if SPI TI mode parameter is in allowed range. 608 * @param __MODE__ specifies the SPI TI mode. 609 * This parameter can be a value of @ref SPI_TI_mode 610 * @retval None 611 */ 612 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \ 613 ((__MODE__) == SPI_TIMODE_ENABLE)) 614 615 /** @brief Checks if SPI CRC calculation enabled state is in allowed range. 616 * @param __CALCULATION__ specifies the SPI CRC calculation enable state. 617 * This parameter can be a value of @ref SPI_CRC_Calculation 618 * @retval None 619 */ 620 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ 621 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) 622 623 /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. 624 * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. 625 * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 626 * @retval None 627 */ 628 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ 629 ((__POLYNOMIAL__) <= 0xFFFFU) && \ 630 (((__POLYNOMIAL__)&0x1U) != 0U)) 631 632 /** @brief Checks if DMA handle is valid. 633 * @param __HANDLE__ specifies a DMA Handle. 634 * @retval None 635 */ 636 #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) 637 638 /** 639 * @} 640 */ 641 642 /* Exported functions --------------------------------------------------------*/ 643 /** @addtogroup SPI_Exported_Functions 644 * @{ 645 */ 646 647 /** @addtogroup SPI_Exported_Functions_Group1 648 * @{ 649 */ 650 /* Initialization/de-initialization functions ********************************/ 651 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 652 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); 653 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 654 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 655 656 /* Callbacks Register/UnRegister functions ***********************************/ 657 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 658 HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, 659 pSPI_CallbackTypeDef pCallback); 660 HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); 661 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 662 /** 663 * @} 664 */ 665 666 /** @addtogroup SPI_Exported_Functions_Group2 667 * @{ 668 */ 669 /* I/O operation functions ***************************************************/ 670 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 671 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 672 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, 673 uint32_t Timeout); 674 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 675 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 676 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 677 uint16_t Size); 678 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 679 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 680 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, 681 uint16_t Size); 682 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 683 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 684 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 685 /* Transfer Abort functions */ 686 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); 687 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); 688 689 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 690 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 691 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 692 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 693 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 694 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 695 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 696 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 697 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); 698 /** 699 * @} 700 */ 701 702 /** @addtogroup SPI_Exported_Functions_Group3 703 * @{ 704 */ 705 /* Peripheral State and Error functions ***************************************/ 706 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); 707 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); 708 /** 709 * @} 710 */ 711 712 /** 713 * @} 714 */ 715 716 /** 717 * @} 718 */ 719 720 /** 721 * @} 722 */ 723 724 #ifdef __cplusplus 725 } 726 #endif 727 728 #endif /* STM32F4xx_HAL_SPI_H */ 729 730
