1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_sdram.h 4 * @author MCD Application Team 5 * @brief Header file of SDRAM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F4xx_HAL_SDRAM_H 21 #define STM32F4xx_HAL_SDRAM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 #if defined(FMC_Bank5_6) 28 29 /* Includes ------------------------------------------------------------------*/ 30 #include "stm32f4xx_ll_fmc.h" 31 32 /** @addtogroup STM32F4xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup SDRAM 37 * @{ 38 */ 39 40 /* Exported typedef ----------------------------------------------------------*/ 41 42 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL SDRAM State structure definition 48 */ 49 typedef enum 50 { 51 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */ 52 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */ 53 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */ 54 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */ 55 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */ 56 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */ 57 58 } HAL_SDRAM_StateTypeDef; 59 60 /** 61 * @brief SDRAM handle Structure definition 62 */ 63 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 64 typedef struct __SDRAM_HandleTypeDef 65 #else 66 typedef struct 67 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 68 { 69 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */ 70 71 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */ 72 73 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */ 74 75 HAL_LockTypeDef Lock; /*!< SDRAM locking object */ 76 77 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ 78 79 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 80 void (* MspInitCallback)(struct __SDRAM_HandleTypeDef *hsdram); /*!< SDRAM Msp Init callback */ 81 void (* MspDeInitCallback)(struct __SDRAM_HandleTypeDef *hsdram); /*!< SDRAM Msp DeInit callback */ 82 void (* RefreshErrorCallback)(struct __SDRAM_HandleTypeDef *hsdram); /*!< SDRAM Refresh Error callback */ 83 void (* DmaXferCpltCallback)(DMA_HandleTypeDef *hdma); /*!< SDRAM DMA Xfer Complete callback */ 84 void (* DmaXferErrorCallback)(DMA_HandleTypeDef *hdma); /*!< SDRAM DMA Xfer Error callback */ 85 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 86 } SDRAM_HandleTypeDef; 87 88 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 89 /** 90 * @brief HAL SDRAM Callback ID enumeration definition 91 */ 92 typedef enum 93 { 94 HAL_SDRAM_MSP_INIT_CB_ID = 0x00U, /*!< SDRAM MspInit Callback ID */ 95 HAL_SDRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SDRAM MspDeInit Callback ID */ 96 HAL_SDRAM_REFRESH_ERR_CB_ID = 0x02U, /*!< SDRAM Refresh Error Callback ID */ 97 HAL_SDRAM_DMA_XFER_CPLT_CB_ID = 0x03U, /*!< SDRAM DMA Xfer Complete Callback ID */ 98 HAL_SDRAM_DMA_XFER_ERR_CB_ID = 0x04U /*!< SDRAM DMA Xfer Error Callback ID */ 99 } HAL_SDRAM_CallbackIDTypeDef; 100 101 /** 102 * @brief HAL SDRAM Callback pointer definition 103 */ 104 typedef void (*pSDRAM_CallbackTypeDef)(SDRAM_HandleTypeDef *hsdram); 105 typedef void (*pSDRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma); 106 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 107 /** 108 * @} 109 */ 110 111 /* Exported constants --------------------------------------------------------*/ 112 /* Exported macro ------------------------------------------------------------*/ 113 114 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros 115 * @{ 116 */ 117 118 /** @brief Reset SDRAM handle state 119 * @param __HANDLE__ specifies the SDRAM handle. 120 * @retval None 121 */ 122 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 123 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) do { \ 124 (__HANDLE__)->State = HAL_SDRAM_STATE_RESET; \ 125 (__HANDLE__)->MspInitCallback = NULL; \ 126 (__HANDLE__)->MspDeInitCallback = NULL; \ 127 } while(0) 128 #else 129 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET) 130 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 131 /** 132 * @} 133 */ 134 135 /* Exported functions --------------------------------------------------------*/ 136 137 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions 138 * @{ 139 */ 140 141 /** @addtogroup SDRAM_Exported_Functions_Group1 142 * @{ 143 */ 144 145 /* Initialization/de-initialization functions *********************************/ 146 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing); 147 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram); 148 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram); 149 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram); 150 151 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram); 152 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram); 153 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); 154 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); 155 156 /** 157 * @} 158 */ 159 160 /** @addtogroup SDRAM_Exported_Functions_Group2 161 * @{ 162 */ 163 /* I/O operation functions ****************************************************/ 164 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, 165 uint32_t BufferSize); 166 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, 167 uint32_t BufferSize); 168 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, 169 uint32_t BufferSize); 170 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, 171 uint32_t BufferSize); 172 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, 173 uint32_t BufferSize); 174 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, 175 uint32_t BufferSize); 176 177 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, 178 uint32_t BufferSize); 179 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, 180 uint32_t BufferSize); 181 182 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 183 /* SDRAM callback registering/unregistering */ 184 HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, 185 pSDRAM_CallbackTypeDef pCallback); 186 HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId); 187 HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, 188 pSDRAM_DmaCallbackTypeDef pCallback); 189 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 190 191 /** 192 * @} 193 */ 194 195 /** @addtogroup SDRAM_Exported_Functions_Group3 196 * @{ 197 */ 198 /* SDRAM Control functions *****************************************************/ 199 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram); 200 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram); 201 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, 202 uint32_t Timeout); 203 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate); 204 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber); 205 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); 206 207 /** 208 * @} 209 */ 210 211 /** @addtogroup SDRAM_Exported_Functions_Group4 212 * @{ 213 */ 214 /* SDRAM State functions ********************************************************/ 215 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); 216 /** 217 * @} 218 */ 219 220 /** 221 * @} 222 */ 223 224 /** 225 * @} 226 */ 227 228 /** 229 * @} 230 */ 231 232 #endif /* FMC_Bank5_6 */ 233 234 #ifdef __cplusplus 235 } 236 #endif 237 238 #endif /* STM32F4xx_HAL_SDRAM_H */ 239
