1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef __STM32F4xx_HAL_PWR_H 20 #define __STM32F4xx_HAL_PWR_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32f4xx_hal_def.h" 28 29 /** @addtogroup STM32F4xx_HAL_Driver 30 * @{ 31 */ 32 33 /** @addtogroup PWR 34 * @{ 35 */ 36 37 /* Exported types ------------------------------------------------------------*/ 38 39 /** @defgroup PWR_Exported_Types PWR Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief PWR PVD configuration structure definition 45 */ 46 typedef struct 47 { 48 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 49 This parameter can be a value of @ref PWR_PVD_detection_level */ 50 51 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 52 This parameter can be a value of @ref PWR_PVD_Mode */ 53 }PWR_PVDTypeDef; 54 55 /** 56 * @} 57 */ 58 59 /* Exported constants --------------------------------------------------------*/ 60 /** @defgroup PWR_Exported_Constants PWR Exported Constants 61 * @{ 62 */ 63 64 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins 65 * @{ 66 */ 67 #define PWR_WAKEUP_PIN1 0x00000100U 68 /** 69 * @} 70 */ 71 72 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 73 * @{ 74 */ 75 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 76 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 77 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 78 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 79 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 80 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 81 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 82 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage 83 (Compare internally to VREFINT) */ 84 /** 85 * @} 86 */ 87 88 /** @defgroup PWR_PVD_Mode PWR PVD Mode 89 * @{ 90 */ 91 #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ 92 #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ 93 #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ 94 #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 95 #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ 96 #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ 97 #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ 98 /** 99 * @} 100 */ 101 102 103 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode 104 * @{ 105 */ 106 #define PWR_MAINREGULATOR_ON 0x00000000U 107 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 108 /** 109 * @} 110 */ 111 112 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 113 * @{ 114 */ 115 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 116 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 117 #define PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR ((uint8_t)0x03) 118 119 /** 120 * @} 121 */ 122 123 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 124 * @{ 125 */ 126 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 127 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 128 #define PWR_STOPENTRY_WFE_NO_EVT_CLEAR ((uint8_t)0x03) 129 /** 130 * @} 131 */ 132 133 /** @defgroup PWR_Flag PWR Flag 134 * @{ 135 */ 136 #define PWR_FLAG_WU PWR_CSR_WUF 137 #define PWR_FLAG_SB PWR_CSR_SBF 138 #define PWR_FLAG_PVDO PWR_CSR_PVDO 139 #define PWR_FLAG_BRR PWR_CSR_BRR 140 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY 141 /** 142 * @} 143 */ 144 145 /** 146 * @} 147 */ 148 149 /* Exported macro ------------------------------------------------------------*/ 150 /** @defgroup PWR_Exported_Macro PWR Exported Macro 151 * @{ 152 */ 153 154 /** @brief Check PWR flag is set or not. 155 * @param __FLAG__ specifies the flag to check. 156 * This parameter can be one of the following values: 157 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 158 * was received from the WKUP pin or from the RTC alarm (Alarm A 159 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 160 * An additional wakeup event is detected if the WKUP pin is enabled 161 * (by setting the EWUP bit) when the WKUP pin level is already high. 162 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 163 * resumed from StandBy mode. 164 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 165 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 166 * For this reason, this bit is equal to 0 after Standby or reset 167 * until the PVDE bit is set. 168 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset 169 * when the device wakes up from Standby mode or by a system reset 170 * or power reset. 171 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage 172 * scaling output selection is ready. 173 * @retval The new state of __FLAG__ (TRUE or FALSE). 174 */ 175 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 176 177 /** @brief Clear the PWR's pending flags. 178 * @param __FLAG__ specifies the flag to clear. 179 * This parameter can be one of the following values: 180 * @arg PWR_FLAG_WU: Wake Up flag 181 * @arg PWR_FLAG_SB: StandBy flag 182 */ 183 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 184 185 /** 186 * @brief Enable the PVD Exti Line 16. 187 * @retval None. 188 */ 189 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) 190 191 /** 192 * @brief Disable the PVD EXTI Line 16. 193 * @retval None. 194 */ 195 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) 196 197 /** 198 * @brief Enable event on PVD Exti Line 16. 199 * @retval None. 200 */ 201 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) 202 203 /** 204 * @brief Disable event on PVD Exti Line 16. 205 * @retval None. 206 */ 207 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) 208 209 /** 210 * @brief Enable the PVD Extended Interrupt Rising Trigger. 211 * @retval None. 212 */ 213 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 214 215 /** 216 * @brief Disable the PVD Extended Interrupt Rising Trigger. 217 * @retval None. 218 */ 219 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 220 221 /** 222 * @brief Enable the PVD Extended Interrupt Falling Trigger. 223 * @retval None. 224 */ 225 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 226 227 228 /** 229 * @brief Disable the PVD Extended Interrupt Falling Trigger. 230 * @retval None. 231 */ 232 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 233 234 235 /** 236 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 237 * @retval None. 238 */ 239 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\ 240 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\ 241 }while(0U) 242 243 /** 244 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 245 * This parameter can be: 246 * @retval None. 247 */ 248 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\ 249 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\ 250 }while(0U) 251 252 /** 253 * @brief checks whether the specified PVD Exti interrupt flag is set or not. 254 * @retval EXTI PVD Line Status. 255 */ 256 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 257 258 /** 259 * @brief Clear the PVD Exti flag. 260 * @retval None. 261 */ 262 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 263 264 /** 265 * @brief Generates a Software interrupt on PVD EXTI line. 266 * @retval None 267 */ 268 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) 269 270 /** 271 * @} 272 */ 273 274 /* Include PWR HAL Extension module */ 275 #include "stm32f4xx_hal_pwr_ex.h" 276 277 /* Exported functions --------------------------------------------------------*/ 278 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 279 * @{ 280 */ 281 282 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 283 * @{ 284 */ 285 /* Initialization and de-initialization functions *****************************/ 286 void HAL_PWR_DeInit(void); 287 void HAL_PWR_EnableBkUpAccess(void); 288 void HAL_PWR_DisableBkUpAccess(void); 289 /** 290 * @} 291 */ 292 293 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 294 * @{ 295 */ 296 /* Peripheral Control functions **********************************************/ 297 /* PVD configuration */ 298 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 299 void HAL_PWR_EnablePVD(void); 300 void HAL_PWR_DisablePVD(void); 301 302 /* WakeUp pins configuration */ 303 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 304 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 305 306 /* Low Power modes entry */ 307 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 308 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 309 void HAL_PWR_EnterSTANDBYMode(void); 310 311 /* Power PVD IRQ Handler */ 312 void HAL_PWR_PVD_IRQHandler(void); 313 void HAL_PWR_PVDCallback(void); 314 315 /* Cortex System Control functions *******************************************/ 316 void HAL_PWR_EnableSleepOnExit(void); 317 void HAL_PWR_DisableSleepOnExit(void); 318 void HAL_PWR_EnableSEVOnPend(void); 319 void HAL_PWR_DisableSEVOnPend(void); 320 /** 321 * @} 322 */ 323 324 /** 325 * @} 326 */ 327 328 /* Private types -------------------------------------------------------------*/ 329 /* Private variables ---------------------------------------------------------*/ 330 /* Private constants ---------------------------------------------------------*/ 331 /** @defgroup PWR_Private_Constants PWR Private Constants 332 * @{ 333 */ 334 335 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 336 * @{ 337 */ 338 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 339 /** 340 * @} 341 */ 342 343 /** @defgroup PWR_register_alias_address PWR Register alias address 344 * @{ 345 */ 346 /* ------------- PWR registers bit address in the alias region ---------------*/ 347 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 348 #define PWR_CR_OFFSET 0x00U 349 #define PWR_CSR_OFFSET 0x04U 350 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) 351 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) 352 /** 353 * @} 354 */ 355 356 /** @defgroup PWR_CR_register_alias PWR CR Register alias address 357 * @{ 358 */ 359 /* --- CR Register ---*/ 360 /* Alias word address of DBP bit */ 361 #define DBP_BIT_NUMBER PWR_CR_DBP_Pos 362 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U)) 363 364 /* Alias word address of PVDE bit */ 365 #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos 366 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U)) 367 368 /* Alias word address of VOS bit */ 369 #define VOS_BIT_NUMBER PWR_CR_VOS_Pos 370 #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U)) 371 /** 372 * @} 373 */ 374 375 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address 376 * @{ 377 */ 378 /* --- CSR Register ---*/ 379 /* Alias word address of EWUP bit */ 380 #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos 381 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U)) 382 /** 383 * @} 384 */ 385 386 /** 387 * @} 388 */ 389 /* Private macros ------------------------------------------------------------*/ 390 /** @defgroup PWR_Private_Macros PWR Private Macros 391 * @{ 392 */ 393 394 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 395 * @{ 396 */ 397 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 398 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 399 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 400 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 401 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 402 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 403 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 404 ((MODE) == PWR_PVD_MODE_NORMAL)) 405 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 406 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 407 408 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || \ 409 ((ENTRY) == PWR_SLEEPENTRY_WFE) || \ 410 ((ENTRY) == PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR)) 411 412 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || \ 413 ((ENTRY) == PWR_STOPENTRY_WFE) || \ 414 ((ENTRY) == PWR_STOPENTRY_WFE_NO_EVT_CLEAR)) 415 /** 416 * @} 417 */ 418 419 /** 420 * @} 421 */ 422 423 /** 424 * @} 425 */ 426 427 /** 428 * @} 429 */ 430 431 #ifdef __cplusplus 432 } 433 #endif 434 435 436 #endif /* __STM32F4xx_HAL_PWR_H */ 437
