1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal.h 4 * @author MCD Application Team 5 * @brief This file contains all the functions prototypes for the HAL 6 * module driver. 7 ****************************************************************************** 8 * @attention 9 * 10 * Copyright (c) 2017 STMicroelectronics. 11 * All rights reserved. 12 * 13 * This software is licensed under terms that can be found in the LICENSE file 14 * in the root directory of this software component. 15 * If no LICENSE file comes with this software, it is provided AS-IS. 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F4xx_HAL_H 22 #define __STM32F4xx_HAL_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f4xx_hal_conf.h" 30 31 /** @addtogroup STM32F4xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup HAL 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /* Exported constants --------------------------------------------------------*/ 41 42 /** @defgroup HAL_Exported_Constants HAL Exported Constants 43 * @{ 44 */ 45 46 /** @defgroup HAL_TICK_FREQ Tick Frequency 47 * @{ 48 */ 49 typedef enum 50 { 51 HAL_TICK_FREQ_10HZ = 100U, 52 HAL_TICK_FREQ_100HZ = 10U, 53 HAL_TICK_FREQ_1KHZ = 1U, 54 HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ 55 } HAL_TickFreqTypeDef; 56 /** 57 * @} 58 */ 59 60 /** 61 * @} 62 */ 63 64 /* Exported macro ------------------------------------------------------------*/ 65 /** @defgroup HAL_Exported_Macros HAL Exported Macros 66 * @{ 67 */ 68 69 /** @brief Freeze/Unfreeze Peripherals in Debug mode 70 */ 71 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) 72 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) 73 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) 74 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) 75 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) 76 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) 77 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) 78 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) 79 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) 80 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) 81 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) 82 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) 83 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) 84 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) 85 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) 86 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP)) 87 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP)) 88 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) 89 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) 90 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP)) 91 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP)) 92 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP)) 93 94 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) 95 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) 96 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) 97 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) 98 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) 99 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) 100 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) 101 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) 102 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) 103 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) 104 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) 105 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) 106 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) 107 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) 108 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) 109 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP)) 110 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP)) 111 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) 112 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) 113 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP)) 114 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP)) 115 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP)) 116 117 /** @brief Main Flash memory mapped at 0x00000000 118 */ 119 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE)) 120 121 /** @brief System Flash memory mapped at 0x00000000 122 */ 123 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 124 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\ 125 }while(0); 126 127 /** @brief Embedded SRAM mapped at 0x00000000 128 */ 129 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 130 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\ 131 }while(0); 132 133 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) 134 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 135 */ 136 #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 137 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ 138 }while(0); 139 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ 140 141 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 142 defined(STM32F469xx) || defined(STM32F479xx) 143 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 144 */ 145 #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 146 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ 147 }while(0); 148 149 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000 150 */ 151 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ 152 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\ 153 }while(0); 154 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 155 156 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx) 157 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable 158 * @{ 159 */ 160 /** @brief SYSCFG Break Lockup lock 161 * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input 162 * @note The selected configuration is locked and can be unlocked by system reset 163 */ 164 #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \ 165 SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \ 166 }while(0) 167 /** 168 * @} 169 */ 170 171 /** @defgroup PVD_Lock_Enable PVD Lock 172 * @{ 173 */ 174 /** @brief SYSCFG Break PVD lock 175 * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register 176 * @note The selected configuration is locked and can be unlocked by system reset 177 */ 178 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \ 179 SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \ 180 }while(0) 181 /** 182 * @} 183 */ 184 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */ 185 /** 186 * @} 187 */ 188 189 /** @defgroup HAL_Private_Macros HAL Private Macros 190 * @{ 191 */ 192 #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \ 193 ((FREQ) == HAL_TICK_FREQ_100HZ) || \ 194 ((FREQ) == HAL_TICK_FREQ_1KHZ)) 195 /** 196 * @} 197 */ 198 199 /* Exported variables --------------------------------------------------------*/ 200 201 /** @addtogroup HAL_Exported_Variables 202 * @{ 203 */ 204 extern __IO uint32_t uwTick; 205 extern uint32_t uwTickPrio; 206 extern HAL_TickFreqTypeDef uwTickFreq; 207 /** 208 * @} 209 */ 210 211 /* Exported functions --------------------------------------------------------*/ 212 /** @addtogroup HAL_Exported_Functions 213 * @{ 214 */ 215 /** @addtogroup HAL_Exported_Functions_Group1 216 * @{ 217 */ 218 /* Initialization and Configuration functions ******************************/ 219 HAL_StatusTypeDef HAL_Init(void); 220 HAL_StatusTypeDef HAL_DeInit(void); 221 void HAL_MspInit(void); 222 void HAL_MspDeInit(void); 223 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); 224 /** 225 * @} 226 */ 227 228 /** @addtogroup HAL_Exported_Functions_Group2 229 * @{ 230 */ 231 /* Peripheral Control functions ************************************************/ 232 void HAL_IncTick(void); 233 void HAL_Delay(uint32_t Delay); 234 uint32_t HAL_GetTick(void); 235 uint32_t HAL_GetTickPrio(void); 236 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq); 237 HAL_TickFreqTypeDef HAL_GetTickFreq(void); 238 void HAL_SuspendTick(void); 239 void HAL_ResumeTick(void); 240 uint32_t HAL_GetHalVersion(void); 241 uint32_t HAL_GetREVID(void); 242 uint32_t HAL_GetDEVID(void); 243 void HAL_DBGMCU_EnableDBGSleepMode(void); 244 void HAL_DBGMCU_DisableDBGSleepMode(void); 245 void HAL_DBGMCU_EnableDBGStopMode(void); 246 void HAL_DBGMCU_DisableDBGStopMode(void); 247 void HAL_DBGMCU_EnableDBGStandbyMode(void); 248 void HAL_DBGMCU_DisableDBGStandbyMode(void); 249 void HAL_EnableCompensationCell(void); 250 void HAL_DisableCompensationCell(void); 251 uint32_t HAL_GetUIDw0(void); 252 uint32_t HAL_GetUIDw1(void); 253 uint32_t HAL_GetUIDw2(void); 254 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ 255 defined(STM32F469xx) || defined(STM32F479xx) 256 void HAL_EnableMemorySwappingBank(void); 257 void HAL_DisableMemorySwappingBank(void); 258 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ 259 /** 260 * @} 261 */ 262 263 /** 264 * @} 265 */ 266 /* Private types -------------------------------------------------------------*/ 267 /* Private variables ---------------------------------------------------------*/ 268 /** @defgroup HAL_Private_Variables HAL Private Variables 269 * @{ 270 */ 271 /** 272 * @} 273 */ 274 /* Private constants ---------------------------------------------------------*/ 275 /** @defgroup HAL_Private_Constants HAL Private Constants 276 * @{ 277 */ 278 /** 279 * @} 280 */ 281 /* Private macros ------------------------------------------------------------*/ 282 /* Private functions ---------------------------------------------------------*/ 283 /** 284 * @} 285 */ 286 287 /** 288 * @} 289 */ 290 291 #ifdef __cplusplus 292 } 293 #endif 294 295 #endif /* __STM32F4xx_HAL_H */ 296 297
