1 /** 2 ****************************************************************************** 3 * @file stm32f2xx_hal_spi.h 4 * @author MCD Application Team 5 * @brief Header file of SPI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F2xx_HAL_SPI_H 21 #define STM32F2xx_HAL_SPI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f2xx_hal_def.h" 29 30 /** @addtogroup STM32F2xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup SPI 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SPI_Exported_Types SPI Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief SPI Configuration Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t Mode; /*!< Specifies the SPI operating mode. 49 This parameter can be a value of @ref SPI_Mode */ 50 51 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 52 This parameter can be a value of @ref SPI_Direction */ 53 54 uint32_t DataSize; /*!< Specifies the SPI data size. 55 This parameter can be a value of @ref SPI_Data_Size */ 56 57 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 58 This parameter can be a value of @ref SPI_Clock_Polarity */ 59 60 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 61 This parameter can be a value of @ref SPI_Clock_Phase */ 62 63 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 64 hardware (NSS pin) or by software using the SSI bit. 65 This parameter can be a value of @ref SPI_Slave_Select_management */ 66 67 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 68 used to configure the transmit and receive SCK clock. 69 This parameter can be a value of @ref SPI_BaudRate_Prescaler 70 @note The communication clock is derived from the master 71 clock. The slave clock does not need to be set. */ 72 73 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 74 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 75 76 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 77 This parameter can be a value of @ref SPI_TI_mode */ 78 79 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 80 This parameter can be a value of @ref SPI_CRC_Calculation */ 81 82 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 83 This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ 84 } SPI_InitTypeDef; 85 86 /** 87 * @brief HAL SPI State structure definition 88 */ 89 typedef enum 90 { 91 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 92 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 93 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 94 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 95 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 96 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 97 HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 98 HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 99 } HAL_SPI_StateTypeDef; 100 101 /** 102 * @brief SPI handle Structure definition 103 */ 104 typedef struct __SPI_HandleTypeDef 105 { 106 SPI_TypeDef *Instance; /*!< SPI registers base address */ 107 108 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 109 110 const uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 111 112 uint16_t TxXferSize; /*!< SPI Tx Transfer size */ 113 114 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 115 116 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 117 118 uint16_t RxXferSize; /*!< SPI Rx Transfer size */ 119 120 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 121 122 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ 123 124 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ 125 126 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ 127 128 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ 129 130 HAL_LockTypeDef Lock; /*!< Locking object */ 131 132 __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 133 134 __IO uint32_t ErrorCode; /*!< SPI Error code */ 135 136 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 137 void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ 138 void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ 139 void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ 140 void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ 141 void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ 142 void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ 143 void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ 144 void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ 145 void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ 146 void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ 147 148 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 149 } SPI_HandleTypeDef; 150 151 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 152 /** 153 * @brief HAL SPI Callback ID enumeration definition 154 */ 155 typedef enum 156 { 157 HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ 158 HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ 159 HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ 160 HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ 161 HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ 162 HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ 163 HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ 164 HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ 165 HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ 166 HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ 167 168 } HAL_SPI_CallbackIDTypeDef; 169 170 /** 171 * @brief HAL SPI Callback pointer definition 172 */ 173 typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ 174 175 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 176 /** 177 * @} 178 */ 179 180 /* Exported constants --------------------------------------------------------*/ 181 /** @defgroup SPI_Exported_Constants SPI Exported Constants 182 * @{ 183 */ 184 185 /** @defgroup SPI_Error_Code SPI Error Code 186 * @{ 187 */ 188 #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ 189 #define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ 190 #define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ 191 #define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ 192 #define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */ 193 #define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 194 #define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ 195 #define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ 196 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 197 #define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ 198 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 199 /** 200 * @} 201 */ 202 203 /** @defgroup SPI_Mode SPI Mode 204 * @{ 205 */ 206 #define SPI_MODE_SLAVE (0x00000000U) 207 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 208 /** 209 * @} 210 */ 211 212 /** @defgroup SPI_Direction SPI Direction Mode 213 * @{ 214 */ 215 #define SPI_DIRECTION_2LINES (0x00000000U) 216 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 217 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 218 /** 219 * @} 220 */ 221 222 /** @defgroup SPI_Data_Size SPI Data Size 223 * @{ 224 */ 225 #define SPI_DATASIZE_8BIT (0x00000000U) 226 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 227 /** 228 * @} 229 */ 230 231 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 232 * @{ 233 */ 234 #define SPI_POLARITY_LOW (0x00000000U) 235 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 236 /** 237 * @} 238 */ 239 240 /** @defgroup SPI_Clock_Phase SPI Clock Phase 241 * @{ 242 */ 243 #define SPI_PHASE_1EDGE (0x00000000U) 244 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 245 /** 246 * @} 247 */ 248 249 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management 250 * @{ 251 */ 252 #define SPI_NSS_SOFT SPI_CR1_SSM 253 #define SPI_NSS_HARD_INPUT (0x00000000U) 254 #define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) 255 /** 256 * @} 257 */ 258 259 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 260 * @{ 261 */ 262 #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) 263 #define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) 264 #define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) 265 #define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) 266 #define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) 267 #define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) 268 #define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) 269 #define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 270 /** 271 * @} 272 */ 273 274 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission 275 * @{ 276 */ 277 #define SPI_FIRSTBIT_MSB (0x00000000U) 278 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 279 /** 280 * @} 281 */ 282 283 /** @defgroup SPI_TI_mode SPI TI Mode 284 * @{ 285 */ 286 #define SPI_TIMODE_DISABLE (0x00000000U) 287 #define SPI_TIMODE_ENABLE SPI_CR2_FRF 288 /** 289 * @} 290 */ 291 292 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 293 * @{ 294 */ 295 #define SPI_CRCCALCULATION_DISABLE (0x00000000U) 296 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 297 /** 298 * @} 299 */ 300 301 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition 302 * @{ 303 */ 304 #define SPI_IT_TXE SPI_CR2_TXEIE 305 #define SPI_IT_RXNE SPI_CR2_RXNEIE 306 #define SPI_IT_ERR SPI_CR2_ERRIE 307 /** 308 * @} 309 */ 310 311 /** @defgroup SPI_Flags_definition SPI Flags Definition 312 * @{ 313 */ 314 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ 315 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ 316 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ 317 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ 318 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ 319 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ 320 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ 321 #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\ 322 | SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE) 323 /** 324 * @} 325 */ 326 327 /** 328 * @} 329 */ 330 331 /* Exported macros -----------------------------------------------------------*/ 332 /** @defgroup SPI_Exported_Macros SPI Exported Macros 333 * @{ 334 */ 335 336 /** @brief Reset SPI handle state. 337 * @param __HANDLE__ specifies the SPI Handle. 338 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 339 * @retval None 340 */ 341 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 342 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) \ 343 do{ \ 344 (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ 345 (__HANDLE__)->MspInitCallback = NULL; \ 346 (__HANDLE__)->MspDeInitCallback = NULL; \ 347 } while(0) 348 #else 349 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 350 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 351 352 /** @brief Enable the specified SPI interrupts. 353 * @param __HANDLE__ specifies the SPI Handle. 354 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 355 * @param __INTERRUPT__ specifies the interrupt source to enable. 356 * This parameter can be one of the following values: 357 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 358 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 359 * @arg SPI_IT_ERR: Error interrupt enable 360 * @retval None 361 */ 362 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 363 364 /** @brief Disable the specified SPI interrupts. 365 * @param __HANDLE__ specifies the SPI handle. 366 * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. 367 * @param __INTERRUPT__ specifies the interrupt source to disable. 368 * This parameter can be one of the following values: 369 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 370 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 371 * @arg SPI_IT_ERR: Error interrupt enable 372 * @retval None 373 */ 374 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 375 376 /** @brief Check whether the specified SPI interrupt source is enabled or not. 377 * @param __HANDLE__ specifies the SPI Handle. 378 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 379 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 380 * This parameter can be one of the following values: 381 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 382 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 383 * @arg SPI_IT_ERR: Error interrupt enable 384 * @retval The new state of __IT__ (TRUE or FALSE). 385 */ 386 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 387 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 388 389 /** @brief Check whether the specified SPI flag is set or not. 390 * @param __HANDLE__ specifies the SPI Handle. 391 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 392 * @param __FLAG__ specifies the flag to check. 393 * This parameter can be one of the following values: 394 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 395 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 396 * @arg SPI_FLAG_CRCERR: CRC error flag 397 * @arg SPI_FLAG_MODF: Mode fault flag 398 * @arg SPI_FLAG_OVR: Overrun flag 399 * @arg SPI_FLAG_BSY: Busy flag 400 * @arg SPI_FLAG_FRE: Frame format error flag 401 * @retval The new state of __FLAG__ (TRUE or FALSE). 402 */ 403 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 404 405 /** @brief Clear the SPI CRCERR pending flag. 406 * @param __HANDLE__ specifies the SPI Handle. 407 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 408 * @retval None 409 */ 410 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 411 412 /** @brief Clear the SPI MODF pending flag. 413 * @param __HANDLE__ specifies the SPI Handle. 414 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 415 * @retval None 416 */ 417 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 418 do{ \ 419 __IO uint32_t tmpreg_modf = 0x00U; \ 420 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 421 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ 422 UNUSED(tmpreg_modf); \ 423 } while(0U) 424 425 /** @brief Clear the SPI OVR pending flag. 426 * @param __HANDLE__ specifies the SPI Handle. 427 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 428 * @retval None 429 */ 430 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 431 do{ \ 432 __IO uint32_t tmpreg_ovr = 0x00U; \ 433 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 434 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 435 UNUSED(tmpreg_ovr); \ 436 } while(0U) 437 438 /** @brief Clear the SPI FRE pending flag. 439 * @param __HANDLE__ specifies the SPI Handle. 440 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 441 * @retval None 442 */ 443 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ 444 do{ \ 445 __IO uint32_t tmpreg_fre = 0x00U; \ 446 tmpreg_fre = (__HANDLE__)->Instance->SR; \ 447 UNUSED(tmpreg_fre); \ 448 } while(0U) 449 450 /** @brief Enable the SPI peripheral. 451 * @param __HANDLE__ specifies the SPI Handle. 452 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 453 * @retval None 454 */ 455 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 456 457 /** @brief Disable the SPI peripheral. 458 * @param __HANDLE__ specifies the SPI Handle. 459 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 460 * @retval None 461 */ 462 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 463 464 /** 465 * @} 466 */ 467 468 /* Private macros ------------------------------------------------------------*/ 469 /** @defgroup SPI_Private_Macros SPI Private Macros 470 * @{ 471 */ 472 473 /** @brief Set the SPI transmit-only mode. 474 * @param __HANDLE__ specifies the SPI Handle. 475 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 476 * @retval None 477 */ 478 #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 479 480 /** @brief Set the SPI receive-only mode. 481 * @param __HANDLE__ specifies the SPI Handle. 482 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 483 * @retval None 484 */ 485 #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 486 487 /** @brief Reset the CRC calculation of the SPI. 488 * @param __HANDLE__ specifies the SPI Handle. 489 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 490 * @retval None 491 */ 492 #define SPI_RESET_CRC(__HANDLE__) \ 493 do{ \ 494 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ 495 SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ 496 } while(0U) 497 498 /** @brief Check whether the specified SPI flag is set or not. 499 * @param __SR__ copy of SPI SR register. 500 * @param __FLAG__ specifies the flag to check. 501 * This parameter can be one of the following values: 502 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 503 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 504 * @arg SPI_FLAG_CRCERR: CRC error flag 505 * @arg SPI_FLAG_MODF: Mode fault flag 506 * @arg SPI_FLAG_OVR: Overrun flag 507 * @arg SPI_FLAG_BSY: Busy flag 508 * @arg SPI_FLAG_FRE: Frame format error flag 509 * @retval SET or RESET. 510 */ 511 #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ 512 ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) 513 514 /** @brief Check whether the specified SPI Interrupt is set or not. 515 * @param __CR2__ copy of SPI CR2 register. 516 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 517 * This parameter can be one of the following values: 518 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 519 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 520 * @arg SPI_IT_ERR: Error interrupt enable 521 * @retval SET or RESET. 522 */ 523 #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ 524 (__INTERRUPT__)) ? SET : RESET) 525 526 /** @brief Checks if SPI Mode parameter is in allowed range. 527 * @param __MODE__ specifies the SPI Mode. 528 * This parameter can be a value of @ref SPI_Mode 529 * @retval None 530 */ 531 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ 532 ((__MODE__) == SPI_MODE_MASTER)) 533 534 /** @brief Checks if SPI Direction Mode parameter is in allowed range. 535 * @param __MODE__ specifies the SPI Direction Mode. 536 * This parameter can be a value of @ref SPI_Direction 537 * @retval None 538 */ 539 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 540 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ 541 ((__MODE__) == SPI_DIRECTION_1LINE)) 542 543 /** @brief Checks if SPI Direction Mode parameter is 2 lines. 544 * @param __MODE__ specifies the SPI Direction Mode. 545 * @retval None 546 */ 547 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) 548 549 /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. 550 * @param __MODE__ specifies the SPI Direction Mode. 551 * @retval None 552 */ 553 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 554 ((__MODE__) == SPI_DIRECTION_1LINE)) 555 556 /** @brief Checks if SPI Data Size parameter is in allowed range. 557 * @param __DATASIZE__ specifies the SPI Data Size. 558 * This parameter can be a value of @ref SPI_Data_Size 559 * @retval None 560 */ 561 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ 562 ((__DATASIZE__) == SPI_DATASIZE_8BIT)) 563 564 /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. 565 * @param __CPOL__ specifies the SPI serial clock steady state. 566 * This parameter can be a value of @ref SPI_Clock_Polarity 567 * @retval None 568 */ 569 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ 570 ((__CPOL__) == SPI_POLARITY_HIGH)) 571 572 /** @brief Checks if SPI Clock Phase parameter is in allowed range. 573 * @param __CPHA__ specifies the SPI Clock Phase. 574 * This parameter can be a value of @ref SPI_Clock_Phase 575 * @retval None 576 */ 577 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ 578 ((__CPHA__) == SPI_PHASE_2EDGE)) 579 580 /** @brief Checks if SPI Slave Select parameter is in allowed range. 581 * @param __NSS__ specifies the SPI Slave Select management parameter. 582 * This parameter can be a value of @ref SPI_Slave_Select_management 583 * @retval None 584 */ 585 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 586 ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 587 ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 588 589 /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. 590 * @param __PRESCALER__ specifies the SPI Baudrate prescaler. 591 * This parameter can be a value of @ref SPI_BaudRate_Prescaler 592 * @retval None 593 */ 594 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ 595 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ 596 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ 597 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ 598 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ 599 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ 600 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ 601 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) 602 603 /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. 604 * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). 605 * This parameter can be a value of @ref SPI_MSB_LSB_transmission 606 * @retval None 607 */ 608 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ 609 ((__BIT__) == SPI_FIRSTBIT_LSB)) 610 611 /** @brief Checks if SPI TI mode parameter is in allowed range. 612 * @param __MODE__ specifies the SPI TI mode. 613 * This parameter can be a value of @ref SPI_TI_mode 614 * @retval None 615 */ 616 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \ 617 ((__MODE__) == SPI_TIMODE_ENABLE)) 618 619 /** @brief Checks if SPI CRC calculation enabled state is in allowed range. 620 * @param __CALCULATION__ specifies the SPI CRC calculation enable state. 621 * This parameter can be a value of @ref SPI_CRC_Calculation 622 * @retval None 623 */ 624 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ 625 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) 626 627 /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. 628 * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. 629 * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 630 * @retval None 631 */ 632 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ 633 ((__POLYNOMIAL__) <= 0xFFFFU) && \ 634 (((__POLYNOMIAL__)&0x1U) != 0U)) 635 636 /** @brief Checks if DMA handle is valid. 637 * @param __HANDLE__ specifies a DMA Handle. 638 * @retval None 639 */ 640 #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) 641 642 /** 643 * @} 644 */ 645 646 /* Exported functions --------------------------------------------------------*/ 647 /** @addtogroup SPI_Exported_Functions 648 * @{ 649 */ 650 651 /** @addtogroup SPI_Exported_Functions_Group1 652 * @{ 653 */ 654 /* Initialization/de-initialization functions ********************************/ 655 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 656 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); 657 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 658 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 659 660 /* Callbacks Register/UnRegister functions ***********************************/ 661 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 662 HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, 663 pSPI_CallbackTypeDef pCallback); 664 HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); 665 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 666 /** 667 * @} 668 */ 669 670 /** @addtogroup SPI_Exported_Functions_Group2 671 * @{ 672 */ 673 /* I/O operation functions ***************************************************/ 674 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 675 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 676 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, 677 uint16_t Size, uint32_t Timeout); 678 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size); 679 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 680 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, 681 uint16_t Size); 682 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size); 683 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 684 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, 685 uint16_t Size); 686 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 687 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 688 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 689 /* Transfer Abort functions */ 690 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); 691 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); 692 693 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 694 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 695 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 696 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 697 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 698 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 699 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 700 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 701 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); 702 /** 703 * @} 704 */ 705 706 /** @addtogroup SPI_Exported_Functions_Group3 707 * @{ 708 */ 709 /* Peripheral State and Error functions ***************************************/ 710 HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi); 711 uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi); 712 /** 713 * @} 714 */ 715 716 /** 717 * @} 718 */ 719 720 /** 721 * @} 722 */ 723 724 /** 725 * @} 726 */ 727 728 #ifdef __cplusplus 729 } 730 #endif 731 732 #endif /* STM32F2xx_HAL_SPI_H */ 733 734
