1 /** 2 ****************************************************************************** 3 * @file stm32f2xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F2xx_HAL_PWR_H 22 #define __STM32F2xx_HAL_PWR_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f2xx_hal_def.h" 30 31 /** @addtogroup STM32F2xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup PWR 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 41 /** @defgroup PWR_Exported_Types PWR Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief PWR PVD configuration structure definition 47 */ 48 typedef struct 49 { 50 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 51 This parameter can be a value of @ref PWR_PVD_detection_level */ 52 53 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 54 This parameter can be a value of @ref PWR_PVD_Mode */ 55 }PWR_PVDTypeDef; 56 57 /** 58 * @} 59 */ 60 61 /* Exported constants --------------------------------------------------------*/ 62 /** @defgroup PWR_Exported_Constants PWR Exported Constants 63 * @{ 64 */ 65 66 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins 67 * @{ 68 */ 69 #define PWR_WAKEUP_PIN1 0x00000100U 70 /** 71 * @} 72 */ 73 74 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 75 * @{ 76 */ 77 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 78 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 79 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 80 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 81 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 82 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 83 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 84 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage 85 (Compare internally to VREFINT) */ 86 /** 87 * @} 88 */ 89 90 /** @defgroup PWR_PVD_Mode PWR PVD Mode 91 * @{ 92 */ 93 #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ 94 #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ 95 #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ 96 #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 97 #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ 98 #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ 99 #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ 100 /** 101 * @} 102 */ 103 104 105 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode 106 * @{ 107 */ 108 #define PWR_MAINREGULATOR_ON 0x00000000U 109 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 110 /** 111 * @} 112 */ 113 114 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 115 * @{ 116 */ 117 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 118 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 119 /** 120 * @} 121 */ 122 123 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 124 * @{ 125 */ 126 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 127 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 128 /** 129 * @} 130 */ 131 132 /** @defgroup PWR_Flag PWR Flag 133 * @{ 134 */ 135 #define PWR_FLAG_WU PWR_CSR_WUF 136 #define PWR_FLAG_SB PWR_CSR_SBF 137 #define PWR_FLAG_PVDO PWR_CSR_PVDO 138 #define PWR_FLAG_BRR PWR_CSR_BRR 139 /** 140 * @} 141 */ 142 143 /** 144 * @} 145 */ 146 147 /* Exported macro ------------------------------------------------------------*/ 148 /** @defgroup PWR_Exported_Macro PWR Exported Macro 149 * @{ 150 */ 151 152 /** @brief Check PWR flag is set or not. 153 * @param __FLAG__ specifies the flag to check. 154 * This parameter can be one of the following values: 155 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 156 * was received from the WKUP pin or from the RTC alarm (Alarm A 157 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. 158 * An additional wakeup event is detected if the WKUP pin is enabled 159 * (by setting the EWUP bit) when the WKUP pin level is already high. 160 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 161 * resumed from StandBy mode. 162 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 163 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 164 * For this reason, this bit is equal to 0 after Standby or reset 165 * until the PVDE bit is set. 166 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset 167 * when the device wakes up from Standby mode or by a system reset 168 * or power reset. 169 * @retval The new state of __FLAG__ (TRUE or FALSE). 170 */ 171 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 172 173 /** @brief Clear the PWR's pending flags. 174 * @param __FLAG__ specifies the flag to clear. 175 * This parameter can be one of the following values: 176 * @arg PWR_FLAG_WU: Wake Up flag 177 * @arg PWR_FLAG_SB: StandBy flag 178 */ 179 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U) 180 181 /** 182 * @brief Enable the PVD Exti Line 16. 183 * @retval None. 184 */ 185 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) 186 187 /** 188 * @brief Disable the PVD EXTI Line 16. 189 * @retval None. 190 */ 191 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) 192 193 /** 194 * @brief Enable event on PVD Exti Line 16. 195 * @retval None. 196 */ 197 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) 198 199 /** 200 * @brief Disable event on PVD Exti Line 16. 201 * @retval None. 202 */ 203 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) 204 205 /** 206 * @brief Enable the PVD Extended Interrupt Rising Trigger. 207 * @retval None. 208 */ 209 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 210 211 /** 212 * @brief Disable the PVD Extended Interrupt Rising Trigger. 213 * @retval None. 214 */ 215 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 216 217 /** 218 * @brief Enable the PVD Extended Interrupt Falling Trigger. 219 * @retval None. 220 */ 221 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 222 223 224 /** 225 * @brief Disable the PVD Extended Interrupt Falling Trigger. 226 * @retval None. 227 */ 228 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 229 230 231 /** 232 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 233 * @retval None. 234 */ 235 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{ __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\ 236 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\ 237 }while(0) 238 239 /** 240 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 241 * This parameter can be: 242 * @retval None. 243 */ 244 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{ __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\ 245 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\ 246 }while(0) 247 248 /** 249 * @brief checks whether the specified PVD Exti interrupt flag is set or not. 250 * @retval EXTI PVD Line Status. 251 */ 252 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 253 254 /** 255 * @brief Clear the PVD Exti flag. 256 * @retval None. 257 */ 258 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 259 260 /** 261 * @brief Generates a Software interrupt on PVD EXTI line. 262 * @retval None 263 */ 264 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) 265 266 /** 267 * @} 268 */ 269 270 /* Include PWR HAL Extension module */ 271 #include "stm32f2xx_hal_pwr_ex.h" 272 273 /* Exported functions --------------------------------------------------------*/ 274 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 275 * @{ 276 */ 277 278 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 279 * @{ 280 */ 281 /* Initialization and de-initialization functions *****************************/ 282 void HAL_PWR_DeInit(void); 283 void HAL_PWR_EnableBkUpAccess(void); 284 void HAL_PWR_DisableBkUpAccess(void); 285 /** 286 * @} 287 */ 288 289 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 290 * @{ 291 */ 292 /* Peripheral Control functions **********************************************/ 293 /* PVD configuration */ 294 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 295 void HAL_PWR_EnablePVD(void); 296 void HAL_PWR_DisablePVD(void); 297 298 /* WakeUp pins configuration */ 299 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 300 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 301 302 /* Low Power modes entry */ 303 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 304 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 305 void HAL_PWR_EnterSTANDBYMode(void); 306 307 /* Power PVD IRQ Handler */ 308 void HAL_PWR_PVD_IRQHandler(void); 309 void HAL_PWR_PVDCallback(void); 310 311 /* Cortex System Control functions *******************************************/ 312 void HAL_PWR_EnableSleepOnExit(void); 313 void HAL_PWR_DisableSleepOnExit(void); 314 void HAL_PWR_EnableSEVOnPend(void); 315 void HAL_PWR_DisableSEVOnPend(void); 316 /** 317 * @} 318 */ 319 320 /** 321 * @} 322 */ 323 324 /* Private types -------------------------------------------------------------*/ 325 /* Private variables ---------------------------------------------------------*/ 326 /* Private constants ---------------------------------------------------------*/ 327 /** @defgroup PWR_Private_Constants PWR Private Constants 328 * @{ 329 */ 330 331 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 332 * @{ 333 */ 334 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 335 /** 336 * @} 337 */ 338 339 /** @defgroup PWR_register_alias_address PWR Register alias address 340 * @{ 341 */ 342 /* ------------- PWR registers bit address in the alias region ---------------*/ 343 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 344 #define PWR_CR_OFFSET 0x00U 345 #define PWR_CSR_OFFSET 0x04U 346 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) 347 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) 348 /** 349 * @} 350 */ 351 352 /** @defgroup PWR_CR_register_alias PWR CR Register alias address 353 * @{ 354 */ 355 /* --- CR Register ---*/ 356 /* Alias word address of DBP bit */ 357 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP) 358 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U)) 359 360 /* Alias word address of PVDE bit */ 361 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE) 362 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U)) 363 /** 364 * @} 365 */ 366 367 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address 368 * @{ 369 */ 370 /* --- CSR Register ---*/ 371 /* Alias word address of EWUP bit */ 372 #define EWUP_BIT_NUMBER POSITION_VAL(PWR_CSR_EWUP) 373 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U)) 374 /** 375 * @} 376 */ 377 378 /** 379 * @} 380 */ 381 /* Private macros ------------------------------------------------------------*/ 382 /** @defgroup PWR_Private_Macros PWR Private Macros 383 * @{ 384 */ 385 386 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 387 * @{ 388 */ 389 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1) 390 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 391 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 392 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 393 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 394 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 395 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 396 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 397 ((MODE) == PWR_PVD_MODE_NORMAL)) 398 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 399 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 400 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 401 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 402 /** 403 * @} 404 */ 405 406 /** 407 * @} 408 */ 409 410 /** 411 * @} 412 */ 413 414 /** 415 * @} 416 */ 417 418 #ifdef __cplusplus 419 } 420 #endif 421 422 423 #endif /* __STM32F2xx_HAL_PWR_H */ 424 425 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 426