1 /**
2   ******************************************************************************
3   * @file    stm32f2xx_hal_can_legacy.h
4   * @author  MCD Application Team
5   * @brief   Header file of CAN HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2016 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef __STM32F2xx_HAL_CAN_LEGACY_H
21 #define __STM32F2xx_HAL_CAN_LEGACY_H
22 
23 #ifdef __cplusplus
24  extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32f2xx_hal_def.h"
29 
30 /** @addtogroup STM32F2xx_HAL_Driver
31   * @{
32   */
33 
34 /** @addtogroup CAN
35   * @{
36   */
37 
38 /* Exported types ------------------------------------------------------------*/
39 /** @defgroup CAN_Exported_Types CAN Exported Types
40   * @{
41   */
42 
43 /**
44   * @brief  HAL State structures definition
45   */
46 typedef enum
47 {
48   HAL_CAN_STATE_RESET             = 0x00U,  /*!< CAN not yet initialized or disabled */
49   HAL_CAN_STATE_READY             = 0x01U,  /*!< CAN initialized and ready for use   */
50   HAL_CAN_STATE_BUSY              = 0x02U,  /*!< CAN process is ongoing              */
51   HAL_CAN_STATE_BUSY_TX           = 0x12U,  /*!< CAN process is ongoing              */
52   HAL_CAN_STATE_BUSY_RX0          = 0x22U,  /*!< CAN process is ongoing              */
53   HAL_CAN_STATE_BUSY_RX1          = 0x32U,  /*!< CAN process is ongoing              */
54   HAL_CAN_STATE_BUSY_TX_RX0       = 0x42U,  /*!< CAN process is ongoing              */
55   HAL_CAN_STATE_BUSY_TX_RX1       = 0x52U,  /*!< CAN process is ongoing              */
56   HAL_CAN_STATE_BUSY_RX0_RX1      = 0x62U,  /*!< CAN process is ongoing              */
57   HAL_CAN_STATE_BUSY_TX_RX0_RX1   = 0x72U,  /*!< CAN process is ongoing              */
58   HAL_CAN_STATE_TIMEOUT           = 0x03U,  /*!< CAN in Timeout state                */
59   HAL_CAN_STATE_ERROR             = 0x04U   /*!< CAN error state                     */
60 
61 }HAL_CAN_StateTypeDef;
62 
63 /**
64   * @brief  CAN init structure definition
65   */
66 typedef struct
67 {
68   uint32_t Prescaler;  /*!< Specifies the length of a time quantum.
69                             This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
70 
71   uint32_t Mode;       /*!< Specifies the CAN operating mode.
72                             This parameter can be a value of @ref CAN_operating_mode */
73 
74   uint32_t SJW;        /*!< Specifies the maximum number of time quanta
75                             the CAN hardware is allowed to lengthen or
76                             shorten a bit to perform resynchronization.
77                             This parameter can be a value of @ref CAN_synchronisation_jump_width */
78 
79   uint32_t BS1;        /*!< Specifies the number of time quanta in Bit Segment 1.
80                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
81 
82   uint32_t BS2;        /*!< Specifies the number of time quanta in Bit Segment 2.
83                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
84 
85   uint32_t TTCM;       /*!< Enable or disable the time triggered communication mode.
86                             This parameter can be set to ENABLE or DISABLE. */
87 
88   uint32_t ABOM;       /*!< Enable or disable the automatic bus-off management.
89                             This parameter can be set to ENABLE or DISABLE */
90 
91   uint32_t AWUM;       /*!< Enable or disable the automatic wake-up mode.
92                             This parameter can be set to ENABLE or DISABLE */
93 
94   uint32_t NART;       /*!< Enable or disable the non-automatic retransmission mode.
95                             This parameter can be set to ENABLE or DISABLE */
96 
97   uint32_t RFLM;       /*!< Enable or disable the receive FIFO Locked mode.
98                             This parameter can be set to ENABLE or DISABLE */
99 
100   uint32_t TXFP;       /*!< Enable or disable the transmit FIFO priority.
101                             This parameter can be set to ENABLE or DISABLE */
102 }CAN_InitTypeDef;
103 
104 /**
105   * @brief  CAN filter configuration structure definition
106   */
107 typedef struct
108 {
109   uint32_t FilterIdHigh;          /*!< Specifies the filter identification number (MSBs for a 32-bit
110                                        configuration, first one for a 16-bit configuration).
111                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
112 
113   uint32_t FilterIdLow;           /*!< Specifies the filter identification number (LSBs for a 32-bit
114                                        configuration, second one for a 16-bit configuration).
115                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
116 
117   uint32_t FilterMaskIdHigh;      /*!< Specifies the filter mask number or identification number,
118                                        according to the mode (MSBs for a 32-bit configuration,
119                                        first one for a 16-bit configuration).
120                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
121 
122   uint32_t FilterMaskIdLow;       /*!< Specifies the filter mask number or identification number,
123                                        according to the mode (LSBs for a 32-bit configuration,
124                                        second one for a 16-bit configuration).
125                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
126 
127   uint32_t FilterFIFOAssignment;  /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
128                                        This parameter can be a value of @ref CAN_filter_FIFO */
129 
130   uint32_t FilterNumber;          /*!< Specifies the filter which will be initialized.
131                                        This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
132 
133   uint32_t FilterMode;            /*!< Specifies the filter mode to be initialized.
134                                        This parameter can be a value of @ref CAN_filter_mode */
135 
136   uint32_t FilterScale;           /*!< Specifies the filter scale.
137                                        This parameter can be a value of @ref CAN_filter_scale */
138 
139   uint32_t FilterActivation;      /*!< Enable or disable the filter.
140                                        This parameter can be set to ENABLE or DISABLE. */
141 
142   uint32_t BankNumber;            /*!< Select the start slave bank filter.
143                                        This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
144 
145 }CAN_FilterConfTypeDef;
146 
147 /**
148   * @brief  CAN Tx message structure definition
149   */
150 typedef struct
151 {
152   uint32_t StdId;    /*!< Specifies the standard identifier.
153                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
154 
155   uint32_t ExtId;    /*!< Specifies the extended identifier.
156                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
157 
158   uint32_t IDE;      /*!< Specifies the type of identifier for the message that will be transmitted.
159                           This parameter can be a value of @ref CAN_Identifier_Type */
160 
161   uint32_t RTR;      /*!< Specifies the type of frame for the message that will be transmitted.
162                           This parameter can be a value of @ref CAN_remote_transmission_request */
163 
164   uint32_t DLC;      /*!< Specifies the length of the frame that will be transmitted.
165                           This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
166 
167   uint8_t Data[8];   /*!< Contains the data to be transmitted.
168                           This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
169 
170 }CanTxMsgTypeDef;
171 
172 /**
173   * @brief  CAN Rx message structure definition
174   */
175 typedef struct
176 {
177   uint32_t StdId;       /*!< Specifies the standard identifier.
178                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
179 
180   uint32_t ExtId;       /*!< Specifies the extended identifier.
181                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
182 
183   uint32_t IDE;         /*!< Specifies the type of identifier for the message that will be received.
184                              This parameter can be a value of @ref CAN_Identifier_Type */
185 
186   uint32_t RTR;         /*!< Specifies the type of frame for the received message.
187                              This parameter can be a value of @ref CAN_remote_transmission_request */
188 
189   uint32_t DLC;         /*!< Specifies the length of the frame that will be received.
190                              This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
191 
192   uint8_t Data[8];      /*!< Contains the data to be received.
193                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
194 
195   uint32_t FMI;         /*!< Specifies the index of the filter the message stored in the mailbox passes through.
196                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
197 
198   uint32_t FIFONumber;  /*!< Specifies the receive FIFO number.
199                              This parameter can be CAN_FIFO0 or CAN_FIFO1 */
200 
201 }CanRxMsgTypeDef;
202 
203 /**
204   * @brief  CAN handle Structure definition
205   */
206 typedef struct
207 {
208   CAN_TypeDef                 *Instance;  /*!< Register base address                                */
209 
210   CAN_InitTypeDef             Init;       /*!< CAN required parameters                              */
211 
212   CanTxMsgTypeDef*            pTxMsg;     /*!< Pointer to transmit structure                        */
213 
214   CanRxMsgTypeDef*            pRxMsg;     /*!< Pointer to reception structure for RX FIFO0 msg      */
215 
216   CanRxMsgTypeDef*            pRx1Msg;    /*!< Pointer to reception structure for RX FIFO1 msg      */
217 
218   __IO HAL_CAN_StateTypeDef   State;      /*!< CAN communication state                              */
219 
220   HAL_LockTypeDef             Lock;       /*!< CAN locking object                                   */
221 
222   __IO uint32_t               ErrorCode;  /*!< CAN Error code
223                                                This parameter can be a value of @ref CAN_Error_Code */
224 }CAN_HandleTypeDef;
225 
226 /**
227   * @}
228   */
229 
230 /* Exported constants --------------------------------------------------------*/
231 /** @defgroup CAN_Exported_Constants CAN Exported Constants
232   * @{
233   */
234 
235 /** @defgroup CAN_Error_Code CAN Error Code
236   * @{
237   */
238 #define   HAL_CAN_ERROR_NONE      0x00000000U    /*!< No error             */
239 #define   HAL_CAN_ERROR_EWG       0x00000001U    /*!< EWG error            */
240 #define   HAL_CAN_ERROR_EPV       0x00000002U    /*!< EPV error            */
241 #define   HAL_CAN_ERROR_BOF       0x00000004U    /*!< BOF error            */
242 #define   HAL_CAN_ERROR_STF       0x00000008U    /*!< Stuff error          */
243 #define   HAL_CAN_ERROR_FOR       0x00000010U    /*!< Form error           */
244 #define   HAL_CAN_ERROR_ACK       0x00000020U    /*!< Acknowledgment error */
245 #define   HAL_CAN_ERROR_BR        0x00000040U    /*!< Bit recessive        */
246 #define   HAL_CAN_ERROR_BD        0x00000080U    /*!< LEC dominant         */
247 #define   HAL_CAN_ERROR_CRC       0x00000100U    /*!< LEC transfer error   */
248 #define   HAL_CAN_ERROR_FOV0      0x00000200U    /*!< FIFO0 overrun error  */
249 #define   HAL_CAN_ERROR_FOV1      0x00000400U    /*!< FIFO1 overrun error  */
250 #define   HAL_CAN_ERROR_TXFAIL    0x00000800U    /*!< Transmit failure     */
251 /**
252   * @}
253   */
254 
255 /** @defgroup CAN_InitStatus CAN InitStatus
256   * @{
257   */
258 #define CAN_INITSTATUS_FAILED       ((uint8_t)0x00)  /*!< CAN initialization failed */
259 #define CAN_INITSTATUS_SUCCESS      ((uint8_t)0x01)  /*!< CAN initialization OK */
260 /**
261   * @}
262   */
263 
264 /** @defgroup CAN_operating_mode CAN Operating Mode
265   * @{
266   */
267 #define CAN_MODE_NORMAL             0x00000000U                    /*!< Normal mode   */
268 #define CAN_MODE_LOOPBACK           ((uint32_t)CAN_BTR_LBKM)                   /*!< Loopback mode */
269 #define CAN_MODE_SILENT             ((uint32_t)CAN_BTR_SILM)                   /*!< Silent mode   */
270 #define CAN_MODE_SILENT_LOOPBACK    ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM))  /*!< Loopback combined with silent mode */
271 /**
272   * @}
273   */
274 
275 /** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
276   * @{
277   */
278 #define CAN_SJW_1TQ                 0x00000000U    /*!< 1 time quantum */
279 #define CAN_SJW_2TQ                 ((uint32_t)CAN_BTR_SJW_0)  /*!< 2 time quantum */
280 #define CAN_SJW_3TQ                 ((uint32_t)CAN_BTR_SJW_1)  /*!< 3 time quantum */
281 #define CAN_SJW_4TQ                 ((uint32_t)CAN_BTR_SJW)    /*!< 4 time quantum */
282 /**
283   * @}
284   */
285 
286 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
287   * @{
288   */
289 #define CAN_BS1_1TQ                 0x00000000U                                      /*!< 1 time quantum  */
290 #define CAN_BS1_2TQ                 ((uint32_t)CAN_BTR_TS1_0)                                    /*!< 2 time quantum  */
291 #define CAN_BS1_3TQ                 ((uint32_t)CAN_BTR_TS1_1)                                    /*!< 3 time quantum  */
292 #define CAN_BS1_4TQ                 ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0))                  /*!< 4 time quantum  */
293 #define CAN_BS1_5TQ                 ((uint32_t)CAN_BTR_TS1_2)                                    /*!< 5 time quantum  */
294 #define CAN_BS1_6TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0))                  /*!< 6 time quantum  */
295 #define CAN_BS1_7TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1))                  /*!< 7 time quantum  */
296 #define CAN_BS1_8TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 8 time quantum  */
297 #define CAN_BS1_9TQ                 ((uint32_t)CAN_BTR_TS1_3)                                    /*!< 9 time quantum  */
298 #define CAN_BS1_10TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0))                  /*!< 10 time quantum */
299 #define CAN_BS1_11TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1))                  /*!< 11 time quantum */
300 #define CAN_BS1_12TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 12 time quantum */
301 #define CAN_BS1_13TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2))                  /*!< 13 time quantum */
302 #define CAN_BS1_14TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0))  /*!< 14 time quantum */
303 #define CAN_BS1_15TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1))  /*!< 15 time quantum */
304 #define CAN_BS1_16TQ                ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
305 /**
306   * @}
307   */
308 
309 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
310   * @{
311   */
312 #define CAN_BS2_1TQ                 0x00000000U                      /*!< 1 time quantum */
313 #define CAN_BS2_2TQ                 ((uint32_t)CAN_BTR_TS2_0)                    /*!< 2 time quantum */
314 #define CAN_BS2_3TQ                 ((uint32_t)CAN_BTR_TS2_1)                    /*!< 3 time quantum */
315 #define CAN_BS2_4TQ                 ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0))  /*!< 4 time quantum */
316 #define CAN_BS2_5TQ                 ((uint32_t)CAN_BTR_TS2_2)                    /*!< 5 time quantum */
317 #define CAN_BS2_6TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0))  /*!< 6 time quantum */
318 #define CAN_BS2_7TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1))  /*!< 7 time quantum */
319 #define CAN_BS2_8TQ                 ((uint32_t)CAN_BTR_TS2)                      /*!< 8 time quantum */
320 /**
321   * @}
322   */
323 
324 /** @defgroup CAN_filter_mode  CAN Filter Mode
325   * @{
326   */
327 #define CAN_FILTERMODE_IDMASK       ((uint8_t)0x00)  /*!< Identifier mask mode */
328 #define CAN_FILTERMODE_IDLIST       ((uint8_t)0x01)  /*!< Identifier list mode */
329 /**
330   * @}
331   */
332 
333 /** @defgroup CAN_filter_scale CAN Filter Scale
334   * @{
335   */
336 #define CAN_FILTERSCALE_16BIT       ((uint8_t)0x00)  /*!< Two 16-bit filters */
337 #define CAN_FILTERSCALE_32BIT       ((uint8_t)0x01)  /*!< One 32-bit filter  */
338 /**
339   * @}
340   */
341 
342 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
343   * @{
344   */
345 #define CAN_FILTER_FIFO0             ((uint8_t)0x00)  /*!< Filter FIFO 0 assignment for filter x */
346 #define CAN_FILTER_FIFO1             ((uint8_t)0x01)  /*!< Filter FIFO 1 assignment for filter x */
347 /**
348   * @}
349   */
350 
351 /** @defgroup CAN_Identifier_Type CAN Identifier Type
352   * @{
353   */
354 #define CAN_ID_STD             0x00000000U  /*!< Standard Id */
355 #define CAN_ID_EXT             0x00000004U  /*!< Extended Id */
356 /**
357   * @}
358   */
359 
360 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
361   * @{
362   */
363 #define CAN_RTR_DATA                0x00000000U  /*!< Data frame */
364 #define CAN_RTR_REMOTE              0x00000002U  /*!< Remote frame */
365 /**
366   * @}
367   */
368 
369 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
370   * @{
371   */
372 #define CAN_FIFO0                   ((uint8_t)0x00)  /*!< CAN FIFO 0 used to receive */
373 #define CAN_FIFO1                   ((uint8_t)0x01)  /*!< CAN FIFO 1 used to receive */
374 /**
375   * @}
376   */
377 
378 /** @defgroup CAN_flags CAN Flags
379   * @{
380   */
381 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
382    and CAN_ClearFlag() functions. */
383 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
384    CAN_GetFlagStatus() function.  */
385 
386 /* Transmit Flags */
387 #define CAN_FLAG_RQCP0             0x00000500U  /*!< Request MailBox0 flag         */
388 #define CAN_FLAG_RQCP1             0x00000508U  /*!< Request MailBox1 flag         */
389 #define CAN_FLAG_RQCP2             0x00000510U  /*!< Request MailBox2 flag         */
390 #define CAN_FLAG_TXOK0             0x00000501U  /*!< Transmission OK MailBox0 flag */
391 #define CAN_FLAG_TXOK1             0x00000509U  /*!< Transmission OK MailBox1 flag */
392 #define CAN_FLAG_TXOK2             0x00000511U  /*!< Transmission OK MailBox2 flag */
393 #define CAN_FLAG_TME0              0x0000051AU  /*!< Transmit mailbox 0 empty flag */
394 #define CAN_FLAG_TME1              0x0000051BU  /*!< Transmit mailbox 0 empty flag */
395 #define CAN_FLAG_TME2              0x0000051CU  /*!< Transmit mailbox 0 empty flag */
396 
397 /* Receive Flags */
398 #define CAN_FLAG_FF0               0x00000203U  /*!< FIFO 0 Full flag    */
399 #define CAN_FLAG_FOV0              0x00000204U  /*!< FIFO 0 Overrun flag */
400 
401 #define CAN_FLAG_FF1               0x00000403U  /*!< FIFO 1 Full flag    */
402 #define CAN_FLAG_FOV1              0x00000404U  /*!< FIFO 1 Overrun flag */
403 
404 /* Operating Mode Flags */
405 #define CAN_FLAG_INAK              0x00000100U  /*!<  Initialization acknowledge flag */
406 #define CAN_FLAG_SLAK              0x00000101U  /*!< Sleep acknowledge flag */
407 #define CAN_FLAG_ERRI              0x00000102U  /*!<  Error flag */
408 #define CAN_FLAG_WKU               0x00000103U  /*!< Wake up flag           */
409 #define CAN_FLAG_SLAKI             0x00000104U  /*!< Sleep acknowledge flag */
410 
411 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
412          In this case the SLAK bit can be polled.*/
413 
414 /* Error Flags */
415 #define CAN_FLAG_EWG               0x00000300U  /*!< Error warning flag   */
416 #define CAN_FLAG_EPV               0x00000301U  /*!< Error passive flag   */
417 #define CAN_FLAG_BOF               0x00000302U  /*!< Bus-Off flag         */
418 /**
419   * @}
420   */
421 
422 /** @defgroup CAN_Interrupts CAN Interrupts
423   * @{
424   */
425 #define CAN_IT_TME                  CAN_IER_TMEIE   /*!< Transmit mailbox empty interrupt */
426 
427 /* Receive Interrupts */
428 #define CAN_IT_FMP0                 CAN_IER_FMPIE0  /*!< FIFO 0 message pending interrupt */
429 #define CAN_IT_FF0                  CAN_IER_FFIE0   /*!< FIFO 0 full interrupt            */
430 #define CAN_IT_FOV0                 CAN_IER_FOVIE0  /*!< FIFO 0 overrun interrupt         */
431 #define CAN_IT_FMP1                 CAN_IER_FMPIE1  /*!< FIFO 1 message pending interrupt */
432 #define CAN_IT_FF1                  CAN_IER_FFIE1   /*!< FIFO 1 full interrupt            */
433 #define CAN_IT_FOV1                 CAN_IER_FOVIE1  /*!< FIFO 1 overrun interrupt         */
434 
435 /* Operating Mode Interrupts */
436 #define CAN_IT_WKU                  CAN_IER_WKUIE  /*!< Wake-up interrupt           */
437 #define CAN_IT_SLK                  CAN_IER_SLKIE  /*!< Sleep acknowledge interrupt */
438 
439 /* Error Interrupts */
440 #define CAN_IT_EWG                  CAN_IER_EWGIE /*!< Error warning interrupt   */
441 #define CAN_IT_EPV                  CAN_IER_EPVIE /*!< Error passive interrupt   */
442 #define CAN_IT_BOF                  CAN_IER_BOFIE /*!< Bus-off interrupt         */
443 #define CAN_IT_LEC                  CAN_IER_LECIE /*!< Last error code interrupt */
444 #define CAN_IT_ERR                  CAN_IER_ERRIE /*!< Error Interrupt           */
445 /**
446   * @}
447   */
448 
449 /** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
450   * @{
451   */
452 #define CAN_TXMAILBOX_0   ((uint8_t)0x00)
453 #define CAN_TXMAILBOX_1   ((uint8_t)0x01)
454 #define CAN_TXMAILBOX_2   ((uint8_t)0x02)
455 /**
456   * @}
457   */
458 
459 /**
460   * @}
461   */
462 
463 /* Exported macro ------------------------------------------------------------*/
464 /** @defgroup CAN_Exported_Macros CAN Exported Macros
465   * @{
466   */
467 
468 /** @brief Reset CAN handle state
469   * @param  __HANDLE__ specifies the CAN Handle.
470   * @retval None
471   */
472 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
473 
474 /**
475   * @brief  Enable the specified CAN interrupts.
476   * @param  __HANDLE__ CAN handle
477   * @param  __INTERRUPT__ CAN Interrupt
478   * @retval None
479   */
480 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
481 
482 /**
483   * @brief  Disable the specified CAN interrupts.
484   * @param  __HANDLE__ CAN handle
485   * @param  __INTERRUPT__ CAN Interrupt
486   * @retval None
487   */
488 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
489 
490 /**
491   * @brief  Return the number of pending received messages.
492   * @param  __HANDLE__ CAN handle
493   * @param  __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
494   * @retval The number of pending message.
495   */
496 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
497 ((uint8_t)((__HANDLE__)->Instance->RF0R&0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&0x03U)))
498 
499 /** @brief  Check whether the specified CAN flag is set or not.
500   * @param  __HANDLE__ CAN Handle
501   * @param  __FLAG__ specifies the flag to check.
502   *         This parameter can be one of the following values:
503   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
504   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
505   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
506   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
507   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
508   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
509   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
510   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
511   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
512   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
513   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
514   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
515   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
516   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
517   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
518   *            @arg CAN_FLAG_WKU: Wake up Flag
519   *            @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
520   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
521   *            @arg CAN_FLAG_EWG: Error Warning Flag
522   *            @arg CAN_FLAG_EPV: Error Passive Flag
523   *            @arg CAN_FLAG_BOF: Bus-Off Flag
524   * @retval The new state of __FLAG__ (TRUE or FALSE).
525   */
526 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
527 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
528  (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
529  (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
530  (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
531  ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
532 
533 /** @brief  Clear the specified CAN pending flag.
534   * @param  __HANDLE__ CAN Handle.
535   * @param  __FLAG__ specifies the flag to check.
536   *         This parameter can be one of the following values:
537   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
538   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
539   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
540   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
541   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
542   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
543   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
544   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
545   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
546   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
547   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
548   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
549   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
550   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
551   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
552   *            @arg CAN_FLAG_WKU: Wake up Flag
553   *            @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
554   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
555   * @retval The new state of __FLAG__ (TRUE or FALSE).
556   */
557 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
558 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
559  (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
560  (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
561  (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))))
562 
563 /** @brief  Check if the specified CAN interrupt source is enabled or disabled.
564   * @param  __HANDLE__ CAN Handle
565   * @param  __INTERRUPT__ specifies the CAN interrupt source to check.
566   *          This parameter can be one of the following values:
567   *             @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
568   *             @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
569   *             @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
570   * @retval The new state of __IT__ (TRUE or FALSE).
571   */
572 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
573 
574 /**
575   * @brief  Check the transmission status of a CAN Frame.
576   * @param  __HANDLE__ CAN Handle
577   * @param  __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission.
578   * @retval The new status of transmission  (TRUE or FALSE).
579   */
580 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
581 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
582  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
583  ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
584 
585 /**
586   * @brief  Release the specified receive FIFO.
587   * @param  __HANDLE__ CAN handle
588   * @param  __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
589   * @retval None
590   */
591 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
592 ((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1))
593 
594 /**
595   * @brief  Cancel a transmit request.
596   * @param  __HANDLE__ CAN Handle
597   * @param  __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission.
598   * @retval None
599   */
600 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
601 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\
602  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\
603  ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2))
604 
605 /**
606   * @brief  Enable or disable the DBG Freeze for CAN.
607   * @param  __HANDLE__ CAN Handle
608   * @param  __NEWSTATE__ new state of the CAN peripheral.
609   *          This parameter can be: ENABLE (CAN reception/transmission is frozen
610   *          during debug. Reception FIFOs can still be accessed/controlled normally)
611   *          or DISABLE (CAN is working during debug).
612   * @retval None
613   */
614 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
615 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
616 
617 /**
618   * @}
619   */
620 
621 /* Exported functions --------------------------------------------------------*/
622 /** @addtogroup CAN_Exported_Functions
623   * @{
624   */
625 
626 /** @addtogroup CAN_Exported_Functions_Group1
627   * @{
628   */
629 /* Initialization/de-initialization functions ***********************************/
630 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
631 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
632 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
633 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
634 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
635 /**
636   * @}
637   */
638 
639 /** @addtogroup CAN_Exported_Functions_Group2
640   * @{
641   */
642 /* I/O operation functions ******************************************************/
643 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
644 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
645 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
646 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
647 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
648 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
649 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
650 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
651 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
652 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
653 /**
654   * @}
655   */
656 
657 /** @addtogroup CAN_Exported_Functions_Group3
658   * @{
659   */
660 /* Peripheral State functions ***************************************************/
661 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
662 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
663 /**
664   * @}
665   */
666 
667 /**
668   * @}
669   */
670 
671 /* Private types -------------------------------------------------------------*/
672 /** @defgroup CAN_Private_Types CAN Private Types
673   * @{
674   */
675 
676 /**
677   * @}
678   */
679 
680 /* Private variables ---------------------------------------------------------*/
681 /** @defgroup CAN_Private_Variables CAN Private Variables
682   * @{
683   */
684 
685 /**
686   * @}
687   */
688 
689 /* Private constants ---------------------------------------------------------*/
690 /** @defgroup CAN_Private_Constants CAN Private Constants
691   * @{
692   */
693 #define CAN_TXSTATUS_NOMAILBOX      ((uint8_t)0x04)  /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
694 #define CAN_FLAG_MASK  0x000000FFU
695 /**
696   * @}
697   */
698 
699 /* Private macros ------------------------------------------------------------*/
700 /** @defgroup CAN_Private_Macros CAN Private Macros
701   * @{
702   */
703 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
704                            ((MODE) == CAN_MODE_LOOPBACK)|| \
705                            ((MODE) == CAN_MODE_SILENT) || \
706                            ((MODE) == CAN_MODE_SILENT_LOOPBACK))
707 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
708                          ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
709 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
710 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
711 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
712 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U)
713 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
714                                   ((MODE) == CAN_FILTERMODE_IDLIST))
715 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
716                                     ((SCALE) == CAN_FILTERSCALE_32BIT))
717 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
718                                   ((FIFO) == CAN_FILTER_FIFO1))
719 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U)
720 
721 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
722 #define IS_CAN_STDID(STDID)   ((STDID) <= 0x7FFU)
723 #define IS_CAN_EXTID(EXTID)   ((EXTID) <= 0x1FFFFFFFU)
724 #define IS_CAN_DLC(DLC)       ((DLC) <= ((uint8_t)0x08))
725 
726 #define IS_CAN_IDTYPE(IDTYPE)  (((IDTYPE) == CAN_ID_STD) || \
727                                 ((IDTYPE) == CAN_ID_EXT))
728 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
729 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
730 
731 /**
732   * @}
733   */
734 
735 /* Private functions ---------------------------------------------------------*/
736 /** @defgroup CAN_Private_Functions CAN Private Functions
737   * @{
738   */
739 
740 /**
741   * @}
742   */
743 
744 
745 /**
746   * @}
747   */
748 
749 /**
750   * @}
751   */
752 
753 #ifdef __cplusplus
754 }
755 #endif
756 
757 #endif /* __STM32F2xx_HAL_CAN_LEGACY_H */
758