1 /**
2   ******************************************************************************
3   * @file    stm32f1xx_hal_pcd.h
4   * @author  MCD Application Team
5   * @brief   Header file of PCD HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2016 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32F1xx_HAL_PCD_H
21 #define STM32F1xx_HAL_PCD_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32f1xx_ll_usb.h"
29 
30 #if defined (USB) || defined (USB_OTG_FS)
31 
32 /** @addtogroup STM32F1xx_HAL_Driver
33   * @{
34   */
35 
36 /** @addtogroup PCD
37   * @{
38   */
39 
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup PCD_Exported_Types PCD Exported Types
42   * @{
43   */
44 
45 /**
46   * @brief  PCD State structure definition
47   */
48 typedef enum
49 {
50   HAL_PCD_STATE_RESET   = 0x00,
51   HAL_PCD_STATE_READY   = 0x01,
52   HAL_PCD_STATE_ERROR   = 0x02,
53   HAL_PCD_STATE_BUSY    = 0x03,
54   HAL_PCD_STATE_TIMEOUT = 0x04
55 } PCD_StateTypeDef;
56 
57 /* Device LPM suspend state */
58 typedef enum
59 {
60   LPM_L0 = 0x00, /* on */
61   LPM_L1 = 0x01, /* LPM L1 sleep */
62   LPM_L2 = 0x02, /* suspend */
63   LPM_L3 = 0x03, /* off */
64 } PCD_LPM_StateTypeDef;
65 
66 typedef enum
67 {
68   PCD_LPM_L0_ACTIVE = 0x00, /* on */
69   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
70 } PCD_LPM_MsgTypeDef;
71 
72 typedef enum
73 {
74   PCD_BCD_ERROR                     = 0xFF,
75   PCD_BCD_CONTACT_DETECTION         = 0xFE,
76   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
77   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
78   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
79   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
80 
81 } PCD_BCD_MsgTypeDef;
82 
83 #if defined (USB)
84 
85 #endif /* defined (USB) */
86 #if defined (USB_OTG_FS)
87 typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;
88 typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;
89 typedef USB_OTG_EPTypeDef      PCD_EPTypeDef;
90 #endif /* defined (USB_OTG_FS) */
91 #if defined (USB)
92 typedef USB_TypeDef        PCD_TypeDef;
93 typedef USB_CfgTypeDef     PCD_InitTypeDef;
94 typedef USB_EPTypeDef      PCD_EPTypeDef;
95 #endif /* defined (USB) */
96 
97 /**
98   * @brief  PCD Handle Structure definition
99   */
100 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
101 typedef struct __PCD_HandleTypeDef
102 #else
103 typedef struct
104 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
105 {
106   PCD_TypeDef             *Instance;   /*!< Register base address             */
107   PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
108   __IO uint8_t            USB_Address; /*!< USB Address                       */
109 #if defined (USB_OTG_FS)
110   PCD_EPTypeDef           IN_ep[16];   /*!< IN endpoint parameters            */
111   PCD_EPTypeDef           OUT_ep[16];  /*!< OUT endpoint parameters           */
112 #endif /* defined (USB_OTG_FS) */
113 #if defined (USB)
114   PCD_EPTypeDef           IN_ep[8];    /*!< IN endpoint parameters            */
115   PCD_EPTypeDef           OUT_ep[8];   /*!< OUT endpoint parameters           */
116 #endif /* defined (USB) */
117   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
118   __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
119   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
120   uint32_t                Setup[12];   /*!< Setup packet buffer               */
121   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
122   uint32_t                BESL;
123   uint32_t                FrameNumber; /*!< Store Current Frame number        */
124 
125   void                    *pData;      /*!< Pointer to upper stack Handler */
126 
127 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
128   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
129   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
130   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
131   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
132   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
133   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
134   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
135 
136   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
137   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
138   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
139   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
140 
141   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
142   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
143 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
144 } PCD_HandleTypeDef;
145 
146 /**
147   * @}
148   */
149 
150 /* Include PCD HAL Extended module */
151 #include "stm32f1xx_hal_pcd_ex.h"
152 
153 /* Exported constants --------------------------------------------------------*/
154 /** @defgroup PCD_Exported_Constants PCD Exported Constants
155   * @{
156   */
157 
158 /** @defgroup PCD_Speed PCD Speed
159   * @{
160   */
161 #define PCD_SPEED_FULL               USBD_FS_SPEED
162 /**
163   * @}
164   */
165 
166 /** @defgroup PCD_PHY_Module PCD PHY Module
167   * @{
168   */
169 #define PCD_PHY_ULPI                 1U
170 #define PCD_PHY_EMBEDDED             2U
171 #define PCD_PHY_UTMI                 3U
172 /**
173   * @}
174   */
175 
176 /** @defgroup PCD_Error_Code_definition PCD Error Code definition
177   * @brief  PCD Error Code definition
178   * @{
179   */
180 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
181 #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
182 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
183 
184 /**
185   * @}
186   */
187 
188 /**
189   * @}
190   */
191 
192 /* Exported macros -----------------------------------------------------------*/
193 /** @defgroup PCD_Exported_Macros PCD Exported Macros
194   *  @brief macros to handle interrupts and specific clock configurations
195   * @{
196   */
197 #define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
198 #define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
199 
200 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
201   ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
202 
203 #if defined (USB_OTG_FS)
204 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
205 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)         (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
206 
207 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
208   *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
209 
210 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \
211   *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
212 
213 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \
214   ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
215 
216 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
217 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
218 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG()     EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
219 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG()   EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
220 
221 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
222   do { \
223     EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
224     EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
225   } while(0U)
226 #endif /* defined (USB_OTG_FS) */
227 
228 #if defined (USB)
229 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)           (((__HANDLE__)->Instance->ISTR)\
230                                                                    &= (uint16_t)(~(__INTERRUPT__)))
231 
232 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                         EXTI->IMR |= USB_WAKEUP_EXTI_LINE
233 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                        EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
234 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                          EXTI->PR & (USB_WAKEUP_EXTI_LINE)
235 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                        EXTI->PR = USB_WAKEUP_EXTI_LINE
236 
237 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
238   do { \
239     EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
240     EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
241   } while(0U)
242 
243 #endif /* defined (USB) */
244 
245 /**
246   * @}
247   */
248 
249 /* Exported functions --------------------------------------------------------*/
250 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
251   * @{
252   */
253 
254 /* Initialization/de-initialization functions  ********************************/
255 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
256   * @{
257   */
258 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
259 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
260 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
261 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
262 
263 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
264 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
265   * @brief  HAL USB OTG PCD Callback ID enumeration definition
266   * @{
267   */
268 typedef enum
269 {
270   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
271   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
272   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
273   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
274   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
275   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
276   HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
277 
278   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
279   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
280 
281 } HAL_PCD_CallbackIDTypeDef;
282 /**
283   * @}
284   */
285 
286 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
287   * @brief  HAL USB OTG PCD Callback pointer definition
288   * @{
289   */
290 
291 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
292 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
293 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
294 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
295 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
296 
297 /**
298   * @}
299   */
300 
301 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
302                                            pPCD_CallbackTypeDef pCallback);
303 
304 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
305 
306 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
307                                                        pPCD_DataOutStageCallbackTypeDef pCallback);
308 
309 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
310 
311 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
312                                                       pPCD_DataInStageCallbackTypeDef pCallback);
313 
314 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
315 
316 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
317                                                        pPCD_IsoOutIncpltCallbackTypeDef pCallback);
318 
319 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
320 
321 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
322                                                       pPCD_IsoInIncpltCallbackTypeDef pCallback);
323 
324 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
325 
326 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
327 /**
328   * @}
329   */
330 
331 /* I/O operation functions  ***************************************************/
332 /* Non-Blocking mode: Interrupt */
333 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
334   * @{
335   */
336 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
337 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
338 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
339 void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
340 
341 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
342 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
343 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
344 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
345 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
346 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
347 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
348 
349 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
350 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
351 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
352 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
353 /**
354   * @}
355   */
356 
357 /* Peripheral Control functions  **********************************************/
358 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
359   * @{
360   */
361 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
362 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
363 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
364 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
365 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
366 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
367 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
368 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
369 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
370 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
371 HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
372 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
373 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
374 uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
375 /**
376   * @}
377   */
378 
379 /* Peripheral State functions  ************************************************/
380 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
381   * @{
382   */
383 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
384 /**
385   * @}
386   */
387 
388 /**
389   * @}
390   */
391 
392 /* Private constants ---------------------------------------------------------*/
393 /** @defgroup PCD_Private_Constants PCD Private Constants
394   * @{
395   */
396 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
397   * @{
398   */
399 #if defined (USB_OTG_FS)
400 #define USB_OTG_FS_WAKEUP_EXTI_LINE                                   (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
401 #endif /* defined (USB_OTG_FS) */
402 
403 #if defined (USB)
404 #define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
405 #endif /* defined (USB) */
406 
407 /**
408   * @}
409   */
410 #if defined (USB)
411 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
412   * @{
413   */
414 #define PCD_EP0MPS_64                                                 EP_MPS_64
415 #define PCD_EP0MPS_32                                                 EP_MPS_32
416 #define PCD_EP0MPS_16                                                 EP_MPS_16
417 #define PCD_EP0MPS_08                                                 EP_MPS_8
418 /**
419   * @}
420   */
421 
422 /** @defgroup PCD_ENDP PCD ENDP
423   * @{
424   */
425 #define PCD_ENDP0                                                     0U
426 #define PCD_ENDP1                                                     1U
427 #define PCD_ENDP2                                                     2U
428 #define PCD_ENDP3                                                     3U
429 #define PCD_ENDP4                                                     4U
430 #define PCD_ENDP5                                                     5U
431 #define PCD_ENDP6                                                     6U
432 #define PCD_ENDP7                                                     7U
433 /**
434   * @}
435   */
436 
437 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
438   * @{
439   */
440 #define PCD_SNG_BUF                                                   0U
441 #define PCD_DBL_BUF                                                   1U
442 /**
443   * @}
444   */
445 #endif /* defined (USB) */
446 /**
447   * @}
448   */
449 
450 #if defined (USB_OTG_FS)
451 #ifndef USB_OTG_DOEPINT_OTEPSPR
452 #define USB_OTG_DOEPINT_OTEPSPR                (0x1UL << 5)      /*!< Status Phase Received interrupt */
453 #endif /* defined USB_OTG_DOEPINT_OTEPSPR */
454 
455 #ifndef USB_OTG_DOEPMSK_OTEPSPRM
456 #define USB_OTG_DOEPMSK_OTEPSPRM               (0x1UL << 5)      /*!< Setup Packet Received interrupt mask */
457 #endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */
458 
459 #ifndef USB_OTG_DOEPINT_NAK
460 #define USB_OTG_DOEPINT_NAK                    (0x1UL << 13)      /*!< NAK interrupt */
461 #endif /* defined USB_OTG_DOEPINT_NAK */
462 
463 #ifndef USB_OTG_DOEPMSK_NAKM
464 #define USB_OTG_DOEPMSK_NAKM                   (0x1UL << 13)      /*!< OUT Packet NAK interrupt mask */
465 #endif /* defined USB_OTG_DOEPMSK_NAKM */
466 
467 #ifndef USB_OTG_DOEPINT_STPKTRX
468 #define USB_OTG_DOEPINT_STPKTRX                (0x1UL << 15)      /*!< Setup Packet Received interrupt */
469 #endif /* defined USB_OTG_DOEPINT_STPKTRX */
470 
471 #ifndef USB_OTG_DOEPMSK_NYETM
472 #define USB_OTG_DOEPMSK_NYETM                  (0x1UL << 14)      /*!< Setup Packet Received interrupt mask */
473 #endif /* defined USB_OTG_DOEPMSK_NYETM */
474 #endif /* defined (USB_OTG_FS) */
475 
476 /* Private macros ------------------------------------------------------------*/
477 /** @defgroup PCD_Private_Macros PCD Private Macros
478   * @{
479   */
480 #if defined (USB)
481 /********************  Bit definition for USB_COUNTn_RX register  *************/
482 #define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
483 #define USB_CNTRX_BLSIZE                      (0x1U << 15)
484 
485 /* SetENDPOINT */
486 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
487   (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
488 
489 /* GetENDPOINT */
490 #define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
491 
492 
493 /**
494   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
495   * @param  USBx USB peripheral instance register address.
496   * @param  bEpNum Endpoint Number.
497   * @param  wType Endpoint Type.
498   * @retval None
499   */
500 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) \
501   (PCD_SET_ENDPOINT((USBx), (bEpNum), \
502                     ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
503 
504 
505 /**
506   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
507   * @param  USBx USB peripheral instance register address.
508   * @param  bEpNum Endpoint Number.
509   * @retval Endpoint Type
510   */
511 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
512 
513 /**
514   * @brief free buffer used from the application realizing it to the line
515   *         toggles bit SW_BUF in the double buffered endpoint register
516   * @param USBx USB device.
517   * @param   bEpNum, bDir
518   * @retval None
519   */
520 #define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \
521   do { \
522     if ((bDir) == 0U) \
523     { \
524       /* OUT double buffered endpoint */ \
525       PCD_TX_DTOG((USBx), (bEpNum)); \
526     } \
527     else if ((bDir) == 1U) \
528     { \
529       /* IN double buffered endpoint */ \
530       PCD_RX_DTOG((USBx), (bEpNum)); \
531     } \
532   } while(0)
533 
534 /**
535   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
536   * @param  USBx USB peripheral instance register address.
537   * @param  bEpNum Endpoint Number.
538   * @param  wState new state
539   * @retval None
540   */
541 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
542   do { \
543     uint16_t _wRegVal; \
544     \
545     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
546     /* toggle first bit ? */ \
547     if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
548     { \
549       _wRegVal ^= USB_EPTX_DTOG1; \
550     } \
551     /* toggle second bit ?  */ \
552     if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
553     { \
554       _wRegVal ^= USB_EPTX_DTOG2; \
555     } \
556     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
557   } while(0) /* PCD_SET_EP_TX_STATUS */
558 
559 /**
560   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
561   * @param  USBx USB peripheral instance register address.
562   * @param  bEpNum Endpoint Number.
563   * @param  wState new state
564   * @retval None
565   */
566 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
567   do { \
568     uint16_t _wRegVal; \
569     \
570     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
571     /* toggle first bit ? */ \
572     if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
573     { \
574       _wRegVal ^= USB_EPRX_DTOG1; \
575     } \
576     /* toggle second bit ? */ \
577     if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
578     { \
579       _wRegVal ^= USB_EPRX_DTOG2; \
580     } \
581     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
582   } while(0) /* PCD_SET_EP_RX_STATUS */
583 
584 /**
585   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
586   * @param  USBx USB peripheral instance register address.
587   * @param  bEpNum Endpoint Number.
588   * @param  wStaterx new state.
589   * @param  wStatetx new state.
590   * @retval None
591   */
592 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
593   do { \
594     uint16_t _wRegVal; \
595     \
596     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
597     /* toggle first bit ? */ \
598     if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
599     { \
600       _wRegVal ^= USB_EPRX_DTOG1; \
601     } \
602     /* toggle second bit ? */ \
603     if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
604     { \
605       _wRegVal ^= USB_EPRX_DTOG2; \
606     } \
607     /* toggle first bit ? */ \
608     if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
609     { \
610       _wRegVal ^= USB_EPTX_DTOG1; \
611     } \
612     /* toggle second bit ?  */ \
613     if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
614     { \
615       _wRegVal ^= USB_EPTX_DTOG2; \
616     } \
617     \
618     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
619   } while(0) /* PCD_SET_EP_TXRX_STATUS */
620 
621 /**
622   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
623   *         /STAT_RX[1:0])
624   * @param  USBx USB peripheral instance register address.
625   * @param  bEpNum Endpoint Number.
626   * @retval status
627   */
628 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
629 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
630 
631 /**
632   * @brief  sets directly the VALID tx/rx-status into the endpoint register
633   * @param  USBx USB peripheral instance register address.
634   * @param  bEpNum Endpoint Number.
635   * @retval None
636   */
637 #define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
638 #define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
639 
640 /**
641   * @brief  checks stall condition in an endpoint.
642   * @param  USBx USB peripheral instance register address.
643   * @param  bEpNum Endpoint Number.
644   * @retval TRUE = endpoint in stall condition.
645   */
646 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
647 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
648 
649 /**
650   * @brief  set & clear EP_KIND bit.
651   * @param  USBx USB peripheral instance register address.
652   * @param  bEpNum Endpoint Number.
653   * @retval None
654   */
655 #define PCD_SET_EP_KIND(USBx, bEpNum) \
656   do { \
657     uint16_t _wRegVal; \
658     \
659     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
660     \
661     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
662   } while(0) /* PCD_SET_EP_KIND */
663 
664 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
665   do { \
666     uint16_t _wRegVal; \
667     \
668     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
669     \
670     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
671   } while(0) /* PCD_CLEAR_EP_KIND */
672 
673 /**
674   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
675   * @param  USBx USB peripheral instance register address.
676   * @param  bEpNum Endpoint Number.
677   * @retval None
678   */
679 #define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
680 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
681 
682 /**
683   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
684   * @param  USBx USB peripheral instance register address.
685   * @param  bEpNum Endpoint Number.
686   * @retval None
687   */
688 #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum)     PCD_SET_EP_KIND((USBx), (bEpNum))
689 #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum)   PCD_CLEAR_EP_KIND((USBx), (bEpNum))
690 
691 /**
692   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
693   * @param  USBx USB peripheral instance register address.
694   * @param  bEpNum Endpoint Number.
695   * @retval None
696   */
697 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
698   do { \
699     uint16_t _wRegVal; \
700     \
701     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
702     \
703     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
704   } while(0) /* PCD_CLEAR_RX_EP_CTR */
705 
706 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
707   do { \
708     uint16_t _wRegVal; \
709     \
710     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
711     \
712     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
713   } while(0) /* PCD_CLEAR_TX_EP_CTR */
714 
715 /**
716   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
717   * @param  USBx USB peripheral instance register address.
718   * @param  bEpNum Endpoint Number.
719   * @retval None
720   */
721 #define PCD_RX_DTOG(USBx, bEpNum) \
722   do { \
723     uint16_t _wEPVal; \
724     \
725     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
726     \
727     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
728   } while(0) /* PCD_RX_DTOG */
729 
730 #define PCD_TX_DTOG(USBx, bEpNum) \
731   do { \
732     uint16_t _wEPVal; \
733     \
734     _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
735     \
736     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
737   } while(0) /* PCD_TX_DTOG */
738 /**
739   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
740   * @param  USBx USB peripheral instance register address.
741   * @param  bEpNum Endpoint Number.
742   * @retval None
743   */
744 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
745   do { \
746     uint16_t _wRegVal; \
747     \
748     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
749     \
750     if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
751     { \
752       PCD_RX_DTOG((USBx), (bEpNum)); \
753     } \
754   } while(0) /* PCD_CLEAR_RX_DTOG */
755 
756 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
757   do { \
758     uint16_t _wRegVal; \
759     \
760     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
761     \
762     if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
763     { \
764       PCD_TX_DTOG((USBx), (bEpNum)); \
765     } \
766   } while(0) /* PCD_CLEAR_TX_DTOG */
767 
768 /**
769   * @brief  Sets address in an endpoint register.
770   * @param  USBx USB peripheral instance register address.
771   * @param  bEpNum Endpoint Number.
772   * @param  bAddr Address.
773   * @retval None
774   */
775 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
776   do { \
777     uint16_t _wRegVal; \
778     \
779     _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
780     \
781     PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
782   } while(0) /* PCD_SET_EP_ADDRESS */
783 
784 /**
785   * @brief  Gets address in an endpoint register.
786   * @param  USBx USB peripheral instance register address.
787   * @param  bEpNum Endpoint Number.
788   * @retval None
789   */
790 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
791 
792 #define PCD_EP_TX_CNT(USBx, bEpNum) \
793   ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
794                   ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
795 
796 #define PCD_EP_RX_CNT(USBx, bEpNum) \
797   ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
798                   ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
799 
800 
801 /**
802   * @brief  sets address of the tx/rx buffer.
803   * @param  USBx USB peripheral instance register address.
804   * @param  bEpNum Endpoint Number.
805   * @param  wAddr address to be set (must be word aligned).
806   * @retval None
807   */
808 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
809   do { \
810     __IO uint16_t *_wRegVal; \
811     uint32_t _wRegBase = (uint32_t)USBx; \
812     \
813     _wRegBase += (uint32_t)(USBx)->BTABLE; \
814     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
815     *_wRegVal = ((wAddr) >> 1) << 1; \
816   } while(0) /* PCD_SET_EP_TX_ADDRESS */
817 
818 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
819   do { \
820     __IO uint16_t *_wRegVal; \
821     uint32_t _wRegBase = (uint32_t)USBx; \
822     \
823     _wRegBase += (uint32_t)(USBx)->BTABLE; \
824     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
825     *_wRegVal = ((wAddr) >> 1) << 1; \
826   } while(0) /* PCD_SET_EP_RX_ADDRESS */
827 
828 /**
829   * @brief  Gets address of the tx/rx buffer.
830   * @param  USBx USB peripheral instance register address.
831   * @param  bEpNum Endpoint Number.
832   * @retval address of the buffer.
833   */
834 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
835 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
836 
837 /**
838   * @brief  Sets counter of rx buffer with no. of blocks.
839   * @param  pdwReg Register pointer
840   * @param  wCount Counter.
841   * @param  wNBlocks no. of Blocks.
842   * @retval None
843   */
844 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
845   do { \
846     (wNBlocks) = (wCount) >> 5; \
847     if (((wCount) & 0x1fU) == 0U) \
848     { \
849       (wNBlocks)--; \
850     } \
851     *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
852   } while(0) /* PCD_CALC_BLK32 */
853 
854 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
855   do { \
856     (wNBlocks) = (wCount) >> 1; \
857     if (((wCount) & 0x1U) != 0U) \
858     { \
859       (wNBlocks)++; \
860     } \
861     *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \
862   } while(0) /* PCD_CALC_BLK2 */
863 
864 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
865   do { \
866     uint32_t wNBlocks; \
867     \
868     *(pdwReg) &= 0x3FFU; \
869     \
870     if ((wCount) > 62U) \
871     { \
872       PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
873     } \
874     else \
875     { \
876       if ((wCount) == 0U) \
877       { \
878         *(pdwReg) |= USB_CNTRX_BLSIZE; \
879       } \
880       else \
881       { \
882         PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
883       } \
884     } \
885   } while(0) /* PCD_SET_EP_CNT_RX_REG */
886 
887 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
888   do { \
889     uint32_t _wRegBase = (uint32_t)(USBx); \
890     __IO uint16_t *pdwReg; \
891     \
892     _wRegBase += (uint32_t)(USBx)->BTABLE; \
893     pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
894     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
895   } while(0)
896 
897 /**
898   * @brief  sets counter for the tx/rx buffer.
899   * @param  USBx USB peripheral instance register address.
900   * @param  bEpNum Endpoint Number.
901   * @param  wCount Counter value.
902   * @retval None
903   */
904 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
905   do { \
906     uint32_t _wRegBase = (uint32_t)(USBx); \
907     __IO uint16_t *_wRegVal; \
908     \
909     _wRegBase += (uint32_t)(USBx)->BTABLE; \
910     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
911     *_wRegVal = (uint16_t)(wCount); \
912   } while(0)
913 
914 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
915   do { \
916     uint32_t _wRegBase = (uint32_t)(USBx); \
917     __IO uint16_t *_wRegVal; \
918     \
919     _wRegBase += (uint32_t)(USBx)->BTABLE; \
920     _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
921     PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
922   } while(0)
923 
924 /**
925   * @brief  gets counter of the tx buffer.
926   * @param  USBx USB peripheral instance register address.
927   * @param  bEpNum Endpoint Number.
928   * @retval Counter value
929   */
930 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
931 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
932 
933 /**
934   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
935   * @param  USBx USB peripheral instance register address.
936   * @param  bEpNum Endpoint Number.
937   * @param  wBuf0Addr buffer 0 address.
938   * @retval Counter value
939   */
940 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
941   do { \
942     PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
943   } while(0) /* PCD_SET_EP_DBUF0_ADDR */
944 
945 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
946   do { \
947     PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
948   } while(0) /* PCD_SET_EP_DBUF1_ADDR */
949 
950 /**
951   * @brief  Sets addresses in a double buffer endpoint.
952   * @param  USBx USB peripheral instance register address.
953   * @param  bEpNum Endpoint Number.
954   * @param  wBuf0Addr: buffer 0 address.
955   * @param  wBuf1Addr = buffer 1 address.
956   * @retval None
957   */
958 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
959   do { \
960     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
961     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
962   } while(0) /* PCD_SET_EP_DBUF_ADDR */
963 
964 /**
965   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
966   * @param  USBx USB peripheral instance register address.
967   * @param  bEpNum Endpoint Number.
968   * @retval None
969   */
970 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
971 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
972 
973 /**
974   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
975   * @param  USBx USB peripheral instance register address.
976   * @param  bEpNum Endpoint Number.
977   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
978   *         EP_DBUF_IN  = IN
979   * @param  wCount: Counter value
980   * @retval None
981   */
982 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
983   do { \
984     if ((bDir) == 0U) \
985       /* OUT endpoint */ \
986     { \
987       PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
988     } \
989     else \
990     { \
991       if ((bDir) == 1U) \
992       { \
993         /* IN endpoint */ \
994         PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
995       } \
996     } \
997   } while(0) /* SetEPDblBuf0Count*/
998 
999 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
1000   do { \
1001     uint32_t _wBase = (uint32_t)(USBx); \
1002     __IO uint16_t *_wEPRegVal; \
1003     \
1004     if ((bDir) == 0U) \
1005     { \
1006       /* OUT endpoint */ \
1007       PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
1008     } \
1009     else \
1010     { \
1011       if ((bDir) == 1U) \
1012       { \
1013         /* IN endpoint */ \
1014         _wBase += (uint32_t)(USBx)->BTABLE; \
1015         _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
1016         *_wEPRegVal = (uint16_t)(wCount); \
1017       } \
1018     } \
1019   } while(0) /* SetEPDblBuf1Count */
1020 
1021 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
1022   do { \
1023     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
1024     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
1025   } while(0) /* PCD_SET_EP_DBUF_CNT */
1026 
1027 /**
1028   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
1029   * @param  USBx USB peripheral instance register address.
1030   * @param  bEpNum Endpoint Number.
1031   * @retval None
1032   */
1033 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
1034 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
1035 
1036 #endif /* defined (USB) */
1037 
1038 /**
1039   * @}
1040   */
1041 
1042 /**
1043   * @}
1044   */
1045 
1046 /**
1047   * @}
1048   */
1049 #endif /* defined (USB) || defined (USB_OTG_FS) */
1050 
1051 #ifdef __cplusplus
1052 }
1053 #endif
1054 
1055 #endif /* STM32F1xx_HAL_PCD_H */
1056