1 /** 2 ****************************************************************************** 3 * @file system_stm32wb0x.h 4 * @author GPM WBL Application Team 5 * @brief CMSIS Cortex-M0+ Device System Source File for STM32WB0x devices. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2024 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /** @addtogroup CMSIS 20 * @{ 21 */ 22 23 /** @addtogroup STM32WB0x_system 24 * @{ 25 */ 26 27 #ifndef SYSTEM_STM32WB0x_H 28 #define SYSTEM_STM32WB0x_H 29 30 #include "stdint.h" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /** @addtogroup STM32WB0x_System_Includes 37 * @{ 38 */ 39 40 /** 41 * @} 42 */ 43 44 45 /** @addtogroup System Address 46 * @{ 47 */ 48 49 #if defined(STM32WB07) 50 /** 51 * @brief RAM base address 52 */ 53 #define _MEMORY_RAM_BEGIN_ 0x20000000 54 #define _MEMORY_RAM_SIZE_ 0x10000 /* 64KB */ 55 #define _MEMORY_RAM_END_ 0x2000FFFF 56 57 /** 58 * @brief User FLASH base address 59 */ 60 #define _MEMORY_FLASH_BEGIN_ 0x10040000 61 #define _MEMORY_FLASH_SIZE_ 0x40000 /* 256KB */ 62 #define _MEMORY_FLASH_END_ 0x1007FFFF 63 #define _MEMORY_BYTES_PER_PAGE_ (2048) 64 #elif defined(STM32WB06) 65 /** 66 * @brief RAM base address 67 */ 68 #define _MEMORY_RAM_BEGIN_ 0x20000000 69 #define _MEMORY_RAM_SIZE_ 0x10000 /* 32KB */ 70 #define _MEMORY_RAM_END_ 0x20007FFF 71 72 /** 73 * @brief User FLASH base address 74 */ 75 #define _MEMORY_FLASH_BEGIN_ 0x10040000 76 #define _MEMORY_FLASH_SIZE_ 0x40000 /* 256KB */ 77 #define _MEMORY_FLASH_END_ 0x1007FFFF 78 #define _MEMORY_BYTES_PER_PAGE_ (2048) 79 #elif defined(STM32WB05) 80 /** 81 * @brief RAM base address 82 */ 83 #define _MEMORY_RAM_BEGIN_ 0x20000000 84 #define _MEMORY_RAM_SIZE_ 0x6000 /* 24KB */ 85 #define _MEMORY_RAM_END_ 0x20005FFF 86 87 /** 88 * @brief User FLASH base address 89 */ 90 #define _MEMORY_FLASH_BEGIN_ 0x10040000 91 #define _MEMORY_FLASH_SIZE_ 0x30000 /* 192KB */ 92 #define _MEMORY_FLASH_END_ 0x1006FFFF 93 #define _MEMORY_BYTES_PER_PAGE_ (2048) 94 #elif defined(STM32WB09) 95 /** 96 * @brief RAM base address 97 */ 98 #define _MEMORY_RAM_BEGIN_ 0x20000000 99 #define _MEMORY_RAM_SIZE_ 0x10000 /* 64KB */ 100 #define _MEMORY_RAM_END_ 0x2000FFFF 101 102 /** 103 * @brief User FLASH base address 104 */ 105 #define _MEMORY_FLASH_BEGIN_ 0x10040000 106 #define _MEMORY_FLASH_SIZE_ 0x80000 /* 512KB */ 107 #define _MEMORY_FLASH_END_ 0x100BFFFF 108 #define _MEMORY_BYTES_PER_PAGE_ (2048) 109 #endif 110 111 /** 112 * @brief ROM base address 113 */ 114 #define _MEMORY_ROM_BEGIN_ 0x10000000 115 #define _MEMORY_ROM_SIZE_ 0x1800 /* 6KB */ 116 #define _MEMORY_ROM_END_ 0x1000017FF 117 118 /** 119 * @} 120 */ 121 122 123 /** @addtogroup STM32WB0x_NVIC_IRQ_Priority 124 * @{ 125 */ 126 #define IRQ_CRITICAL_PRIORITY 0 127 #define IRQ_HIGH_PRIORITY 1 128 #define IRQ_MED_PRIORITY 2 129 #define IRQ_LOW_PRIORITY 3 130 131 /** 132 * @} 133 */ 134 135 /** @addtogroup STM32WB0x_SMPS_CONFIG 136 * @{ 137 */ 138 /* SMPS BOM supported */ 139 #define SMPS_BOM1 0 // SMPS Inductor 1.5uH 140 #define SMPS_BOM2 1 // SMPS Inductor 2.2uH 141 #define SMPS_BOM3 2 // SMPS Inductor 10uH 142 143 /* SMPS Configuration supported */ 144 #define SMPS_ON 0 145 #define SMPS_OFF 1 146 #define SMPS_BYPAPSS 2 147 148 /* SMPS Configuration during power save */ 149 #define SMPS_LOW_POWER_NO_OPEN 0 150 #define SMPS_LOW_POWER_OPEN 1 151 152 /** 153 * @} 154 */ 155 156 /** @addtogroup Exported types 157 * @{ 158 */ 159 #if 0 /** PATCH: don't define unused datatypes 'intfunc' and 'intvec_elem' */ 160 typedef void(*intfunc)(void); 161 162 typedef union 163 { 164 intfunc __fun; 165 void *__ptr; 166 } intvec_elem; 167 #endif /* ENDOF PATCH */ 168 169 typedef struct RAM_VR_s 170 { 171 uint8_t OTAActivation[4]; 172 uint32_t SavedMSP; 173 uint32_t WakeupFromSleepFlag; 174 /** 175 * ResetReason is the content of RCC_CSR after a reset. 176 * RCC_CSR is automatically reset by internal bootloader. 177 * See Reset Flags Defines RCC_LL_EC_GET_FLAG in stm32wb0x_ll_rcc.h 178 */ 179 uint32_t ResetReason; 180 uint32_t AppBase; 181 uint32_t Reserved[5]; 182 uint32_t BlueFlag; 183 } RAM_VR_TypeDef; 184 185 /** 186 * @} 187 */ 188 189 /** @addtogroup STM32WB0x_System_Exported_Variables 190 * @{ 191 */ 192 /* The SystemCoreClock variable is updated in three ways: 193 1) by calling CMSIS function SystemCoreClockUpdate() 194 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 195 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 196 Note: If you use this function to configure the system clock; then there 197 is no need to call the 2 first functions listed above, since SystemCoreClock 198 variable is updated automatically. 199 */ 200 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 201 202 extern RAM_VR_TypeDef RAM_VR; /*!< Virtual Register map in RAM */ 203 204 #if 0 /** PATCH: remove declaration of '__vector_table[]' */ 205 extern const intvec_elem __vector_table[]; 206 #endif /* ENDOF PATCH */ 207 208 /** 209 * @} 210 */ 211 212 213 /** @addtogroup STM32WB0x_System_Exported_Functions 214 * @{ 215 */ 216 217 /** 218 * @brief Setup the microcontroller system. 219 * 220 * Initialize the System and update the SystemCoreClock variable. 221 */ 222 extern void SystemInit(void); 223 224 225 /** 226 * @brief Update SystemCoreClock variable. 227 * 228 * Updates the SystemCoreClock with current core Clock retrieved from cpu registers. 229 */ 230 extern void SystemCoreClockUpdate(void); 231 232 /** 233 * @brief CPU Content Restore. 234 * 235 * Function designed to restore CPU context at wakeup from Power Save. 236 */ 237 extern void CPUcontextRestore(void); 238 239 /** 240 * @} 241 */ 242 243 244 #ifdef __cplusplus 245 } 246 #endif 247 248 #endif /* SYSTEM_STM32WB0x_H */ 249 250 /** 251 * @} 252 */ 253 254 /** 255 * @} 256 */ 257
