1 /**
2 ******************************************************************************
3 * @file stm32c0xx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2022 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32C0xx_LL_EXTI_H
21 #define STM32C0xx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32c0xx.h"
29
30 /** @addtogroup STM32C0xx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 #define LL_EXTI_REGISTER_PINPOS_SHFT 16u /*!< Define used to shift pin position in EXTICR register */
44
45 /* Private Macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54 /* Exported types ------------------------------------------------------------*/
55 #if defined(USE_FULL_LL_DRIVER)
56 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
57 * @{
58 */
59 typedef struct
60 {
61
62 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
63 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
64 #if defined(EXTI_IMR2_IM36)
65 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
66 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
67 #endif /* LL_EXTI_LINE_36 */
68 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
69 This parameter can be set either to ENABLE or DISABLE */
70
71 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
72 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
73
74 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
75 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
76 } LL_EXTI_InitTypeDef;
77
78 /**
79 * @}
80 */
81 #endif /*USE_FULL_LL_DRIVER*/
82
83 /* Exported constants --------------------------------------------------------*/
84 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
85 * @{
86 */
87
88 /** @defgroup EXTI_LL_EC_LINE LINE
89 * @{
90 */
91 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
92 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
93 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
94 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
95 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
96 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
97 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
98 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
99 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
100 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
101 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
102 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
103 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
104 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
105 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
106 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
107 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
108 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
109 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
110 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
111 #define LL_EXTI_LINE_ALL_0_31 0xFFFFFFFFU /*!< All Extended line */
112 #if defined(EXTI_IMR2_IM34)
113 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
114 #endif /* EXTI_IMR2_IM34 */
115 #if defined(EXTI_IMR2_IM36)
116 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
117 #endif /* EXTI_IMR2_IM36 */
118 #define LL_EXTI_LINE_ALL_32_63 0x00000014U /*!< only line 34 & line 36 */
119 #if defined(USE_FULL_LL_DRIVER)
120 #define LL_EXTI_LINE_NONE 0x00000000U /*!< None Extended line */
121 #endif /*USE_FULL_LL_DRIVER*/
122
123 /** @defgroup EXTI_LL_EC_CONFIG_PORT EXTI CONFIG PORT
124 * @{
125 */
126 #define LL_EXTI_CONFIG_PORTA 0U /*!< EXTI PORT A */
127 #define LL_EXTI_CONFIG_PORTB EXTI_EXTICR1_EXTI0_0 /*!< EXTI PORT B */
128 #define LL_EXTI_CONFIG_PORTC EXTI_EXTICR1_EXTI0_1 /*!< EXTI PORT C */
129 #if defined(GPIOD_BASE)
130 #define LL_EXTI_CONFIG_PORTD (EXTI_EXTICR1_EXTI0_1|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT D */
131 #endif /*GPIOD_BASE*/
132 #define LL_EXTI_CONFIG_PORTF (EXTI_EXTICR1_EXTI0_2|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT F */
133 /**
134 * @}
135 */
136
137 /** @defgroup EXTI_LL_EC_CONFIG_LINE EXTI CONFIG LINE
138 * @{
139 */
140 #define LL_EXTI_CONFIG_LINE0 ((0uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 0U) /*!< EXTI_POSITION_0 | EXTICR[0] */
141 #define LL_EXTI_CONFIG_LINE1 ((8uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 0U) /*!< EXTI_POSITION_8 | EXTICR[0] */
142 #define LL_EXTI_CONFIG_LINE2 ((16uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 0U) /*!< EXTI_POSITION_16 | EXTICR[0] */
143 #define LL_EXTI_CONFIG_LINE3 ((24uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 0U) /*!< EXTI_POSITION_24 | EXTICR[0] */
144 #define LL_EXTI_CONFIG_LINE4 ((0uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 1U) /*!< EXTI_POSITION_0 | EXTICR[1] */
145 #define LL_EXTI_CONFIG_LINE5 ((8uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 1U) /*!< EXTI_POSITION_8 | EXTICR[1] */
146 #define LL_EXTI_CONFIG_LINE6 ((16uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 1U) /*!< EXTI_POSITION_16 | EXTICR[1] */
147 #define LL_EXTI_CONFIG_LINE7 ((24uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 1U) /*!< EXTI_POSITION_24 | EXTICR[1] */
148 #define LL_EXTI_CONFIG_LINE8 ((0uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 2U) /*!< EXTI_POSITION_0 | EXTICR[2] */
149 #define LL_EXTI_CONFIG_LINE9 ((8uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 2U) /*!< EXTI_POSITION_8 | EXTICR[2] */
150 #define LL_EXTI_CONFIG_LINE10 ((16uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 2U) /*!< EXTI_POSITION_16 | EXTICR[2] */
151 #define LL_EXTI_CONFIG_LINE11 ((24uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 2U) /*!< EXTI_POSITION_24 | EXTICR[2] */
152 #define LL_EXTI_CONFIG_LINE12 ((0uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 3U) /*!< EXTI_POSITION_0 | EXTICR[3] */
153 #define LL_EXTI_CONFIG_LINE13 ((8uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 3U) /*!< EXTI_POSITION_8 | EXTICR[3] */
154 #define LL_EXTI_CONFIG_LINE14 ((16uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 3U) /*!< EXTI_POSITION_16 | EXTICR[3] */
155 #define LL_EXTI_CONFIG_LINE15 ((24uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 3U) /*!< EXTI_POSITION_24 | EXTICR[3] */
156 /**
157 * @}
158 */
159 /**
160 * @}
161 */
162 #if defined(USE_FULL_LL_DRIVER)
163
164 /** @defgroup EXTI_LL_EC_MODE Mode
165 * @{
166 */
167 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
168 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
169 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
170 /**
171 * @}
172 */
173
174 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
175 * @{
176 */
177 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
178 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
179 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
180 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
181
182 /**
183 * @}
184 */
185
186
187 #endif /*USE_FULL_LL_DRIVER*/
188
189
190 /**
191 * @}
192 */
193
194 /* Exported macro ------------------------------------------------------------*/
195 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
196 * @{
197 */
198
199 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
200 * @{
201 */
202
203 /**
204 * @brief Write a value in EXTI register
205 * @param __REG__ Register to be written
206 * @param __VALUE__ Value to be written in the register
207 * @retval None
208 */
209 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
210
211 /**
212 * @brief Read a value in EXTI register
213 * @param __REG__ Register to be read
214 * @retval Register value
215 */
216 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
217 /**
218 * @}
219 */
220
221
222 /**
223 * @}
224 */
225
226
227 /* Exported functions --------------------------------------------------------*/
228 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
229 * @{
230 */
231 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
232 * @{
233 */
234
235 /**
236 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
237 * @note The reset value for the direct or internal lines (see RM)
238 * is set to 1 in order to enable the interrupt by default.
239 * Bits are set automatically at Power on.
240 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
241 * @param ExtiLine This parameter can be one of the following values:
242 * @arg @ref LL_EXTI_LINE_0
243 * @arg @ref LL_EXTI_LINE_1
244 * @arg @ref LL_EXTI_LINE_2
245 * @arg @ref LL_EXTI_LINE_3
246 * @arg @ref LL_EXTI_LINE_4
247 * @arg @ref LL_EXTI_LINE_5
248 * @arg @ref LL_EXTI_LINE_6
249 * @arg @ref LL_EXTI_LINE_7
250 * @arg @ref LL_EXTI_LINE_8
251 * @arg @ref LL_EXTI_LINE_9
252 * @arg @ref LL_EXTI_LINE_10
253 * @arg @ref LL_EXTI_LINE_11
254 * @arg @ref LL_EXTI_LINE_12
255 * @arg @ref LL_EXTI_LINE_13
256 * @arg @ref LL_EXTI_LINE_14
257 * @arg @ref LL_EXTI_LINE_15
258 * @arg @ref LL_EXTI_LINE_19
259 * @arg @ref LL_EXTI_LINE_23
260 * @arg @ref LL_EXTI_LINE_25
261 * @arg @ref LL_EXTI_LINE_31
262 * @note Please check each device line mapping for EXTI Line availability
263 * @retval None
264 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)265 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
266 {
267 SET_BIT(EXTI->IMR1, ExtiLine);
268 }
269
270 #if defined(LL_EXTI_LINE_36)
271 /**
272 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
273 * @note The reset value for the direct lines (lines from 32 to 34, line
274 * 39) is set to 1 in order to enable the interrupt by default.
275 * Bits are set automatically at Power on.
276 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
277 * @param ExtiLine This parameter can be one of the following values:
278 * @arg @ref LL_EXTI_LINE_34
279 * @arg @ref LL_EXTI_LINE_36
280 * @arg @ref LL_EXTI_LINE_ALL_32_63
281 * @retval None
282 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)283 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
284 {
285 SET_BIT(EXTI->IMR2, ExtiLine);
286 }
287 #endif /* LL_EXTI_LINE_36 */
288
289 /**
290 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
291 * @note The reset value for the direct or internal lines (see RM)
292 * is set to 1 in order to enable the interrupt by default.
293 * Bits are set automatically at Power on.
294 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
295 * @param ExtiLine This parameter can be one of the following values:
296 * @arg @ref LL_EXTI_LINE_0
297 * @arg @ref LL_EXTI_LINE_1
298 * @arg @ref LL_EXTI_LINE_2
299 * @arg @ref LL_EXTI_LINE_3
300 * @arg @ref LL_EXTI_LINE_4
301 * @arg @ref LL_EXTI_LINE_5
302 * @arg @ref LL_EXTI_LINE_6
303 * @arg @ref LL_EXTI_LINE_7
304 * @arg @ref LL_EXTI_LINE_8
305 * @arg @ref LL_EXTI_LINE_9
306 * @arg @ref LL_EXTI_LINE_10
307 * @arg @ref LL_EXTI_LINE_11
308 * @arg @ref LL_EXTI_LINE_12
309 * @arg @ref LL_EXTI_LINE_13
310 * @arg @ref LL_EXTI_LINE_14
311 * @arg @ref LL_EXTI_LINE_15
312 * @arg @ref LL_EXTI_LINE_19
313 * @arg @ref LL_EXTI_LINE_23
314 * @arg @ref LL_EXTI_LINE_25
315 * @arg @ref LL_EXTI_LINE_31
316 * @note Please check each device line mapping for EXTI Line availability
317 * @retval None
318 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)319 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
320 {
321 CLEAR_BIT(EXTI->IMR1, ExtiLine);
322 }
323
324 #if defined(LL_EXTI_LINE_36)
325 /**
326 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
327 * @note The reset value for the direct lines (lines from 32 to 34, line
328 * 39) is set to 1 in order to enable the interrupt by default.
329 * Bits are set automatically at Power on.
330 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
331 * @param ExtiLine This parameter can be one of the following values:
332 * @arg @ref LL_EXTI_LINE_34
333 * @arg @ref LL_EXTI_LINE_36
334 * @arg @ref LL_EXTI_LINE_ALL_32_63
335 * @retval None
336 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)337 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
338 {
339 CLEAR_BIT(EXTI->IMR2, ExtiLine);
340 }
341 #endif /* LL_EXTI_LINE_36 */
342
343 /**
344 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
345 * @note The reset value for the direct or internal lines (see RM)
346 * is set to 1 in order to enable the interrupt by default.
347 * Bits are set automatically at Power on.
348 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
349 * @param ExtiLine This parameter can be one of the following values:
350 * @arg @ref LL_EXTI_LINE_0
351 * @arg @ref LL_EXTI_LINE_1
352 * @arg @ref LL_EXTI_LINE_2
353 * @arg @ref LL_EXTI_LINE_3
354 * @arg @ref LL_EXTI_LINE_4
355 * @arg @ref LL_EXTI_LINE_5
356 * @arg @ref LL_EXTI_LINE_6
357 * @arg @ref LL_EXTI_LINE_7
358 * @arg @ref LL_EXTI_LINE_8
359 * @arg @ref LL_EXTI_LINE_9
360 * @arg @ref LL_EXTI_LINE_10
361 * @arg @ref LL_EXTI_LINE_11
362 * @arg @ref LL_EXTI_LINE_12
363 * @arg @ref LL_EXTI_LINE_13
364 * @arg @ref LL_EXTI_LINE_14
365 * @arg @ref LL_EXTI_LINE_15
366 * @arg @ref LL_EXTI_LINE_19
367 * @arg @ref LL_EXTI_LINE_23
368 * @arg @ref LL_EXTI_LINE_25
369 * @arg @ref LL_EXTI_LINE_31
370 * @note Please check each device line mapping for EXTI Line availability
371 * @retval None
372 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)373 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
374 {
375 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
376 }
377
378 #if defined(LL_EXTI_LINE_36)
379 /**
380 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
381 * @note The reset value for the direct lines (lines from 32 to 34, line
382 * 39) is set to 1 in order to enable the interrupt by default.
383 * Bits are set automatically at Power on.
384 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
385 * @param ExtiLine This parameter can be one of the following values:
386 * @arg @ref LL_EXTI_LINE_34
387 * @arg @ref LL_EXTI_LINE_36
388 * @arg @ref LL_EXTI_LINE_ALL_32_63
389 * @retval State of bit (1 or 0).
390 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)391 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
392 {
393 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
394 }
395 #endif /* LL_EXTI_LINE_36 */
396 /**
397 * @}
398 */
399
400 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
401 * @{
402 */
403
404 /**
405 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
406 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
407 * @param ExtiLine This parameter can be one of the following values:
408 * @arg @ref LL_EXTI_LINE_0
409 * @arg @ref LL_EXTI_LINE_1
410 * @arg @ref LL_EXTI_LINE_2
411 * @arg @ref LL_EXTI_LINE_3
412 * @arg @ref LL_EXTI_LINE_4
413 * @arg @ref LL_EXTI_LINE_5
414 * @arg @ref LL_EXTI_LINE_6
415 * @arg @ref LL_EXTI_LINE_7
416 * @arg @ref LL_EXTI_LINE_8
417 * @arg @ref LL_EXTI_LINE_9
418 * @arg @ref LL_EXTI_LINE_10
419 * @arg @ref LL_EXTI_LINE_11
420 * @arg @ref LL_EXTI_LINE_12
421 * @arg @ref LL_EXTI_LINE_13
422 * @arg @ref LL_EXTI_LINE_14
423 * @arg @ref LL_EXTI_LINE_15
424 * @arg @ref LL_EXTI_LINE_19
425 * @arg @ref LL_EXTI_LINE_23
426 * @arg @ref LL_EXTI_LINE_25
427 * @arg @ref LL_EXTI_LINE_31
428 * @note Please check each device line mapping for EXTI Line availability
429 * @retval None
430 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)431 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
432 {
433 SET_BIT(EXTI->EMR1, ExtiLine);
434
435 }
436
437 #if defined(LL_EXTI_LINE_36)
438 /**
439 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
440 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
441 * @param ExtiLine This parameter can be a combination of the following values:
442 * @arg @ref LL_EXTI_LINE_34
443 * @arg @ref LL_EXTI_LINE_36
444 * @arg @ref LL_EXTI_LINE_ALL_32_63
445 * @retval None
446 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)447 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
448 {
449 SET_BIT(EXTI->EMR2, ExtiLine);
450 }
451 #endif /* LL_EXTI_LINE_36 */
452
453 /**
454 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
455 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
456 * @param ExtiLine This parameter can be one of the following values:
457 * @arg @ref LL_EXTI_LINE_0
458 * @arg @ref LL_EXTI_LINE_1
459 * @arg @ref LL_EXTI_LINE_2
460 * @arg @ref LL_EXTI_LINE_3
461 * @arg @ref LL_EXTI_LINE_4
462 * @arg @ref LL_EXTI_LINE_5
463 * @arg @ref LL_EXTI_LINE_6
464 * @arg @ref LL_EXTI_LINE_7
465 * @arg @ref LL_EXTI_LINE_8
466 * @arg @ref LL_EXTI_LINE_9
467 * @arg @ref LL_EXTI_LINE_10
468 * @arg @ref LL_EXTI_LINE_11
469 * @arg @ref LL_EXTI_LINE_12
470 * @arg @ref LL_EXTI_LINE_13
471 * @arg @ref LL_EXTI_LINE_14
472 * @arg @ref LL_EXTI_LINE_15
473 * @arg @ref LL_EXTI_LINE_19
474 * @arg @ref LL_EXTI_LINE_23
475 * @arg @ref LL_EXTI_LINE_25
476 * @arg @ref LL_EXTI_LINE_31
477 * @note Please check each device line mapping for EXTI Line availability
478 * @retval None
479 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)480 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
481 {
482 CLEAR_BIT(EXTI->EMR1, ExtiLine);
483 }
484
485 #if defined(LL_EXTI_LINE_36)
486 /**
487 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
488 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
489 * @param ExtiLine This parameter can be a combination of the following values:
490 * @arg @ref LL_EXTI_LINE_34
491 * @arg @ref LL_EXTI_LINE_36
492 * @arg @ref LL_EXTI_LINE_ALL_32_63
493 * @retval None
494 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)495 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
496 {
497 CLEAR_BIT(EXTI->EMR2, ExtiLine);
498 }
499 #endif /* LL_EXTI_LINE_36 */
500
501 /**
502 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
503 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
504 * @param ExtiLine This parameter can be one of the following values:
505 * @arg @ref LL_EXTI_LINE_0
506 * @arg @ref LL_EXTI_LINE_1
507 * @arg @ref LL_EXTI_LINE_2
508 * @arg @ref LL_EXTI_LINE_3
509 * @arg @ref LL_EXTI_LINE_4
510 * @arg @ref LL_EXTI_LINE_5
511 * @arg @ref LL_EXTI_LINE_6
512 * @arg @ref LL_EXTI_LINE_7
513 * @arg @ref LL_EXTI_LINE_8
514 * @arg @ref LL_EXTI_LINE_9
515 * @arg @ref LL_EXTI_LINE_10
516 * @arg @ref LL_EXTI_LINE_11
517 * @arg @ref LL_EXTI_LINE_12
518 * @arg @ref LL_EXTI_LINE_13
519 * @arg @ref LL_EXTI_LINE_14
520 * @arg @ref LL_EXTI_LINE_15
521 * @arg @ref LL_EXTI_LINE_19
522 * @arg @ref LL_EXTI_LINE_23
523 * @arg @ref LL_EXTI_LINE_25
524 * @arg @ref LL_EXTI_LINE_31
525 * @note Please check each device line mapping for EXTI Line availability
526 * @retval State of bit (1 or 0).
527 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)528 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
529 {
530 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
531 }
532
533 #if defined(LL_EXTI_LINE_36)
534 /**
535 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
536 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
537 * @param ExtiLine This parameter can be a combination of the following values
538 * @arg @ref LL_EXTI_LINE_34
539 * @arg @ref LL_EXTI_LINE_36
540 * @arg @ref LL_EXTI_LINE_ALL_32_63
541 * @retval State of bit (1 or 0).
542 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)543 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
544 {
545 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
546 }
547 #endif /* LL_EXTI_LINE_36 */
548
549 /**
550 * @}
551 */
552
553 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
554 * @{
555 */
556
557 /**
558 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
559 * @note The configurable wakeup lines are edge-triggered. No glitch must be
560 * generated on these lines. If a rising edge on a configurable interrupt
561 * line occurs during a write operation in the EXTI_RTSR register, the
562 * pending bit is not set.
563 * Rising and falling edge triggers can be set for
564 * the same interrupt line. In this case, both generate a trigger
565 * condition.
566 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
567 * @param ExtiLine This parameter can be a combination of the following values:
568 * @arg @ref LL_EXTI_LINE_0
569 * @arg @ref LL_EXTI_LINE_1
570 * @arg @ref LL_EXTI_LINE_2
571 * @arg @ref LL_EXTI_LINE_3
572 * @arg @ref LL_EXTI_LINE_4
573 * @arg @ref LL_EXTI_LINE_5
574 * @arg @ref LL_EXTI_LINE_6
575 * @arg @ref LL_EXTI_LINE_7
576 * @arg @ref LL_EXTI_LINE_8
577 * @arg @ref LL_EXTI_LINE_9
578 * @arg @ref LL_EXTI_LINE_10
579 * @arg @ref LL_EXTI_LINE_11
580 * @arg @ref LL_EXTI_LINE_12
581 * @arg @ref LL_EXTI_LINE_13
582 * @arg @ref LL_EXTI_LINE_14
583 * @arg @ref LL_EXTI_LINE_15
584 * @note Please check each device line mapping for EXTI Line availability
585 * @retval None
586 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)587 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
588 {
589 SET_BIT(EXTI->RTSR1, ExtiLine);
590 }
591
592 #if defined(LL_EXTI_LINE_34)
593 /**
594 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
595 * @note The configurable wakeup lines are edge-triggered. No glitch must be
596 * generated on these lines. If a rising edge on a configurable interrupt
597 * line occurs during a write operation in the EXTI_RTSR register, the
598 * pending bit is not set.
599 * Rising and falling edge triggers can be set for
600 * the same interrupt line. In this case, both generate a trigger
601 * condition.
602 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
603 * @param ExtiLine This parameter can be a combination of the following values:
604 * @arg @ref LL_EXTI_LINE_34
605 * @note Please check each device line mapping for EXTI Line availability
606 * @retval None
607 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)608 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
609 {
610 SET_BIT(EXTI->RTSR2, ExtiLine);
611 }
612 #endif /* LL_EXTI_LINE_34 */
613
614 /**
615 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
616 * @note The configurable wakeup lines are edge-triggered. No glitch must be
617 * generated on these lines. If a rising edge on a configurable interrupt
618 * line occurs during a write operation in the EXTI_RTSR register, the
619 * pending bit is not set.
620 * Rising and falling edge triggers can be set for
621 * the same interrupt line. In this case, both generate a trigger
622 * condition.
623 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
624 * @param ExtiLine This parameter can be a combination of the following values:
625 * @arg @ref LL_EXTI_LINE_0
626 * @arg @ref LL_EXTI_LINE_1
627 * @arg @ref LL_EXTI_LINE_2
628 * @arg @ref LL_EXTI_LINE_3
629 * @arg @ref LL_EXTI_LINE_4
630 * @arg @ref LL_EXTI_LINE_5
631 * @arg @ref LL_EXTI_LINE_6
632 * @arg @ref LL_EXTI_LINE_7
633 * @arg @ref LL_EXTI_LINE_8
634 * @arg @ref LL_EXTI_LINE_9
635 * @arg @ref LL_EXTI_LINE_10
636 * @arg @ref LL_EXTI_LINE_11
637 * @arg @ref LL_EXTI_LINE_12
638 * @arg @ref LL_EXTI_LINE_13
639 * @arg @ref LL_EXTI_LINE_14
640 * @arg @ref LL_EXTI_LINE_15
641 * @note Please check each device line mapping for EXTI Line availability
642 * @retval None
643 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)644 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
645 {
646 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
647
648 }
649
650 #if defined(LL_EXTI_LINE_34)
651 /**
652 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
653 * @note The configurable wakeup lines are edge-triggered. No glitch must be
654 * generated on these lines. If a rising edge on a configurable interrupt
655 * line occurs during a write operation in the EXTI_RTSR register, the
656 * pending bit is not set.
657 * Rising and falling edge triggers can be set for
658 * the same interrupt line. In this case, both generate a trigger
659 * condition.
660 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
661 * @param ExtiLine This parameter can be a combination of the following values:
662 * @arg @ref LL_EXTI_LINE_34
663 * @note Please check each device line mapping for EXTI Line availability
664 * @retval None
665 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)666 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
667 {
668 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
669 }
670 #endif /* LL_EXTI_LINE_34 */
671
672 /**
673 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
674 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
675 * @param ExtiLine This parameter can be a combination of the following values:
676 * @arg @ref LL_EXTI_LINE_0
677 * @arg @ref LL_EXTI_LINE_1
678 * @arg @ref LL_EXTI_LINE_2
679 * @arg @ref LL_EXTI_LINE_3
680 * @arg @ref LL_EXTI_LINE_4
681 * @arg @ref LL_EXTI_LINE_5
682 * @arg @ref LL_EXTI_LINE_6
683 * @arg @ref LL_EXTI_LINE_7
684 * @arg @ref LL_EXTI_LINE_8
685 * @arg @ref LL_EXTI_LINE_9
686 * @arg @ref LL_EXTI_LINE_10
687 * @arg @ref LL_EXTI_LINE_11
688 * @arg @ref LL_EXTI_LINE_12
689 * @arg @ref LL_EXTI_LINE_13
690 * @arg @ref LL_EXTI_LINE_14
691 * @arg @ref LL_EXTI_LINE_15
692 * @note Please check each device line mapping for EXTI Line availability
693 * @retval State of bit (1 or 0).
694 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)695 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
696 {
697 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
698 }
699
700 #if defined(LL_EXTI_LINE_34)
701 /**
702 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
703 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
704 * @param ExtiLine This parameter can be a combination of the following values:
705 * @arg @ref LL_EXTI_LINE_34
706 * @note Please check each device line mapping for EXTI Line availability
707 * @retval State of bit (1 or 0).
708 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)709 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
710 {
711 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
712 }
713 #endif /* LL_EXTI_LINE_34 */
714
715 /**
716 * @}
717 */
718
719 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
720 * @{
721 */
722
723 /**
724 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
725 * @note The configurable wakeup lines are edge-triggered. No glitch must be
726 * generated on these lines. If a falling edge on a configurable interrupt
727 * line occurs during a write operation in the EXTI_FTSR register, the
728 * pending bit is not set.
729 * Rising and falling edge triggers can be set for
730 * the same interrupt line. In this case, both generate a trigger
731 * condition.
732 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
733 * @param ExtiLine This parameter can be a combination of the following values:
734 * @arg @ref LL_EXTI_LINE_0
735 * @arg @ref LL_EXTI_LINE_1
736 * @arg @ref LL_EXTI_LINE_2
737 * @arg @ref LL_EXTI_LINE_3
738 * @arg @ref LL_EXTI_LINE_4
739 * @arg @ref LL_EXTI_LINE_5
740 * @arg @ref LL_EXTI_LINE_6
741 * @arg @ref LL_EXTI_LINE_7
742 * @arg @ref LL_EXTI_LINE_8
743 * @arg @ref LL_EXTI_LINE_9
744 * @arg @ref LL_EXTI_LINE_10
745 * @arg @ref LL_EXTI_LINE_11
746 * @arg @ref LL_EXTI_LINE_12
747 * @arg @ref LL_EXTI_LINE_13
748 * @arg @ref LL_EXTI_LINE_14
749 * @arg @ref LL_EXTI_LINE_15
750 * @note Please check each device line mapping for EXTI Line availability
751 * @retval None
752 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)753 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
754 {
755 SET_BIT(EXTI->FTSR1, ExtiLine);
756 }
757
758 #if defined(LL_EXTI_LINE_34)
759 /**
760 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
761 * @note The configurable wakeup lines are edge-triggered. No glitch must be
762 * generated on these lines. If a falling edge on a configurable interrupt
763 * line occurs during a write operation in the EXTI_FTSR register, the
764 * pending bit is not set.
765 * Rising and falling edge triggers can be set for
766 * the same interrupt line. In this case, both generate a trigger
767 * condition.
768 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
769 * @param ExtiLine This parameter can be a combination of the following values:
770 * @arg @ref LL_EXTI_LINE_34
771 * @note Please check each device line mapping for EXTI Line availability
772 * @retval None
773 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)774 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
775 {
776 SET_BIT(EXTI->FTSR2, ExtiLine);
777 }
778 #endif /* LL_EXTI_LINE_34 */
779
780 /**
781 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
782 * @note The configurable wakeup lines are edge-triggered. No glitch must be
783 * generated on these lines. If a Falling edge on a configurable interrupt
784 * line occurs during a write operation in the EXTI_FTSR register, the
785 * pending bit is not set.
786 * Rising and falling edge triggers can be set for the same interrupt line.
787 * In this case, both generate a trigger condition.
788 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
789 * @param ExtiLine This parameter can be a combination of the following values:
790 * @arg @ref LL_EXTI_LINE_0
791 * @arg @ref LL_EXTI_LINE_1
792 * @arg @ref LL_EXTI_LINE_2
793 * @arg @ref LL_EXTI_LINE_3
794 * @arg @ref LL_EXTI_LINE_4
795 * @arg @ref LL_EXTI_LINE_5
796 * @arg @ref LL_EXTI_LINE_6
797 * @arg @ref LL_EXTI_LINE_7
798 * @arg @ref LL_EXTI_LINE_8
799 * @arg @ref LL_EXTI_LINE_9
800 * @arg @ref LL_EXTI_LINE_10
801 * @arg @ref LL_EXTI_LINE_11
802 * @arg @ref LL_EXTI_LINE_12
803 * @arg @ref LL_EXTI_LINE_13
804 * @arg @ref LL_EXTI_LINE_14
805 * @arg @ref LL_EXTI_LINE_15
806 * @note Please check each device line mapping for EXTI Line availability
807 * @retval None
808 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)809 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
810 {
811 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
812 }
813
814 #if defined(LL_EXTI_LINE_34)
815 /**
816 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
817 * @note The configurable wakeup lines are edge-triggered. No glitch must be
818 * generated on these lines. If a Falling edge on a configurable interrupt
819 * line occurs during a write operation in the EXTI_FTSR register, the
820 * pending bit is not set.
821 * Rising and falling edge triggers can be set for the same interrupt line.
822 * In this case, both generate a trigger condition.
823 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
824 * @param ExtiLine This parameter can be a combination of the following values:
825 * @arg @ref LL_EXTI_LINE_34
826 * @note Please check each device line mapping for EXTI Line availability
827 * @retval None
828 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)829 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
830 {
831 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
832 }
833 #endif /* LL_EXTI_LINE_34 */
834
835 /**
836 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
837 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
838 * @param ExtiLine This parameter can be a combination of the following values:
839 * @arg @ref LL_EXTI_LINE_0
840 * @arg @ref LL_EXTI_LINE_1
841 * @arg @ref LL_EXTI_LINE_2
842 * @arg @ref LL_EXTI_LINE_3
843 * @arg @ref LL_EXTI_LINE_4
844 * @arg @ref LL_EXTI_LINE_5
845 * @arg @ref LL_EXTI_LINE_6
846 * @arg @ref LL_EXTI_LINE_7
847 * @arg @ref LL_EXTI_LINE_8
848 * @arg @ref LL_EXTI_LINE_9
849 * @arg @ref LL_EXTI_LINE_10
850 * @arg @ref LL_EXTI_LINE_11
851 * @arg @ref LL_EXTI_LINE_12
852 * @arg @ref LL_EXTI_LINE_13
853 * @arg @ref LL_EXTI_LINE_14
854 * @arg @ref LL_EXTI_LINE_15
855 * @note Please check each device line mapping for EXTI Line availability
856 * @retval State of bit (1 or 0).
857 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)858 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
859 {
860 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
861 }
862
863 #if defined(LL_EXTI_LINE_34)
864 /**
865 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
866 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
867 * @param ExtiLine This parameter can be a combination of the following values:
868 * @arg @ref LL_EXTI_LINE_34
869 * @note Please check each device line mapping for EXTI Line availability
870 * @retval State of bit (1 or 0).
871 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)872 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
873 {
874 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
875 }
876 #endif /* LL_EXTI_LINE_34 */
877
878 /**
879 * @}
880 */
881
882 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
883 * @{
884 */
885
886 /**
887 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
888 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
889 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
890 * resulting in an interrupt request generation.
891 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
892 * register (by writing a 1 into the bit)
893 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
894 * @param ExtiLine This parameter can be a combination of the following values:
895 * @arg @ref LL_EXTI_LINE_0
896 * @arg @ref LL_EXTI_LINE_1
897 * @arg @ref LL_EXTI_LINE_2
898 * @arg @ref LL_EXTI_LINE_3
899 * @arg @ref LL_EXTI_LINE_4
900 * @arg @ref LL_EXTI_LINE_5
901 * @arg @ref LL_EXTI_LINE_6
902 * @arg @ref LL_EXTI_LINE_7
903 * @arg @ref LL_EXTI_LINE_8
904 * @arg @ref LL_EXTI_LINE_9
905 * @arg @ref LL_EXTI_LINE_10
906 * @arg @ref LL_EXTI_LINE_11
907 * @arg @ref LL_EXTI_LINE_12
908 * @arg @ref LL_EXTI_LINE_13
909 * @arg @ref LL_EXTI_LINE_14
910 * @arg @ref LL_EXTI_LINE_15
911 * @note Please check each device line mapping for EXTI Line availability
912 * @retval None
913 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)914 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
915 {
916 SET_BIT(EXTI->SWIER1, ExtiLine);
917 }
918
919 #if defined(LL_EXTI_LINE_34)
920 /**
921 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
922 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
923 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
924 * resulting in an interrupt request generation.
925 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
926 * register (by writing a 1 into the bit)
927 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
928 * @param ExtiLine This parameter can be a combination of the following values:
929 * @arg @ref LL_EXTI_LINE_34
930 * @note Please check each device line mapping for EXTI Line availability
931 * @retval None
932 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)933 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
934 {
935 SET_BIT(EXTI->SWIER2, ExtiLine);
936 }
937 #endif /* LL_EXTI_LINE_34 */
938
939 /**
940 * @}
941 */
942
943 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
944 * @{
945 */
946
947 /**
948 * @brief Check if the ExtLine Falling Flag is set or not for Lines in range 0 to 31
949 * @note This bit is set when the falling edge event arrives on the interrupt
950 * line. This bit is cleared by writing a 1 to the bit.
951 * @rmtoll FPR1 FPIFx LL_EXTI_IsActiveFallingFlag_0_31
952 * @param ExtiLine This parameter can be a combination of the following values:
953 * @arg @ref LL_EXTI_LINE_0
954 * @arg @ref LL_EXTI_LINE_1
955 * @arg @ref LL_EXTI_LINE_2
956 * @arg @ref LL_EXTI_LINE_3
957 * @arg @ref LL_EXTI_LINE_4
958 * @arg @ref LL_EXTI_LINE_5
959 * @arg @ref LL_EXTI_LINE_6
960 * @arg @ref LL_EXTI_LINE_7
961 * @arg @ref LL_EXTI_LINE_8
962 * @arg @ref LL_EXTI_LINE_9
963 * @arg @ref LL_EXTI_LINE_10
964 * @arg @ref LL_EXTI_LINE_11
965 * @arg @ref LL_EXTI_LINE_12
966 * @arg @ref LL_EXTI_LINE_13
967 * @arg @ref LL_EXTI_LINE_14
968 * @arg @ref LL_EXTI_LINE_15
969 * @arg @ref LL_EXTI_LINE_19
970 * @arg @ref LL_EXTI_LINE_23
971 * @arg @ref LL_EXTI_LINE_25
972 * @arg @ref LL_EXTI_LINE_31
973 * @note Please check each device line mapping for EXTI Line availability
974 * @retval State of bit (1 or 0).
975 */
LL_EXTI_IsActiveFallingFlag_0_31(uint32_t ExtiLine)976 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_0_31(uint32_t ExtiLine)
977 {
978 return ((READ_BIT(EXTI->FPR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
979 }
980
981 #if defined(LL_EXTI_LINE_34)
982 /**
983 * @brief Check if the ExtLine Falling Flag is set or not for Lines in range 32 to 63
984 * @note This bit is set when the falling edge event arrives on the interrupt
985 * line. This bit is cleared by writing a 1 to the bit.
986 * @rmtoll FPR2 FPIFx LL_EXTI_IsActiveFallingFlag_32_63
987 * @param ExtiLine This parameter can be a combination of the following values:
988 * @arg @ref LL_EXTI_LINE_34
989 * @note Please check each device line mapping for EXTI Line availability
990 * @retval State of bit (1 or 0).
991 */
LL_EXTI_IsActiveFallingFlag_32_63(uint32_t ExtiLine)992 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_32_63(uint32_t ExtiLine)
993 {
994 return ((READ_BIT(EXTI->FPR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
995 }
996 #endif /* LL_EXTI_LINE_34 */
997
998 /**
999 * @brief Read ExtLine Combination Falling Flag for Lines in range 0 to 31
1000 * @note This bit is set when the falling edge event arrives on the interrupt
1001 * line. This bit is cleared by writing a 1 to the bit.
1002 * @rmtoll FPR1 FPIFx LL_EXTI_ReadFallingFlag_0_31
1003 * @param ExtiLine This parameter can be a combination of the following values:
1004 * @arg @ref LL_EXTI_LINE_0
1005 * @arg @ref LL_EXTI_LINE_1
1006 * @arg @ref LL_EXTI_LINE_2
1007 * @arg @ref LL_EXTI_LINE_3
1008 * @arg @ref LL_EXTI_LINE_4
1009 * @arg @ref LL_EXTI_LINE_5
1010 * @arg @ref LL_EXTI_LINE_6
1011 * @arg @ref LL_EXTI_LINE_7
1012 * @arg @ref LL_EXTI_LINE_8
1013 * @arg @ref LL_EXTI_LINE_9
1014 * @arg @ref LL_EXTI_LINE_10
1015 * @arg @ref LL_EXTI_LINE_11
1016 * @arg @ref LL_EXTI_LINE_12
1017 * @arg @ref LL_EXTI_LINE_13
1018 * @arg @ref LL_EXTI_LINE_14
1019 * @arg @ref LL_EXTI_LINE_15
1020 * @arg @ref LL_EXTI_LINE_19
1021 * @arg @ref LL_EXTI_LINE_23
1022 * @arg @ref LL_EXTI_LINE_25
1023 * @arg @ref LL_EXTI_LINE_31
1024 * @note Please check each device line mapping for EXTI Line availability
1025 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1026 */
LL_EXTI_ReadFallingFlag_0_31(uint32_t ExtiLine)1027 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_0_31(uint32_t ExtiLine)
1028 {
1029 return (READ_BIT(EXTI->FPR1, ExtiLine));
1030 }
1031
1032 #if defined(LL_EXTI_LINE_34)
1033 /**
1034 * @brief Read ExtLine Combination Falling Flag for Lines in range 32 to 63
1035 * @note This bit is set when the falling edge event arrives on the interrupt
1036 * line. This bit is cleared by writing a 1 to the bit.
1037 * @rmtoll FPR2 FPIFx LL_EXTI_ReadFallingFlag_32_63
1038 * @param ExtiLine This parameter can be a combination of the following values:
1039 * @arg @ref LL_EXTI_LINE_34
1040 * @note Please check each device line mapping for EXTI Line availability
1041 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1042 */
LL_EXTI_ReadFallingFlag_32_63(uint32_t ExtiLine)1043 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_32_63(uint32_t ExtiLine)
1044 {
1045 return (uint32_t)(READ_BIT(EXTI->FPR2, ExtiLine));
1046 }
1047 #endif /* LL_EXTI_LINE_34 */
1048
1049 /**
1050 * @brief Clear ExtLine Falling Flags for Lines in range 0 to 31
1051 * @note This bit is set when the falling edge event arrives on the interrupt
1052 * line. This bit is cleared by writing a 1 to the bit.
1053 * @rmtoll FPR1 FPIFx LL_EXTI_ClearFallingFlag_0_31
1054 * @param ExtiLine This parameter can be a combination of the following values:
1055 * @arg @ref LL_EXTI_LINE_0
1056 * @arg @ref LL_EXTI_LINE_1
1057 * @arg @ref LL_EXTI_LINE_2
1058 * @arg @ref LL_EXTI_LINE_3
1059 * @arg @ref LL_EXTI_LINE_4
1060 * @arg @ref LL_EXTI_LINE_5
1061 * @arg @ref LL_EXTI_LINE_6
1062 * @arg @ref LL_EXTI_LINE_7
1063 * @arg @ref LL_EXTI_LINE_8
1064 * @arg @ref LL_EXTI_LINE_9
1065 * @arg @ref LL_EXTI_LINE_10
1066 * @arg @ref LL_EXTI_LINE_11
1067 * @arg @ref LL_EXTI_LINE_12
1068 * @arg @ref LL_EXTI_LINE_13
1069 * @arg @ref LL_EXTI_LINE_14
1070 * @arg @ref LL_EXTI_LINE_15
1071 * @note Please check each device line mapping for EXTI Line availability
1072 * @retval None
1073 */
LL_EXTI_ClearFallingFlag_0_31(uint32_t ExtiLine)1074 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_0_31(uint32_t ExtiLine)
1075 {
1076 WRITE_REG(EXTI->FPR1, ExtiLine);
1077 }
1078
1079 #if defined(LL_EXTI_LINE_34)
1080 /**
1081 * @brief Clear ExtLine Falling Flags for Lines in range 32 to 63
1082 * @note This bit is set when the falling edge event arrives on the interrupt
1083 * line. This bit is cleared by writing a 1 to the bit.
1084 * @rmtoll FPR2 FPIFx LL_EXTI_ClearFallingFlag_32_63
1085 * @param ExtiLine This parameter can be a combination of the following values:
1086 * @arg @ref LL_EXTI_LINE_34
1087 * @note Please check each device line mapping for EXTI Line availability
1088 * @retval None
1089 */
LL_EXTI_ClearFallingFlag_32_63(uint32_t ExtiLine)1090 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_32_63(uint32_t ExtiLine)
1091 {
1092 WRITE_REG(EXTI->FPR2, ExtiLine);
1093 }
1094 #endif /* LL_EXTI_LINE_34 */
1095
1096 /**
1097 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 0 to 31
1098 * @note This bit is set when the Rising edge event arrives on the interrupt
1099 * line. This bit is cleared by writing a 1 to the bit.
1100 * @rmtoll RPR1 RPIFx LL_EXTI_IsActiveRisingFlag_0_31
1101 * @param ExtiLine This parameter can be a combination of the following values:
1102 * @arg @ref LL_EXTI_LINE_0
1103 * @arg @ref LL_EXTI_LINE_1
1104 * @arg @ref LL_EXTI_LINE_2
1105 * @arg @ref LL_EXTI_LINE_3
1106 * @arg @ref LL_EXTI_LINE_4
1107 * @arg @ref LL_EXTI_LINE_5
1108 * @arg @ref LL_EXTI_LINE_6
1109 * @arg @ref LL_EXTI_LINE_7
1110 * @arg @ref LL_EXTI_LINE_8
1111 * @arg @ref LL_EXTI_LINE_9
1112 * @arg @ref LL_EXTI_LINE_10
1113 * @arg @ref LL_EXTI_LINE_11
1114 * @arg @ref LL_EXTI_LINE_12
1115 * @arg @ref LL_EXTI_LINE_13
1116 * @arg @ref LL_EXTI_LINE_14
1117 * @arg @ref LL_EXTI_LINE_15
1118 * @note Please check each device line mapping for EXTI Line availability
1119 * @retval State of bit (1 or 0).
1120 */
LL_EXTI_IsActiveRisingFlag_0_31(uint32_t ExtiLine)1121 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_0_31(uint32_t ExtiLine)
1122 {
1123 return ((READ_BIT(EXTI->RPR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1124 }
1125
1126 #if defined(LL_EXTI_LINE_34)
1127 /**
1128 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 32 to 63
1129 * @note This bit is set when the Rising edge event arrives on the interrupt
1130 * line. This bit is cleared by writing a 1 to the bit.
1131 * @rmtoll RPR2 RPIFx LL_EXTI_IsActiveRisingFlag_32_63
1132 * @param ExtiLine This parameter can be a combination of the following values:
1133 * @arg @ref LL_EXTI_LINE_34
1134 * @note Please check each device line mapping for EXTI Line availability
1135 * @retval State of bit (1 or 0).
1136 */
LL_EXTI_IsActiveRisingFlag_32_63(uint32_t ExtiLine)1137 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_32_63(uint32_t ExtiLine)
1138 {
1139 return ((READ_BIT(EXTI->RPR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1140 }
1141 #endif /* LL_EXTI_LINE_34 */
1142
1143 /**
1144 * @brief Read ExtLine Combination Rising Flag for Lines in range 0 to 31
1145 * @note This bit is set when the Rising edge event arrives on the interrupt
1146 * line. This bit is cleared by writing a 1 to the bit.
1147 * @rmtoll RPR1 RPIFx LL_EXTI_ReadRisingFlag_0_31
1148 * @param ExtiLine This parameter can be a combination of the following values:
1149 * @arg @ref LL_EXTI_LINE_0
1150 * @arg @ref LL_EXTI_LINE_1
1151 * @arg @ref LL_EXTI_LINE_2
1152 * @arg @ref LL_EXTI_LINE_3
1153 * @arg @ref LL_EXTI_LINE_4
1154 * @arg @ref LL_EXTI_LINE_5
1155 * @arg @ref LL_EXTI_LINE_6
1156 * @arg @ref LL_EXTI_LINE_7
1157 * @arg @ref LL_EXTI_LINE_8
1158 * @arg @ref LL_EXTI_LINE_9
1159 * @arg @ref LL_EXTI_LINE_10
1160 * @arg @ref LL_EXTI_LINE_11
1161 * @arg @ref LL_EXTI_LINE_12
1162 * @arg @ref LL_EXTI_LINE_13
1163 * @arg @ref LL_EXTI_LINE_14
1164 * @arg @ref LL_EXTI_LINE_15
1165 * @note Please check each device line mapping for EXTI Line availability
1166 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1167 */
LL_EXTI_ReadRisingFlag_0_31(uint32_t ExtiLine)1168 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_0_31(uint32_t ExtiLine)
1169 {
1170 return (READ_BIT(EXTI->RPR1, ExtiLine));
1171 }
1172
1173 #if defined(LL_EXTI_LINE_34)
1174 /**
1175 * @brief Read ExtLine Combination Rising Flag for Lines in range 32 to 63
1176 * @note This bit is set when the Rising edge event arrives on the interrupt
1177 * line. This bit is cleared by writing a 1 to the bit.
1178 * @rmtoll RPR2 RPIFx LL_EXTI_ReadRisingFlag_32_63
1179 * @param ExtiLine This parameter can be a combination of the following values:
1180 * @arg @ref LL_EXTI_LINE_34
1181 * @note Please check each device line mapping for EXTI Line availability
1182 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1183 */
LL_EXTI_ReadRisingFlag_32_63(uint32_t ExtiLine)1184 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_32_63(uint32_t ExtiLine)
1185 {
1186 return (READ_BIT(EXTI->RPR2, ExtiLine));
1187 }
1188 #endif /* LL_EXTI_LINE_34 */
1189
1190 /**
1191 * @brief Clear ExtLine Rising Flags for Lines in range 0 to 31
1192 * @note This bit is set when the Rising edge event arrives on the interrupt
1193 * line. This bit is cleared by writing a 1 to the bit.
1194 * @rmtoll RPR1 RPIFx LL_EXTI_ClearRisingFlag_0_31
1195 * @param ExtiLine This parameter can be a combination of the following values:
1196 * @arg @ref LL_EXTI_LINE_0
1197 * @arg @ref LL_EXTI_LINE_1
1198 * @arg @ref LL_EXTI_LINE_2
1199 * @arg @ref LL_EXTI_LINE_3
1200 * @arg @ref LL_EXTI_LINE_4
1201 * @arg @ref LL_EXTI_LINE_5
1202 * @arg @ref LL_EXTI_LINE_6
1203 * @arg @ref LL_EXTI_LINE_7
1204 * @arg @ref LL_EXTI_LINE_8
1205 * @arg @ref LL_EXTI_LINE_9
1206 * @arg @ref LL_EXTI_LINE_10
1207 * @arg @ref LL_EXTI_LINE_11
1208 * @arg @ref LL_EXTI_LINE_12
1209 * @arg @ref LL_EXTI_LINE_13
1210 * @arg @ref LL_EXTI_LINE_14
1211 * @arg @ref LL_EXTI_LINE_15
1212 * @note Please check each device line mapping for EXTI Line availability
1213 * @retval None
1214 */
LL_EXTI_ClearRisingFlag_0_31(uint32_t ExtiLine)1215 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_0_31(uint32_t ExtiLine)
1216 {
1217 WRITE_REG(EXTI->RPR1, ExtiLine);
1218 }
1219
1220 #if defined(LL_EXTI_LINE_34)
1221 /**
1222 * @brief Clear ExtLine Rising Flags for Lines in range 32 to 63
1223 * @note This bit is set when the Rising edge event arrives on the interrupt
1224 * line. This bit is cleared by writing a 1 to the bit.
1225 * @rmtoll RPR2 RPIFx LL_EXTI_ClearRisingFlag_32_63
1226 * @param ExtiLine This parameter can be a combination of the following values:
1227 * @arg @ref LL_EXTI_LINE_34
1228 * @note Please check each device line mapping for EXTI Line availability
1229 * @retval None
1230 */
LL_EXTI_ClearRisingFlag_32_63(uint32_t ExtiLine)1231 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_32_63(uint32_t ExtiLine)
1232 {
1233 WRITE_REG(EXTI->RPR2, ExtiLine);
1234 }
1235 #endif /* LL_EXTI_LINE_34 */
1236 /**
1237 * @}
1238 */
1239 /** @defgroup EXTI_LL_EF_Config EF configuration functions
1240 * @{
1241 */
1242
1243 /**
1244 * @brief Configure source input for the EXTI external interrupt.
1245 * @rmtoll EXTI_EXTICR1 EXTI0 LL_EXTI_SetEXTISource\n
1246 * EXTI_EXTICR1 EXTI1 LL_EXTI_SetEXTISource\n
1247 * EXTI_EXTICR1 EXTI2 LL_EXTI_SetEXTISource\n
1248 * EXTI_EXTICR1 EXTI3 LL_EXTI_SetEXTISource\n
1249 * EXTI_EXTICR2 EXTI4 LL_EXTI_SetEXTISource\n
1250 * EXTI_EXTICR2 EXTI5 LL_EXTI_SetEXTISource\n
1251 * EXTI_EXTICR2 EXTI6 LL_EXTI_SetEXTISource\n
1252 * EXTI_EXTICR2 EXTI7 LL_EXTI_SetEXTISource\n
1253 * EXTI_EXTICR3 EXTI8 LL_EXTI_SetEXTISource\n
1254 * EXTI_EXTICR3 EXTI9 LL_EXTI_SetEXTISource\n
1255 * EXTI_EXTICR3 EXTI10 LL_EXTI_SetEXTISource\n
1256 * EXTI_EXTICR3 EXTI11 LL_EXTI_SetEXTISource\n
1257 * EXTI_EXTICR4 EXTI12 LL_EXTI_SetEXTISource\n
1258 * EXTI_EXTICR4 EXTI13 LL_EXTI_SetEXTISource\n
1259 * EXTI_EXTICR4 EXTI14 LL_EXTI_SetEXTISource\n
1260 * EXTI_EXTICR4 EXTI15 LL_EXTI_SetEXTISource
1261 * @param Port This parameter can be one of the following values:
1262 * @arg @ref EXTI_LL_EC_CONFIG_PORT
1263 *
1264 * @param Line This parameter can be one of the following values:
1265 * @arg @ref LL_EXTI_CONFIG_LINE0
1266 * @arg @ref LL_EXTI_CONFIG_LINE1
1267 * @arg @ref LL_EXTI_CONFIG_LINE2
1268 * @arg @ref LL_EXTI_CONFIG_LINE3
1269 * @arg @ref LL_EXTI_CONFIG_LINE4
1270 * @arg @ref LL_EXTI_CONFIG_LINE5
1271 * @arg @ref LL_EXTI_CONFIG_LINE6
1272 * @arg @ref LL_EXTI_CONFIG_LINE7
1273 * @arg @ref LL_EXTI_CONFIG_LINE8
1274 * @arg @ref LL_EXTI_CONFIG_LINE9
1275 * @arg @ref LL_EXTI_CONFIG_LINE10
1276 * @arg @ref LL_EXTI_CONFIG_LINE11
1277 * @arg @ref LL_EXTI_CONFIG_LINE12
1278 * @arg @ref LL_EXTI_CONFIG_LINE13
1279 * @arg @ref LL_EXTI_CONFIG_LINE14
1280 * @arg @ref LL_EXTI_CONFIG_LINE15
1281 * @retval None
1282 */
LL_EXTI_SetEXTISource(uint32_t Port,uint32_t Line)1283 __STATIC_INLINE void LL_EXTI_SetEXTISource(uint32_t Port, uint32_t Line)
1284 {
1285 MODIFY_REG(EXTI->EXTICR[Line & 0x03u], EXTI_EXTICR1_EXTI0 << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT), Port << \
1286 (Line >> LL_EXTI_REGISTER_PINPOS_SHFT));
1287 }
1288
1289 /**
1290 * @brief Get the configured defined for specific EXTI Line
1291 * @rmtoll EXTI_EXTICR1 EXTI0 LL_EXTI_SetEXTISource\n
1292 * EXTI_EXTICR1 EXTI1 LL_EXTI_SetEXTISource\n
1293 * EXTI_EXTICR1 EXTI2 LL_EXTI_SetEXTISource\n
1294 * EXTI_EXTICR1 EXTI3 LL_EXTI_SetEXTISource\n
1295 * EXTI_EXTICR2 EXTI4 LL_EXTI_SetEXTISource\n
1296 * EXTI_EXTICR2 EXTI5 LL_EXTI_SetEXTISource\n
1297 * EXTI_EXTICR2 EXTI6 LL_EXTI_SetEXTISource\n
1298 * EXTI_EXTICR2 EXTI7 LL_EXTI_SetEXTISource\n
1299 * EXTI_EXTICR3 EXTI8 LL_EXTI_SetEXTISource\n
1300 * EXTI_EXTICR3 EXTI9 LL_EXTI_SetEXTISource\n
1301 * EXTI_EXTICR3 EXTI10 LL_EXTI_SetEXTISource\n
1302 * EXTI_EXTICR3 EXTI11 LL_EXTI_SetEXTISource\n
1303 * EXTI_EXTICR4 EXTI12 LL_EXTI_SetEXTISource\n
1304 * EXTI_EXTICR4 EXTI13 LL_EXTI_SetEXTISource\n
1305 * EXTI_EXTICR4 EXTI14 LL_EXTI_SetEXTISource\n
1306 * EXTI_EXTICR4 EXTI15 LL_EXTI_SetEXTISource
1307 * @param Line This parameter can be one of the following values:
1308 * @arg @ref LL_EXTI_CONFIG_LINE0
1309 * @arg @ref LL_EXTI_CONFIG_LINE1
1310 * @arg @ref LL_EXTI_CONFIG_LINE2
1311 * @arg @ref LL_EXTI_CONFIG_LINE3
1312 * @arg @ref LL_EXTI_CONFIG_LINE4
1313 * @arg @ref LL_EXTI_CONFIG_LINE5
1314 * @arg @ref LL_EXTI_CONFIG_LINE6
1315 * @arg @ref LL_EXTI_CONFIG_LINE7
1316 * @arg @ref LL_EXTI_CONFIG_LINE8
1317 * @arg @ref LL_EXTI_CONFIG_LINE9
1318 * @arg @ref LL_EXTI_CONFIG_LINE10
1319 * @arg @ref LL_EXTI_CONFIG_LINE11
1320 * @arg @ref LL_EXTI_CONFIG_LINE12
1321 * @arg @ref LL_EXTI_CONFIG_LINE13
1322 * @arg @ref LL_EXTI_CONFIG_LINE14
1323 * @arg @ref LL_EXTI_CONFIG_LINE15
1324 * @retval Returned value can be one of the following values:
1325 * @arg @ref EXTI_LL_EC_CONFIG_PORT
1326 *
1327 */
LL_EXTI_GetEXTISource(uint32_t Line)1328 __STATIC_INLINE uint32_t LL_EXTI_GetEXTISource(uint32_t Line)
1329 {
1330 return (READ_BIT(EXTI->EXTICR[Line & 0x03u], (EXTI_EXTICR1_EXTI0 << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT))) >> \
1331 (Line >> LL_EXTI_REGISTER_PINPOS_SHFT));
1332 }
1333 /**
1334 * @}
1335 */
1336
1337 #if defined(USE_FULL_LL_DRIVER)
1338 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1339 * @{
1340 */
1341
1342 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1343 ErrorStatus LL_EXTI_DeInit(void);
1344 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1345
1346
1347 /**
1348 * @}
1349 */
1350 #endif /* USE_FULL_LL_DRIVER */
1351
1352 /**
1353 * @}
1354 */
1355
1356 /**
1357 * @}
1358 */
1359
1360 #endif /* EXTI */
1361
1362 /**
1363 * @}
1364 */
1365
1366 #ifdef __cplusplus
1367 }
1368 #endif
1369
1370 #endif /* STM32C0xx_LL_EXTI_H */
1371
