1 /** 2 ****************************************************************************** 3 * @file stm32c0xx_hal_pwr_ex.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32C0xx_HAL_PWR_EX_H 21 #define STM32C0xx_HAL_PWR_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32c0xx_hal_def.h" 29 30 /** @addtogroup STM32C0xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @defgroup PWREx PWREx 35 * @brief PWR Extended HAL module driver 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup PWREx_Exported_Types PWR Extended Exported Types 41 * @{ 42 */ 43 44 #if defined(PWR_PVM_SUPPORT) 45 /** 46 * @brief PWR PVM configuration structure definition 47 */ 48 typedef struct 49 { 50 uint32_t PVMType; /*!< PVMType: Specifies which voltage is monitored and against which threshold. 51 This parameter can be a value of @ref PWREx_PVM_Type. 52 @arg @ref PWR_PVM_USB Peripheral Voltage Monitoring USB enable */ 53 54 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 55 This parameter can be a value of @ref PWREx_PVM_Mode. */ 56 } PWR_PVMTypeDef; 57 #endif /* PWR_PVM_SUPPORT */ 58 /** 59 * @} 60 */ 61 /* Exported constants --------------------------------------------------------*/ 62 #if defined(PWR_PVM_SUPPORT) 63 /** @defgroup PWREx_PVM_Type Peripheral Voltage Monitoring type 64 * @{ 65 */ 66 #define PWR_PVM_USB PWR_CR2_PVM_VDDIO2_0 /*!< Peripheral Voltage Monitoring enable for USB peripheral: Enable to keep 67 the USB peripheral voltage monitoring under control (power domain Vddio2) */ 68 /** 69 * @} 70 */ 71 /** @defgroup PWREx_PVM_Mode PWR PVM interrupt and event mode 72 * @{ 73 */ 74 #define PWR_PVM_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ 75 #define PWR_PVM_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ 76 #define PWR_PVM_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ 77 #define PWR_PVM_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 78 #define PWR_PVM_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ 79 #define PWR_PVM_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ 80 #define PWR_PVM_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ 81 /** 82 * @} 83 */ 84 /** @defgroup PWR_PVM_EXTI_LINE PWR PVM external interrupt line 85 * @{ 86 */ 87 #define PWR_EXTI_LINE_PVM (EXTI_IMR2_IM34) /*!< External interrupt line 34 connected to PVM */ 88 /** 89 * @} 90 */ 91 92 /** @defgroup PWR_PVM_EVENT_LINE PWR PVM event line 93 * @{ 94 */ 95 #define PWR_EVENT_LINE_PVM (EXTI_EMR2_EM34) /*!< Event line 34 connected to PVM */ 96 /** 97 * @} 98 */ 99 #endif /* PWR_PVM_SUPPORT */ 100 101 /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants 102 * @{ 103 */ 104 105 /** @defgroup PWREx_GPIO_Pin_Mask PWR Extended GPIO Pin Mask 106 * @{ 107 */ 108 #define PWR_GPIO_BIT_0 (0x0001U) /*!< GPIO port I/O pin 0 */ 109 #define PWR_GPIO_BIT_1 (0x0002U) /*!< GPIO port I/O pin 1 */ 110 #define PWR_GPIO_BIT_2 (0x0004U) /*!< GPIO port I/O pin 2 */ 111 #define PWR_GPIO_BIT_3 (0x0008U) /*!< GPIO port I/O pin 3 */ 112 #define PWR_GPIO_BIT_4 (0x0010U) /*!< GPIO port I/O pin 4 */ 113 #define PWR_GPIO_BIT_5 (0x0020U) /*!< GPIO port I/O pin 5 */ 114 #define PWR_GPIO_BIT_6 (0x0040U) /*!< GPIO port I/O pin 6 */ 115 #define PWR_GPIO_BIT_7 (0x0080U) /*!< GPIO port I/O pin 7 */ 116 #define PWR_GPIO_BIT_8 (0x0100U) /*!< GPIO port I/O pin 8 */ 117 #define PWR_GPIO_BIT_9 (0x0200U) /*!< GPIO port I/O pin 9 */ 118 #define PWR_GPIO_BIT_10 (0x0400U) /*!< GPIO port I/O pin 10 */ 119 #define PWR_GPIO_BIT_11 (0x0800U) /*!< GPIO port I/O pin 11 */ 120 #define PWR_GPIO_BIT_12 (0x1000U) /*!< GPIO port I/O pin 12 */ 121 #define PWR_GPIO_BIT_13 (0x2000U) /*!< GPIO port I/O pin 13 */ 122 #define PWR_GPIO_BIT_14 (0x4000U) /*!< GPIO port I/O pin 14 */ 123 #define PWR_GPIO_BIT_15 (0x8000U) /*!< GPIO port I/O pin 15 */ 124 /** 125 * @} 126 */ 127 128 /** @defgroup PWREx_Backup_Registers PWREx Backup Registers Definition 129 * @{ 130 */ 131 #define PWR_BKP_NUMBER 4U 132 #define PWR_BKP_DR0 0x00U 133 #define PWR_BKP_DR1 0x01U 134 #define PWR_BKP_DR2 0x02U 135 #define PWR_BKP_DR3 0x03U 136 /** 137 * @} 138 */ 139 140 /** @defgroup PWREx_GPIO_Port GPIO Port 141 * @{ 142 */ 143 #define PWR_GPIO_A (0x00000000u) /*!< GPIO port A */ 144 #define PWR_GPIO_B (0x00000001u) /*!< GPIO port B */ 145 #define PWR_GPIO_C (0x00000002u) /*!< GPIO port C */ 146 #if defined(GPIOD) 147 #define PWR_GPIO_D (0x00000003u) /*!< GPIO port D */ 148 #endif /* GPIOD */ 149 #define PWR_GPIO_F (0x00000005u) /*!< GPIO port F */ 150 /** 151 * @} 152 */ 153 154 /** @defgroup PWREx_Flash_PowerDown Flash Power Down modes 155 * @{ 156 */ 157 #define PWR_FLASHPD_SLEEP PWR_CR1_FPD_SLP /*!< Enable Flash power down in sleep mode */ 158 #define PWR_FLASHPD_STOP PWR_CR1_FPD_STOP /*!< Enable Flash power down in stop mode */ 159 /** 160 * @} 161 */ 162 163 /** @addtogroup PWR_Flag PWR Status Flags 164 * @brief Elements values convention: 0000 00XX 000Y YYYYb 165 * - Y YYYY : Flag position in the XX register (5 bits) 166 * - XX : Status register (2 bits) 167 * - 01: SR1 register 168 * - 10: SR2 register 169 * The only exception is PWR_FLAG_WU, encompassing all 170 * wake-up flags and set to PWR_SR1_WUF. 171 * @{ 172 */ 173 #if defined(PWR_PVM_SUPPORT) 174 #define PWR_FLAG_PVMOUSB (0x00020000u | PWR_SR2_PVMO_USB) /*!< USB Peripheral Voltage Monitoring output */ 175 #endif /* PWR_PVM_SUPPORT */ 176 /** 177 * @} 178 */ 179 180 /** 181 * @} 182 */ 183 184 /* Exported macros -----------------------------------------------------------*/ 185 /** @addtogroup PWREx_Exported_Macros PWR Extended Exported Macros 186 * @{ 187 */ 188 #if defined(PWR_PVM_SUPPORT) 189 /** 190 * @brief Enable the PVM Extended Interrupt Line. 191 * @retval None 192 */ 193 #define __HAL_PWR_PVM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM) 194 195 /** 196 * @brief Disable the PVM Extended Interrupt Line. 197 * @retval None 198 */ 199 #define __HAL_PWR_PVM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM) 200 201 /** 202 * @brief Enable the PVM Event Line. 203 * @retval None 204 */ 205 #define __HAL_PWR_PVM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM) 206 207 /** 208 * @brief Disable the PVM Event Line. 209 * @retval None 210 */ 211 #define __HAL_PWR_PVM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM) 212 213 /** 214 * @brief Enable the PVM Extended Interrupt Rising Trigger. 215 * @retval None 216 */ 217 #define __HAL_PWR_PVM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM) 218 219 /** 220 * @brief Disable the PVM Extended Interrupt Rising Trigger. 221 * @retval None 222 */ 223 #define __HAL_PWR_PVM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM) 224 225 /** 226 * @brief Enable the PVM Extended Interrupt Falling Trigger. 227 * @retval None 228 */ 229 #define __HAL_PWR_PVM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM) 230 231 /** 232 * @brief Disable the PVM Extended Interrupt Falling Trigger. 233 * @retval None 234 */ 235 #define __HAL_PWR_PVM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM) 236 237 /** 238 * @brief Enable the PVM Extended Interrupt Rising & Falling Trigger. 239 * @retval None 240 */ 241 #define __HAL_PWR_PVM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 242 do { \ 243 __HAL_PWR_PVM_EXTI_ENABLE_RISING_EDGE(); \ 244 __HAL_PWR_PVM_EXTI_ENABLE_FALLING_EDGE(); \ 245 } while(0U) 246 247 /** 248 * @brief Disable the PVM Extended Interrupt Rising & Falling Trigger. 249 * @retval None 250 */ 251 #define __HAL_PWR_PVM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 252 do { \ 253 __HAL_PWR_PVM_EXTI_DISABLE_RISING_EDGE(); \ 254 __HAL_PWR_PVM_EXTI_DISABLE_FALLING_EDGE(); \ 255 } while(0U) 256 257 /** 258 * @brief Generate a Software interrupt on selected EXTI line. 259 * @retval None 260 */ 261 #define __HAL_PWR_PVM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM) 262 263 /** 264 * @brief Check whether or not the PVM EXTI interrupt Rising flag is set. 265 * @retval EXTI PVM Line Status. 266 */ 267 #define __HAL_PWR_PVM_EXTI_GET_RISING_FLAG() (EXTI->RPR2 & PWR_EXTI_LINE_PVM) 268 269 /** 270 * @brief Check whether or not the PVM EXTI interrupt Falling flag is set. 271 * @retval EXTI PVM Line Status. 272 */ 273 #define __HAL_PWR_PVM_EXTI_GET_FALLING_FLAG() (EXTI->FPR2 & PWR_EXTI_LINE_PVM) 274 275 /** 276 * @brief Clear the PVM EXTI interrupt Rising flag. 277 * @retval None 278 */ 279 #define __HAL_PWR_PVM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR2, PWR_EXTI_LINE_PVM) 280 281 /** 282 * @brief Clear the PVM EXTI interrupt Falling flag. 283 * @retval None 284 */ 285 #define __HAL_PWR_PVM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR2, PWR_EXTI_LINE_PVM) 286 #endif /* PWR_PVM_SUPPORT */ 287 /** 288 * @} 289 */ 290 291 /* Private define ------------------------------------------------------------*/ 292 /** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines 293 * @{ 294 */ 295 296 /** @defgroup PWREx_PVM_Mode_Mask PWR PVM Mode Mask 297 * @{ 298 */ 299 #define PVM_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVM threshold crossing */ 300 #define PVM_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVM threshold crossing */ 301 #define PVM_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVM trigger */ 302 #define PVM_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVM trigger */ 303 /** 304 * @} 305 */ 306 307 /** 308 * @} 309 */ 310 /* Private macros ------------------------------------------------------------*/ 311 /** @addtogroup PWREx_Private_Macros PWR Extended Private Macros 312 * @{ 313 */ 314 315 #define IS_PWR_GPIO_BIT_NUMBER(__BIT_NUMBER__) ((((__BIT_NUMBER__) & 0x0000FFFFu) != 0x00u) && \ 316 (((__BIT_NUMBER__) & 0xFFFF0000u) == 0x00u)) 317 #if defined(GPIOD) 318 #define IS_PWR_GPIO(__GPIO__) (((__GPIO__) == PWR_GPIO_A) || \ 319 ((__GPIO__) == PWR_GPIO_B) || \ 320 ((__GPIO__) == PWR_GPIO_C) || \ 321 ((__GPIO__) == PWR_GPIO_D) || \ 322 ((__GPIO__) == PWR_GPIO_F)) 323 #else 324 #define IS_PWR_GPIO(__GPIO__) (((__GPIO__) == PWR_GPIO_A) || \ 325 ((__GPIO__) == PWR_GPIO_B) || \ 326 ((__GPIO__) == PWR_GPIO_C) || \ 327 ((__GPIO__) == PWR_GPIO_F)) 328 329 #endif /* GPIOD */ 330 #define IS_PWR_FLASH_POWERDOWN(__MODE__) ((((__MODE__) & (PWR_FLASHPD_SLEEP | PWR_FLASHPD_STOP)) != 0x00u) && \ 331 (((__MODE__) & ~(PWR_FLASHPD_SLEEP | PWR_FLASHPD_STOP)) == 0x00u)) 332 333 #define IS_PWR_BKP(__BKP__) ((__BKP__) < PWR_BKP_NUMBER) 334 335 #if defined(PWR_PVM_SUPPORT) 336 #define IS_PWR_PVM_TYPE(TYPE) ((TYPE) == PWR_PVM_USB) 337 338 #define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\ 339 ((MODE) == PWR_PVM_MODE_IT_RISING) ||\ 340 ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\ 341 ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\ 342 ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\ 343 ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\ 344 ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING)) 345 #endif /* PWR_PVM_SUPPORT */ 346 347 /** 348 * @} 349 */ 350 351 /* Exported functions --------------------------------------------------------*/ 352 /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions 353 * @{ 354 */ 355 356 /** @defgroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions 357 * @{ 358 */ 359 360 /* Peripheral Control functions **********************************************/ 361 void HAL_PWREx_EnableInternalWakeUpLine(void); 362 void HAL_PWREx_DisableInternalWakeUpLine(void); 363 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); 364 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); 365 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); 366 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); 367 void HAL_PWREx_EnablePullUpPullDownConfig(void); 368 void HAL_PWREx_DisablePullUpPullDownConfig(void); 369 void HAL_PWREx_EnableFlashPowerDown(uint32_t PowerMode); 370 void HAL_PWREx_DisableFlashPowerDown(uint32_t PowerMode); 371 void HAL_PWREx_BKUPWrite(uint32_t BackupRegister, uint16_t Data); 372 uint32_t HAL_PWREx_BKUPRead(uint32_t BackupRegister); 373 374 /* Low Power modes configuration functions ************************************/ 375 void HAL_PWREx_EnterSHUTDOWNMode(void); 376 377 #if defined(PWR_PVM_SUPPORT) 378 /* Power voltage monitoring configuration functions ***************************/ 379 void HAL_PWREx_EnablePVMUSB(void); 380 void HAL_PWREx_DisablePVMUSB(void); 381 HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM); 382 #endif /* PWR_PVM_SUPPORT */ 383 384 385 /** 386 * @} 387 */ 388 389 /** 390 * @} 391 */ 392 393 /** 394 * @} 395 */ 396 397 /** 398 * @} 399 */ 400 401 #ifdef __cplusplus 402 } 403 #endif 404 405 406 #endif /* STM32C0xx_HAL_PWR_EX_H */ 407
