1/* ------------------------------------------------------------------------- */ 2/* @file: startup_MK02F12810.s */ 3/* @purpose: CMSIS Cortex-M4 Core Device Startup File */ 4/* MK02F12810 */ 5/* @version: 0.5 */ 6/* @date: 2015-2-19 */ 7/* @build: b231019 */ 8/* ------------------------------------------------------------------------- */ 9/* */ 10/* Copyright 1997-2016 Freescale Semiconductor, Inc. */ 11/* Copyright 2016-2023 NXP */ 12/* SPDX-License-Identifier: BSD-3-Clause */ 13/*****************************************************************************/ 14/* Version: GCC for ARM Embedded Processors */ 15/*****************************************************************************/ 16 .syntax unified 17 .arch armv7-m 18 19 .section .isr_vector, "a" 20 .align 2 21 .globl __isr_vector 22__isr_vector: 23 .long __StackTop /* Top of Stack */ 24 .long Reset_Handler /* Reset Handler */ 25 .long NMI_Handler /* NMI Handler*/ 26 .long HardFault_Handler /* Hard Fault Handler*/ 27 .long MemManage_Handler /* MPU Fault Handler*/ 28 .long BusFault_Handler /* Bus Fault Handler*/ 29 .long UsageFault_Handler /* Usage Fault Handler*/ 30 .long 0 /* Reserved*/ 31 .long 0 /* Reserved*/ 32 .long 0 /* Reserved*/ 33 .long 0 /* Reserved*/ 34 .long SVC_Handler /* SVCall Handler*/ 35 .long DebugMon_Handler /* Debug Monitor Handler*/ 36 .long 0 /* Reserved*/ 37 .long PendSV_Handler /* PendSV Handler*/ 38 .long SysTick_Handler /* SysTick Handler*/ 39 40 /* External Interrupts*/ 41 .long DMA0_IRQHandler /* DMA Channel 0 Transfer Complete*/ 42 .long DMA1_IRQHandler /* DMA Channel 1 Transfer Complete*/ 43 .long DMA2_IRQHandler /* DMA Channel 2 Transfer Complete*/ 44 .long DMA3_IRQHandler /* DMA Channel 3 Transfer Complete*/ 45 .long Reserved20_IRQHandler /* Reserved interrupt 20*/ 46 .long Reserved21_IRQHandler /* Reserved interrupt 21*/ 47 .long Reserved22_IRQHandler /* Reserved interrupt 22*/ 48 .long Reserved23_IRQHandler /* Reserved interrupt 23*/ 49 .long Reserved24_IRQHandler /* Reserved interrupt 24*/ 50 .long Reserved25_IRQHandler /* Reserved interrupt 25*/ 51 .long Reserved26_IRQHandler /* Reserved interrupt 26*/ 52 .long Reserved27_IRQHandler /* Reserved interrupt 27*/ 53 .long Reserved28_IRQHandler /* Reserved interrupt 28*/ 54 .long Reserved29_IRQHandler /* Reserved interrupt 29*/ 55 .long Reserved30_IRQHandler /* Reserved interrupt 30*/ 56 .long Reserved31_IRQHandler /* Reserved interrupt 31*/ 57 .long DMA_Error_IRQHandler /* DMA Error Interrupt*/ 58 .long MCM_IRQHandler /* Normal Interrupt*/ 59 .long FTF_IRQHandler /* FTFA Command complete interrupt*/ 60 .long Read_Collision_IRQHandler /* Read Collision Interrupt*/ 61 .long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning*/ 62 .long LLWU_IRQHandler /* Low Leakage Wakeup Unit*/ 63 .long WDOG_EWM_IRQHandler /* WDOG Interrupt*/ 64 .long Reserved39_IRQHandler /* Reserved Interrupt 39*/ 65 .long I2C0_IRQHandler /* I2C0 interrupt*/ 66 .long Reserved41_IRQHandler /* Reserved Interrupt 41*/ 67 .long SPI0_IRQHandler /* SPI0 Interrupt*/ 68 .long Reserved43_IRQHandler /* Reserved Interrupt 43*/ 69 .long Reserved44_IRQHandler /* Reserved Interrupt 44*/ 70 .long Reserved45_IRQHandler /* Reserved interrupt 45*/ 71 .long Reserved46_IRQHandler /* Reserved interrupt 46*/ 72 .long UART0_RX_TX_IRQHandler /* UART0 Receive/Transmit interrupt*/ 73 .long UART0_ERR_IRQHandler /* UART0 Error interrupt*/ 74 .long UART1_RX_TX_IRQHandler /* UART1 Receive/Transmit interrupt*/ 75 .long UART1_ERR_IRQHandler /* UART1 Error interrupt*/ 76 .long Reserved51_IRQHandler /* Reserved interrupt 51*/ 77 .long Reserved52_IRQHandler /* Reserved interrupt 52*/ 78 .long Reserved53_IRQHandler /* Reserved interrupt 53*/ 79 .long Reserved54_IRQHandler /* Reserved interrupt 54*/ 80 .long ADC0_IRQHandler /* ADC0 interrupt*/ 81 .long CMP0_IRQHandler /* CMP0 interrupt*/ 82 .long CMP1_IRQHandler /* CMP1 interrupt*/ 83 .long FTM0_IRQHandler /* FTM0 fault, overflow and channels interrupt*/ 84 .long FTM1_IRQHandler /* FTM1 fault, overflow and channels interrupt*/ 85 .long FTM2_IRQHandler /* FTM2 fault, overflow and channels interrupt*/ 86 .long Reserved61_IRQHandler /* Reserved interrupt 61*/ 87 .long Reserved62_IRQHandler /* Reserved interrupt 62*/ 88 .long Reserved63_IRQHandler /* Reserved interrupt 63*/ 89 .long PIT0_IRQHandler /* PIT timer channel 0 interrupt*/ 90 .long PIT1_IRQHandler /* PIT timer channel 1 interrupt*/ 91 .long PIT2_IRQHandler /* PIT timer channel 2 interrupt*/ 92 .long PIT3_IRQHandler /* PIT timer channel 3 interrupt*/ 93 .long PDB0_IRQHandler /* PDB0 Interrupt*/ 94 .long Reserved69_IRQHandler /* Reserved interrupt 69*/ 95 .long Reserved70_IRQHandler /* Reserved interrupt 70*/ 96 .long Reserved71_IRQHandler /* Reserved interrupt 71*/ 97 .long DAC0_IRQHandler /* DAC0 interrupt*/ 98 .long MCG_IRQHandler /* MCG Interrupt*/ 99 .long LPTMR0_IRQHandler /* LPTimer interrupt*/ 100 .long PORTA_IRQHandler /* Port A interrupt*/ 101 .long PORTB_IRQHandler /* Port B interrupt*/ 102 .long PORTC_IRQHandler /* Port C interrupt*/ 103 .long PORTD_IRQHandler /* Port D interrupt*/ 104 .long PORTE_IRQHandler /* Port E interrupt*/ 105 .long SWI_IRQHandler /* Software interrupt*/ 106 .long Reserved81_IRQHandler /* Reserved interrupt 81*/ 107 .long Reserved82_IRQHandler /* Reserved interrupt 82*/ 108 .long Reserved83_IRQHandler /* Reserved interrupt 83*/ 109 .long Reserved84_IRQHandler /* Reserved interrupt 84*/ 110 .long Reserved85_IRQHandler /* Reserved interrupt 85*/ 111 .long Reserved86_IRQHandler /* Reserved interrupt 86*/ 112 .long Reserved87_IRQHandler /* Reserved interrupt 87*/ 113 .long Reserved88_IRQHandler /* Reserved interrupt 88*/ 114 .long Reserved89_IRQHandler /* Reserved interrupt 89*/ 115 .long DefaultISR /* 90*/ 116 .long DefaultISR /* 91*/ 117 .long DefaultISR /* 92*/ 118 .long DefaultISR /* 93*/ 119 .long DefaultISR /* 94*/ 120 .long DefaultISR /* 95*/ 121 .long DefaultISR /* 96*/ 122 .long DefaultISR /* 97*/ 123 .long DefaultISR /* 98*/ 124 .long DefaultISR /* 99*/ 125 .long DefaultISR /* 100*/ 126 .long DefaultISR /* 101*/ 127 .long DefaultISR /* 102*/ 128 .long DefaultISR /* 103*/ 129 .long DefaultISR /* 104*/ 130 .long DefaultISR /* 105*/ 131 .long DefaultISR /* 106*/ 132 .long DefaultISR /* 107*/ 133 .long DefaultISR /* 108*/ 134 .long DefaultISR /* 109*/ 135 .long DefaultISR /* 110*/ 136 .long DefaultISR /* 111*/ 137 .long DefaultISR /* 112*/ 138 .long DefaultISR /* 113*/ 139 .long DefaultISR /* 114*/ 140 .long DefaultISR /* 115*/ 141 .long DefaultISR /* 116*/ 142 .long DefaultISR /* 117*/ 143 .long DefaultISR /* 118*/ 144 .long DefaultISR /* 119*/ 145 .long DefaultISR /* 120*/ 146 .long DefaultISR /* 121*/ 147 .long DefaultISR /* 122*/ 148 .long DefaultISR /* 123*/ 149 .long DefaultISR /* 124*/ 150 .long DefaultISR /* 125*/ 151 .long DefaultISR /* 126*/ 152 .long DefaultISR /* 127*/ 153 .long DefaultISR /* 128*/ 154 .long DefaultISR /* 129*/ 155 .long DefaultISR /* 130*/ 156 .long DefaultISR /* 131*/ 157 .long DefaultISR /* 132*/ 158 .long DefaultISR /* 133*/ 159 .long DefaultISR /* 134*/ 160 .long DefaultISR /* 135*/ 161 .long DefaultISR /* 136*/ 162 .long DefaultISR /* 137*/ 163 .long DefaultISR /* 138*/ 164 .long DefaultISR /* 139*/ 165 .long DefaultISR /* 140*/ 166 .long DefaultISR /* 141*/ 167 .long DefaultISR /* 142*/ 168 .long DefaultISR /* 143*/ 169 .long DefaultISR /* 144*/ 170 .long DefaultISR /* 145*/ 171 .long DefaultISR /* 146*/ 172 .long DefaultISR /* 147*/ 173 .long DefaultISR /* 148*/ 174 .long DefaultISR /* 149*/ 175 .long DefaultISR /* 150*/ 176 .long DefaultISR /* 151*/ 177 .long DefaultISR /* 152*/ 178 .long DefaultISR /* 153*/ 179 .long DefaultISR /* 154*/ 180 .long DefaultISR /* 155*/ 181 .long DefaultISR /* 156*/ 182 .long DefaultISR /* 157*/ 183 .long DefaultISR /* 158*/ 184 .long DefaultISR /* 159*/ 185 .long DefaultISR /* 160*/ 186 .long DefaultISR /* 161*/ 187 .long DefaultISR /* 162*/ 188 .long DefaultISR /* 163*/ 189 .long DefaultISR /* 164*/ 190 .long DefaultISR /* 165*/ 191 .long DefaultISR /* 166*/ 192 .long DefaultISR /* 167*/ 193 .long DefaultISR /* 168*/ 194 .long DefaultISR /* 169*/ 195 .long DefaultISR /* 170*/ 196 .long DefaultISR /* 171*/ 197 .long DefaultISR /* 172*/ 198 .long DefaultISR /* 173*/ 199 .long DefaultISR /* 174*/ 200 .long DefaultISR /* 175*/ 201 .long DefaultISR /* 176*/ 202 .long DefaultISR /* 177*/ 203 .long DefaultISR /* 178*/ 204 .long DefaultISR /* 179*/ 205 .long DefaultISR /* 180*/ 206 .long DefaultISR /* 181*/ 207 .long DefaultISR /* 182*/ 208 .long DefaultISR /* 183*/ 209 .long DefaultISR /* 184*/ 210 .long DefaultISR /* 185*/ 211 .long DefaultISR /* 186*/ 212 .long DefaultISR /* 187*/ 213 .long DefaultISR /* 188*/ 214 .long DefaultISR /* 189*/ 215 .long DefaultISR /* 190*/ 216 .long DefaultISR /* 191*/ 217 .long DefaultISR /* 192*/ 218 .long DefaultISR /* 193*/ 219 .long DefaultISR /* 194*/ 220 .long DefaultISR /* 195*/ 221 .long DefaultISR /* 196*/ 222 .long DefaultISR /* 197*/ 223 .long DefaultISR /* 198*/ 224 .long DefaultISR /* 199*/ 225 .long DefaultISR /* 200*/ 226 .long DefaultISR /* 201*/ 227 .long DefaultISR /* 202*/ 228 .long DefaultISR /* 203*/ 229 .long DefaultISR /* 204*/ 230 .long DefaultISR /* 205*/ 231 .long DefaultISR /* 206*/ 232 .long DefaultISR /* 207*/ 233 .long DefaultISR /* 208*/ 234 .long DefaultISR /* 209*/ 235 .long DefaultISR /* 210*/ 236 .long DefaultISR /* 211*/ 237 .long DefaultISR /* 212*/ 238 .long DefaultISR /* 213*/ 239 .long DefaultISR /* 214*/ 240 .long DefaultISR /* 215*/ 241 .long DefaultISR /* 216*/ 242 .long DefaultISR /* 217*/ 243 .long DefaultISR /* 218*/ 244 .long DefaultISR /* 219*/ 245 .long DefaultISR /* 220*/ 246 .long DefaultISR /* 221*/ 247 .long DefaultISR /* 222*/ 248 .long DefaultISR /* 223*/ 249 .long DefaultISR /* 224*/ 250 .long DefaultISR /* 225*/ 251 .long DefaultISR /* 226*/ 252 .long DefaultISR /* 227*/ 253 .long DefaultISR /* 228*/ 254 .long DefaultISR /* 229*/ 255 .long DefaultISR /* 230*/ 256 .long DefaultISR /* 231*/ 257 .long DefaultISR /* 232*/ 258 .long DefaultISR /* 233*/ 259 .long DefaultISR /* 234*/ 260 .long DefaultISR /* 235*/ 261 .long DefaultISR /* 236*/ 262 .long DefaultISR /* 237*/ 263 .long DefaultISR /* 238*/ 264 .long DefaultISR /* 239*/ 265 .long DefaultISR /* 240*/ 266 .long DefaultISR /* 241*/ 267 .long DefaultISR /* 242*/ 268 .long DefaultISR /* 243*/ 269 .long DefaultISR /* 244*/ 270 .long DefaultISR /* 245*/ 271 .long DefaultISR /* 246*/ 272 .long DefaultISR /* 247*/ 273 .long DefaultISR /* 248*/ 274 .long DefaultISR /* 249*/ 275 .long DefaultISR /* 250*/ 276 .long DefaultISR /* 251*/ 277 .long DefaultISR /* 252*/ 278 .long DefaultISR /* 253*/ 279 .long DefaultISR /* 254*/ 280 .long 0xFFFFFFFF /* Reserved for user TRIM value*/ 281 282 .size __isr_vector, . - __isr_vector 283 284/* Flash Configuration */ 285 .section .FlashConfig, "a" 286 .long 0xFFFFFFFF 287 .long 0xFFFFFFFF 288 .long 0xFFFFFFFF 289 .long 0xFFFFFFFE 290 291 .text 292 .thumb 293 294#if defined (__cplusplus) 295#ifdef __REDLIB__ 296#error Redlib does not support C++ 297#endif 298#endif 299/* Reset Handler */ 300 301 .thumb_func 302 .align 2 303 .globl Reset_Handler 304 .weak Reset_Handler 305 .type Reset_Handler, %function 306Reset_Handler: 307 cpsid i /* Mask interrupts */ 308 .equ VTOR, 0xE000ED08 309 ldr r0, =VTOR 310 ldr r1, =__isr_vector 311 str r1, [r0] 312 ldr r2, [r1] 313 msr msp, r2 314#ifndef __NO_SYSTEM_INIT 315 ldr r0,=SystemInit 316 blx r0 317#endif 318/* Loop to copy data from read only memory to RAM. The ranges 319 * of copy from/to are specified by following symbols evaluated in 320 * linker script. 321 * __etext: End of code section, i.e., begin of data sections to copy from. 322 * __data_start__/__data_end__: RAM address range that data should be 323 * copied to. Both must be aligned to 4 bytes boundary. */ 324 325 ldr r1, =__etext 326 ldr r2, =__data_start__ 327 ldr r3, =__data_end__ 328 329#ifdef __PERFORMANCE_IMPLEMENTATION 330/* Here are two copies of loop implementations. First one favors performance 331 * and the second one favors code size. Default uses the second one. 332 * Define macro "__PERFORMANCE_IMPLEMENTATION" in project to use the first one */ 333 subs r3, r2 334 ble .LC1 335.LC0: 336 subs r3, #4 337 ldr r0, [r1, r3] 338 str r0, [r2, r3] 339 bgt .LC0 340.LC1: 341#else /* code size implemenation */ 342.LC0: 343 cmp r2, r3 344 ittt lt 345 ldrlt r0, [r1], #4 346 strlt r0, [r2], #4 347 blt .LC0 348#endif 349 350#ifdef __STARTUP_CLEAR_BSS 351/* This part of work usually is done in C library startup code. Otherwise, 352 * define this macro to enable it in this startup. 353 * 354 * Loop to zero out BSS section, which uses following symbols 355 * in linker script: 356 * __bss_start__: start of BSS section. Must align to 4 357 * __bss_end__: end of BSS section. Must align to 4 358 */ 359 ldr r1, =__bss_start__ 360 ldr r2, =__bss_end__ 361 362 movs r0, 0 363.LC2: 364 cmp r1, r2 365 itt lt 366 strlt r0, [r1], #4 367 blt .LC2 368#endif /* __STARTUP_CLEAR_BSS */ 369 370 cpsie i /* Unmask interrupts */ 371#ifndef __START 372#ifdef __REDLIB__ 373#define __START __main 374#else 375#define __START _start 376#endif 377#endif 378#ifndef __ATOLLIC__ 379 ldr r0,=__START 380 blx r0 381#else 382 ldr r0,=__libc_init_array 383 blx r0 384 ldr r0,=main 385 bx r0 386#endif 387 .pool 388 .size Reset_Handler, . - Reset_Handler 389 390 .align 1 391 .thumb_func 392 .weak DefaultISR 393 .type DefaultISR, %function 394DefaultISR: 395 b DefaultISR 396 .size DefaultISR, . - DefaultISR 397 398 .align 1 399 .thumb_func 400 .weak NMI_Handler 401 .type NMI_Handler, %function 402NMI_Handler: 403 ldr r0,=NMI_Handler 404 bx r0 405 .size NMI_Handler, . - NMI_Handler 406 407 .align 1 408 .thumb_func 409 .weak HardFault_Handler 410 .type HardFault_Handler, %function 411HardFault_Handler: 412 ldr r0,=HardFault_Handler 413 bx r0 414 .size HardFault_Handler, . - HardFault_Handler 415 416 .align 1 417 .thumb_func 418 .weak SVC_Handler 419 .type SVC_Handler, %function 420SVC_Handler: 421 ldr r0,=SVC_Handler 422 bx r0 423 .size SVC_Handler, . - SVC_Handler 424 425 .align 1 426 .thumb_func 427 .weak PendSV_Handler 428 .type PendSV_Handler, %function 429PendSV_Handler: 430 ldr r0,=PendSV_Handler 431 bx r0 432 .size PendSV_Handler, . - PendSV_Handler 433 434 .align 1 435 .thumb_func 436 .weak SysTick_Handler 437 .type SysTick_Handler, %function 438SysTick_Handler: 439 ldr r0,=SysTick_Handler 440 bx r0 441 .size SysTick_Handler, . - SysTick_Handler 442 443 .align 1 444 .thumb_func 445 .weak DMA0_IRQHandler 446 .type DMA0_IRQHandler, %function 447DMA0_IRQHandler: 448 ldr r0,=DMA0_DriverIRQHandler 449 bx r0 450 .size DMA0_IRQHandler, . - DMA0_IRQHandler 451 452 .align 1 453 .thumb_func 454 .weak DMA1_IRQHandler 455 .type DMA1_IRQHandler, %function 456DMA1_IRQHandler: 457 ldr r0,=DMA1_DriverIRQHandler 458 bx r0 459 .size DMA1_IRQHandler, . - DMA1_IRQHandler 460 461 .align 1 462 .thumb_func 463 .weak DMA2_IRQHandler 464 .type DMA2_IRQHandler, %function 465DMA2_IRQHandler: 466 ldr r0,=DMA2_DriverIRQHandler 467 bx r0 468 .size DMA2_IRQHandler, . - DMA2_IRQHandler 469 470 .align 1 471 .thumb_func 472 .weak DMA3_IRQHandler 473 .type DMA3_IRQHandler, %function 474DMA3_IRQHandler: 475 ldr r0,=DMA3_DriverIRQHandler 476 bx r0 477 .size DMA3_IRQHandler, . - DMA3_IRQHandler 478 479 .align 1 480 .thumb_func 481 .weak DMA_Error_IRQHandler 482 .type DMA_Error_IRQHandler, %function 483DMA_Error_IRQHandler: 484 ldr r0,=DMA_Error_DriverIRQHandler 485 bx r0 486 .size DMA_Error_IRQHandler, . - DMA_Error_IRQHandler 487 488 .align 1 489 .thumb_func 490 .weak I2C0_IRQHandler 491 .type I2C0_IRQHandler, %function 492I2C0_IRQHandler: 493 ldr r0,=I2C0_DriverIRQHandler 494 bx r0 495 .size I2C0_IRQHandler, . - I2C0_IRQHandler 496 497 .align 1 498 .thumb_func 499 .weak SPI0_IRQHandler 500 .type SPI0_IRQHandler, %function 501SPI0_IRQHandler: 502 ldr r0,=SPI0_DriverIRQHandler 503 bx r0 504 .size SPI0_IRQHandler, . - SPI0_IRQHandler 505 506 .align 1 507 .thumb_func 508 .weak UART0_RX_TX_IRQHandler 509 .type UART0_RX_TX_IRQHandler, %function 510UART0_RX_TX_IRQHandler: 511 ldr r0,=UART0_RX_TX_DriverIRQHandler 512 bx r0 513 .size UART0_RX_TX_IRQHandler, . - UART0_RX_TX_IRQHandler 514 515 .align 1 516 .thumb_func 517 .weak UART0_ERR_IRQHandler 518 .type UART0_ERR_IRQHandler, %function 519UART0_ERR_IRQHandler: 520 ldr r0,=UART0_ERR_DriverIRQHandler 521 bx r0 522 .size UART0_ERR_IRQHandler, . - UART0_ERR_IRQHandler 523 524 .align 1 525 .thumb_func 526 .weak UART1_RX_TX_IRQHandler 527 .type UART1_RX_TX_IRQHandler, %function 528UART1_RX_TX_IRQHandler: 529 ldr r0,=UART1_RX_TX_DriverIRQHandler 530 bx r0 531 .size UART1_RX_TX_IRQHandler, . - UART1_RX_TX_IRQHandler 532 533 .align 1 534 .thumb_func 535 .weak UART1_ERR_IRQHandler 536 .type UART1_ERR_IRQHandler, %function 537UART1_ERR_IRQHandler: 538 ldr r0,=UART1_ERR_DriverIRQHandler 539 bx r0 540 .size UART1_ERR_IRQHandler, . - UART1_ERR_IRQHandler 541 542 543/* Macro to define default handlers. Default handler 544 * will be weak symbol and just dead loops. They can be 545 * overwritten by other handlers */ 546 .macro def_irq_handler handler_name 547 .weak \handler_name 548 .set \handler_name, DefaultISR 549 .endm 550/* Exception Handlers */ 551 def_irq_handler MemManage_Handler 552 def_irq_handler BusFault_Handler 553 def_irq_handler UsageFault_Handler 554 def_irq_handler DebugMon_Handler 555 def_irq_handler DMA0_DriverIRQHandler 556 def_irq_handler DMA1_DriverIRQHandler 557 def_irq_handler DMA2_DriverIRQHandler 558 def_irq_handler DMA3_DriverIRQHandler 559 def_irq_handler Reserved20_IRQHandler 560 def_irq_handler Reserved21_IRQHandler 561 def_irq_handler Reserved22_IRQHandler 562 def_irq_handler Reserved23_IRQHandler 563 def_irq_handler Reserved24_IRQHandler 564 def_irq_handler Reserved25_IRQHandler 565 def_irq_handler Reserved26_IRQHandler 566 def_irq_handler Reserved27_IRQHandler 567 def_irq_handler Reserved28_IRQHandler 568 def_irq_handler Reserved29_IRQHandler 569 def_irq_handler Reserved30_IRQHandler 570 def_irq_handler Reserved31_IRQHandler 571 def_irq_handler DMA_Error_DriverIRQHandler 572 def_irq_handler MCM_IRQHandler 573 def_irq_handler FTF_IRQHandler 574 def_irq_handler Read_Collision_IRQHandler 575 def_irq_handler LVD_LVW_IRQHandler 576 def_irq_handler LLWU_IRQHandler 577 def_irq_handler WDOG_EWM_IRQHandler 578 def_irq_handler Reserved39_IRQHandler 579 def_irq_handler I2C0_DriverIRQHandler 580 def_irq_handler Reserved41_IRQHandler 581 def_irq_handler SPI0_DriverIRQHandler 582 def_irq_handler Reserved43_IRQHandler 583 def_irq_handler Reserved44_IRQHandler 584 def_irq_handler Reserved45_IRQHandler 585 def_irq_handler Reserved46_IRQHandler 586 def_irq_handler UART0_RX_TX_DriverIRQHandler 587 def_irq_handler UART0_ERR_DriverIRQHandler 588 def_irq_handler UART1_RX_TX_DriverIRQHandler 589 def_irq_handler UART1_ERR_DriverIRQHandler 590 def_irq_handler Reserved51_IRQHandler 591 def_irq_handler Reserved52_IRQHandler 592 def_irq_handler Reserved53_IRQHandler 593 def_irq_handler Reserved54_IRQHandler 594 def_irq_handler ADC0_IRQHandler 595 def_irq_handler CMP0_IRQHandler 596 def_irq_handler CMP1_IRQHandler 597 def_irq_handler FTM0_IRQHandler 598 def_irq_handler FTM1_IRQHandler 599 def_irq_handler FTM2_IRQHandler 600 def_irq_handler Reserved61_IRQHandler 601 def_irq_handler Reserved62_IRQHandler 602 def_irq_handler Reserved63_IRQHandler 603 def_irq_handler PIT0_IRQHandler 604 def_irq_handler PIT1_IRQHandler 605 def_irq_handler PIT2_IRQHandler 606 def_irq_handler PIT3_IRQHandler 607 def_irq_handler PDB0_IRQHandler 608 def_irq_handler Reserved69_IRQHandler 609 def_irq_handler Reserved70_IRQHandler 610 def_irq_handler Reserved71_IRQHandler 611 def_irq_handler DAC0_IRQHandler 612 def_irq_handler MCG_IRQHandler 613 def_irq_handler LPTMR0_IRQHandler 614 def_irq_handler PORTA_IRQHandler 615 def_irq_handler PORTB_IRQHandler 616 def_irq_handler PORTC_IRQHandler 617 def_irq_handler PORTD_IRQHandler 618 def_irq_handler PORTE_IRQHandler 619 def_irq_handler SWI_IRQHandler 620 def_irq_handler Reserved81_IRQHandler 621 def_irq_handler Reserved82_IRQHandler 622 def_irq_handler Reserved83_IRQHandler 623 def_irq_handler Reserved84_IRQHandler 624 def_irq_handler Reserved85_IRQHandler 625 def_irq_handler Reserved86_IRQHandler 626 def_irq_handler Reserved87_IRQHandler 627 def_irq_handler Reserved88_IRQHandler 628 def_irq_handler Reserved89_IRQHandler 629 630 .end 631
