1 /* Copyright 2015 The TensorFlow Authors. All Rights Reserved.
2
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6
7 http://www.apache.org/licenses/LICENSE-2.0
8
9 Unless required by applicable law or agreed to in writing, software
10 distributed under the License is distributed on an "AS IS" BASIS,
11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 See the License for the specific language governing permissions and
13 limitations under the License.
14 ==============================================================================*/
15
16 /* This file is called at power up time to initialize the chip. It in turn
17 calls _main() which is the entry point into the application */
18
19 #include <stdint.h>
20
21 #include "eta_chip.h"
22 #include "memio.h"
23
24 #ifndef NULL
25 #define NULL (0)
26 #endif
27
28 //*****************************************************************************
29 //
30 // Macro for hardware access, both direct and via the bit-band region.
31 //
32 //*****************************************************************************
33
34 int _main(int argc, char* argv[]);
35 void set_vtor(void);
36 void* startup_get_my_pc(void);
37
38 //*****************************************************************************
39 // Forward DECLS for interrupt service routines (ISR)
40 //*****************************************************************************
41 extern void ResetISR(void) __attribute__((weak, alias("default_ResetISR")));
42 extern void NmiSR(void) __attribute__((weak, alias("default_NmiSR")));
43 extern void FaultISR(void) __attribute__((weak, alias("default_FaultISR")));
44
45 extern void DebugMonitor_ISR(void)
46 __attribute__((weak, alias("default_DebugMonitor_ISR")));
47 extern void SVCall_ISR(void) __attribute__((weak, alias("default_SVCall_ISR")));
48 extern void PENDSV_ISR(void) __attribute__((weak, alias("default_PENDSV_ISR")));
49
50 extern void SYSTICK_ISR(void)
51 __attribute__((weak, alias("default_SYSTICK_ISR")));
52
53 extern void GPIO0_ISR(void) __attribute__((weak, alias("default_GPIO0_ISR")));
54 extern void GPIO1_ISR(void) __attribute__((weak, alias("default_GPIO1_ISR")));
55 extern void TIMER0_ISR(void) __attribute__((weak, alias("default_TIMER0_ISR")));
56 extern void TIMER1_ISR(void) __attribute__((weak, alias("default_TIMER1_ISR")));
57 extern void UART0_ISR(void) __attribute__((weak, alias("default_UART0_ISR")));
58 extern void UART1_ISR(void) __attribute__((weak, alias("default_UART1_ISR")));
59 extern void SPI0_ISR(void) __attribute__((weak, alias("default_SPI0_ISR")));
60 extern void SPI1_ISR(void) __attribute__((weak, alias("default_SPI1_ISR")));
61 extern void I2C0_ISR(void) __attribute__((weak, alias("default_I2C0_ISR")));
62 extern void I2C1_ISR(void) __attribute__((weak, alias("default_I2C1_ISR")));
63 extern void RTC0_ISR(void) __attribute__((weak, alias("default_RTC0_ISR")));
64 extern void RTC1_ISR(void) __attribute__((weak, alias("default_RTC1_ISR")));
65 extern void DSP_ISR(void) __attribute__((weak, alias("default_DSP_ISR")));
66 extern void ADC_ISR(void) __attribute__((weak, alias("default_ADC_ISR")));
67 extern void SW0_ISR(void) __attribute__((weak, alias("default_SW0_ISR")));
68 extern void SW1_ISR(void) __attribute__((weak, alias("default_SW1_ISR")));
69 extern void PWM_ISR(void) __attribute__((weak, alias("default_PWM_ISR")));
70 extern void WDT_ISR(void) __attribute__((weak, alias("default_WDT_ISR")));
71 extern void RTC_TMR_ISR(void)
72 __attribute__((weak, alias("default_RTC_TMR_ISR")));
73
74 extern void SW2_ISR(void) __attribute__((weak, alias("default_SW1_ISR")));
75 extern void SW3_ISR(void) __attribute__((weak, alias("default_SW1_ISR")));
76 extern void SW4_ISR(void) __attribute__((weak, alias("default_SW1_ISR")));
77 extern void SW5_ISR(void) __attribute__((weak, alias("default_SW1_ISR")));
78 extern void SW6_ISR(void) __attribute__((weak, alias("default_SW1_ISR")));
79
80 extern void IntDefaultHandler(void) __attribute__((weak));
81
82 //*****************************************************************************
83 //
84 // Reserve space for the system stack.
85 //
86 //*****************************************************************************
87 extern uint32_t _stack_top;
88 //__attribute__ ((section(".mainStack"), used))
89 // static uint32_t pui32Stack[2048];
90 #define STARTUP_STACK_TOP (&_stack_top)
91
92 //*****************************************************************************
93 // VECTOR TABLE
94 //*****************************************************************************
95 __attribute__((section(".vectors"), used)) void (*const gVectors[])(void) = {
96 //(void (*)(void))((uint32_t)pui32Stack + sizeof(pui32Stack)), // Stack
97 // pointer
98 (void*)STARTUP_STACK_TOP,
99 ResetISR, // Reset handler
100 NmiSR, // The NMI handler
101 FaultISR, // The hard fault handler
102 IntDefaultHandler, // 4 The MPU fault handler
103 IntDefaultHandler, // 5 The bus fault handler
104 IntDefaultHandler, // 6 The usage fault handler
105 0, // 7 Reserved
106 0, // 8 Reserved
107 0, // 9 Reserved
108 0, // 10 Reserved
109 SVCall_ISR, // 11 SVCall handler
110 DebugMonitor_ISR, // 12 Debug monitor handler
111 0, // 13 Reserved
112 PENDSV_ISR, // 14 The PendSV handler
113 SYSTICK_ISR, // 15 The SysTick handler
114
115 // external interrupt service routines (ISR)
116 GPIO0_ISR, // 16 GPIO Port A [ 0]
117 GPIO1_ISR, // 17 GPIO Port B [ 1]
118 TIMER0_ISR, // 18 Timer 0 [ 2]
119 TIMER1_ISR, // 19 Timer 1 [ 3]
120 UART0_ISR, // 20 UART 0 [ 4]
121 UART1_ISR, // 21 UART 1 [ 5]
122 SPI0_ISR, // 22 SPI0 [ 6]
123 SPI1_ISR, // 23 SPI1 [ 7]
124 I2C0_ISR, // 24 I2C 0 [ 8]
125 I2C1_ISR, // 25 I2C 1 [ 9]
126 RTC0_ISR, // 26 RTC 0 [10]
127 RTC1_ISR, // 27 RTC 1 [11]
128 DSP_ISR, // 28 DSP MAILBOX [12]
129 ADC_ISR, // 29 ADC [13]
130 PWM_ISR, // 32 PWM [14]
131 WDT_ISR, // 33 WDT [15]
132 RTC_TMR_ISR, // 34 RTC [16]
133
134 SW0_ISR, // 30 Software Interrupt 0 [17]
135 SW1_ISR, // 31 Software Interrupt 1 [18]
136 SW2_ISR, // 35 Software Interrupt 2 [19]
137 SW3_ISR, // 36 Software Interrupt 3 [20]
138 SW4_ISR, // 37 Software Interrupt 4 [21]
139 SW5_ISR, // 38 Software Interrupt 5 [22]
140 SW6_ISR, // 39 Software Interrupt 6 [23]
141
142 };
143
144 //*****************************************************************************
145 //
146 // The following are constructs created by the linker, indicating where the
147 // the "data" and "bss" segments reside in memory. The initializers for the
148 // for the "data" segment resides immediately following the "text" segment.
149 //
150 //*****************************************************************************
151 extern uint32_t _etext;
152 extern uint32_t _eftext;
153 extern uint32_t _data;
154 extern uint32_t _edata;
155 extern uint32_t _bss;
156 extern uint32_t _ebss;
157
158 //
159 // And here are the weak interrupt handlers.
160 //
default_NmiSR(void)161 void default_NmiSR(void) {
162 __asm(" movs r0, #2");
163 while (1) {
164 }
165 }
166
default_FaultISR(void)167 void default_FaultISR(void) {
168 __asm(" movs r0, #3");
169 MEMIO32(0x1001FFF0) = 0xbad0beef; // near the top of 128KB of SRAM
170 MEMIO32(0x1001FFF4) = 0xbad1beef; // near the top of 128KB of SRAM
171 while (1) {
172 __asm(" BKPT #1");
173 }
174 }
175
IntDefaultHandler(void)176 void IntDefaultHandler(void) {
177 __asm(" movs r0, #20");
178 while (1) {
179 __asm(" BKPT #1");
180 }
181 }
182
default_SVCall_ISR(void)183 void default_SVCall_ISR(void) {
184 __asm(" movs r0, #11");
185 while (1) {
186 __asm(" BKPT #11");
187 }
188 }
189
default_DebugMonitor_ISR(void)190 void default_DebugMonitor_ISR(void) {
191 __asm(" movs r0, #12");
192 while (1) {
193 __asm(" BKPT #12");
194 }
195 }
196
default_PENDSV_ISR(void)197 void default_PENDSV_ISR(void) {
198 __asm(" movs r0, #14");
199 while (1) {
200 __asm(" BKPT #14");
201 }
202 }
203
default_SYSTICK_ISR(void)204 void default_SYSTICK_ISR(void) {
205 __asm(" movs r0, #15");
206 while (1) {
207 __asm(" BKPT #15");
208 }
209 }
210
211 //%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
212 //%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
default_SPI0_ISR(void)213 void default_SPI0_ISR(void) {
214 __asm(" movs r0, #16");
215 while (1) {
216 __asm(" BKPT #16");
217 }
218 }
219
default_SPI1_ISR(void)220 void default_SPI1_ISR(void) {
221 __asm(" movs r0, #16");
222 while (1) {
223 __asm(" BKPT #16");
224 }
225 }
226
default_I2C0_ISR(void)227 void default_I2C0_ISR(void) {
228 __asm(" movs r0, #16");
229 while (1) {
230 __asm(" BKPT #16");
231 }
232 }
233
default_I2C1_ISR(void)234 void default_I2C1_ISR(void) {
235 __asm(" movs r0, #16");
236 while (1) {
237 __asm(" BKPT #16");
238 }
239 }
240
default_UART0_ISR(void)241 void default_UART0_ISR(void) {
242 __asm(" movs r0, #16");
243 while (1) {
244 __asm(" BKPT #16");
245 }
246 }
247
default_UART1_ISR(void)248 void default_UART1_ISR(void) {
249 __asm(" movs r0, #16");
250 while (1) {
251 __asm(" BKPT #16");
252 }
253 }
254
default_GPIO0_ISR(void)255 void default_GPIO0_ISR(void) {
256 __asm(" movs r0, #16");
257 while (1) {
258 __asm(" BKPT #16");
259 }
260 }
261
default_GPIO1_ISR(void)262 void default_GPIO1_ISR(void) {
263 __asm(" movs r0, #16");
264 while (1) {
265 __asm(" BKPT #16");
266 }
267 }
268
default_ADC_ISR(void)269 void default_ADC_ISR(void) {
270 __asm(" movs r0, #16");
271 while (1) {
272 __asm(" BKPT #16");
273 }
274 }
275
default_DSP_ISR(void)276 void default_DSP_ISR(void) {
277 __asm(" movs r0, #16");
278 while (1) {
279 __asm(" BKPT #16");
280 }
281 }
282
default_TIMER0_ISR(void)283 void default_TIMER0_ISR(void) {
284 __asm(" movs r0, #16");
285 while (1) {
286 __asm(" BKPT #16");
287 }
288 }
289
default_TIMER1_ISR(void)290 void default_TIMER1_ISR(void) {
291 __asm(" movs r0, #16");
292 while (1) {
293 __asm(" BKPT #16");
294 }
295 }
296
default_RTC0_ISR(void)297 void default_RTC0_ISR(void) {
298 __asm(" movs r0, #16");
299 while (1) {
300 __asm(" BKPT #16");
301 }
302 }
303
default_RTC1_ISR(void)304 void default_RTC1_ISR(void) {
305 __asm(" movs r0, #16");
306 while (1) {
307 __asm(" BKPT #16");
308 }
309 }
310
default_PWM_ISR(void)311 void default_PWM_ISR(void) {
312 __asm(" movs r0, #16");
313 while (1) {
314 __asm(" BKPT #16");
315 }
316 }
317
default_WDT_ISR(void)318 void default_WDT_ISR(void) {
319 __asm(" movs r0, #16");
320 while (1) {
321 __asm(" BKPT #16");
322 }
323 }
324
default_RTC_TMR_ISR(void)325 void default_RTC_TMR_ISR(void) {
326 __asm(" movs r0, #16");
327 while (1) {
328 __asm(" BKPT #16");
329 }
330 }
331
default_SW0_ISR(void)332 void default_SW0_ISR(void) {
333 __asm(" movs r0, #16");
334 while (1) {
335 __asm(" BKPT #16");
336 }
337 }
338
default_SW1_ISR(void)339 void default_SW1_ISR(void) {
340 __asm(" movs r0, #17");
341 while (1) {
342 __asm(" BKPT #17");
343 }
344 }
345
346 ////////////////////////////////////////////////////////////////////////////////
347 // Reset ISR
348 ////////////////////////////////////////////////////////////////////////////////
default_ResetISR(void)349 void default_ResetISR(void) {
350 int rc;
351 bool bRunningInFlash;
352
353 set_vtor();
354
355 bRunningInFlash =
356 ((((uint32_t)startup_get_my_pc()) & 0xFF000000) == 0x01000000);
357
358 if ((!REG_RTC_AO_CSR.BF.WARM_START_MODE) || bRunningInFlash) {
359 //
360 // Copy any .ro bytes to .data so that initialized global variables
361 // are actually properly initialized.
362 //
363 __asm(
364 " ldr r0, =_eftext\n"
365 " ldr r1, =_data\n"
366 " ldr r2, =_edata\n"
367 "ro_copy_loop:\n"
368 " ldr r3, [r0], #4\n"
369 " str r3, [r1], #4\n"
370 " cmp r1, r2\n"
371 " ble ro_copy_loop\n");
372
373 //
374 // Zero fill the .bss section.
375 //
376 __asm(
377 " ldr r0, =_bss\n"
378 " ldr r1, =_ebss\n"
379 " mov r2, #0\n"
380 "bss_zero_loop:\n"
381 " cmp r0, r1\n"
382 " it lt\n"
383 " strlt r2, [r0], #4\n"
384 " blt bss_zero_loop\n");
385 }
386
387 //
388 // call the main routine barefoot, i.e. without the normal CRTC0 entry
389 // point.
390 //
391 rc = _main(0, NULL);
392
393 //
394 // If main ever returns, trap it here and wake up the debugger if it is
395 // connected.
396 //
397 while (1) // for FPGA/real chip use
398 {
399 __asm(" BKPT #1");
400 }
401 }
402
403 ////////////////////////////////////////////////////////////////////////////////
404 // get my PC
405 ////////////////////////////////////////////////////////////////////////////////
startup_get_my_pc(void)406 void* startup_get_my_pc(void) {
407 void* pc;
408 asm("mov %0, pc" : "=r"(pc));
409 return pc;
410 }
411
412 ////////////////////////////////////////////////////////////////////////////////
413 // get my SP
414 ////////////////////////////////////////////////////////////////////////////////
startup_get_my_sp(void)415 void* startup_get_my_sp(void) {
416 void* sp;
417 asm("mov %0, sp" : "=r"(sp));
418 return sp;
419 }
420
421 ////////////////////////////////////////////////////////////////////////////////
422 // Set VTOR based on PC
423 ////////////////////////////////////////////////////////////////////////////////
set_vtor(void)424 void set_vtor(void) {
425 __asm(
426 " ldr r0, =0xe000ed08\n"
427 " ldr r1, =0xFF000000\n"
428 " mov r2, lr\n"
429 " and r1, r2\n"
430 " str r1, [r0]\n");
431
432 return;
433 }
434
