1/*
2 * Copyright (c) 2020 Thomas Stranger
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <st/g0/stm32g031.dtsi>
8
9/ {
10	soc {
11		compatible = "st,stm32g051", "st,stm32g0", "simple-bus";
12
13		timers6: timers@40001000 {
14			compatible = "st,stm32-timers";
15			reg = <0x40001000 0x400>;
16			clocks = <&rcc STM32_CLOCK(APB1, 4U)>;
17			resets = <&rctl STM32_RESET(APB1L, 4U)>;
18			interrupts = <17 0>;
19			interrupt-names = "global";
20			status = "disabled";
21
22			counter {
23				compatible = "st,stm32-counter";
24				status = "disabled";
25			};
26		};
27
28		timers7: timers@40001400 {
29			compatible = "st,stm32-timers";
30			reg = <0x40001400 0x400>;
31			clocks = <&rcc STM32_CLOCK(APB1, 5U)>;
32			resets = <&rctl STM32_RESET(APB1L, 5U)>;
33			interrupts = <18 0>;
34			interrupt-names = "global";
35			st,prescaler = <0>;
36			status = "disabled";
37
38			counter {
39				compatible = "st,stm32-counter";
40				status = "disabled";
41			};
42		};
43
44		timers15: timers@40014000 {
45			compatible = "st,stm32-timers";
46			reg = <0x40014000 0x400>;
47			clocks = <&rcc STM32_CLOCK(APB1_2, 16U)>;
48			resets = <&rctl STM32_RESET(APB1H, 16U)>;
49			interrupts = <20 0>;
50			interrupt-names = "global";
51			st,prescaler = <0>;
52			status = "disabled";
53
54			pwm {
55				compatible = "st,stm32-pwm";
56				status = "disabled";
57				#pwm-cells = <3>;
58			};
59
60			counter {
61				compatible = "st,stm32-counter";
62				status = "disabled";
63			};
64		};
65
66		dac1: dac@40007400 {
67			compatible = "st,stm32-dac";
68			reg = <0x40007400 0x400>;
69			clocks = <&rcc STM32_CLOCK(APB1, 29U)>;
70			status = "disabled";
71			#io-channel-cells = <1>;
72		};
73
74		dma1: dma@40020000 {
75			interrupts = <9 0 10 0 10 0 11 0 11 0 11 0 11 0>;
76			dma-requests = <7>;
77		};
78
79		dmamux1: dmamux@40020800 {
80			dma-channels = <7>;
81		};
82	};
83};
84