1 /*
2  * Copyright (c) 2017 Oticon A/S
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Note that the function prototypes are taken from the NRFx HAL
7  */
8 #include "hal/nrf_ppi.h"
9 #include "NRF_PPI.h"
10 #include "bs_tracing.h"
11 
nrf_ppi_channel_enable(NRF_PPI_Type * p_reg,nrf_ppi_channel_t channel)12 void nrf_ppi_channel_enable(NRF_PPI_Type * p_reg, nrf_ppi_channel_t channel)
13 {
14   p_reg->CHENSET = (1 << channel);
15   nrf_ppi_regw_sideeffects_CHENSET();
16 }
17 
nrf_ppi_channel_disable(NRF_PPI_Type * p_reg,nrf_ppi_channel_t channel)18 void nrf_ppi_channel_disable(NRF_PPI_Type * p_reg, nrf_ppi_channel_t channel)
19 {
20   p_reg->CHENCLR = (1 << channel);
21   nrf_ppi_regw_sideeffects_CHENCLR();
22 }
23 
nrf_ppi_channels_enable(NRF_PPI_Type * p_reg,uint32_t mask)24 void nrf_ppi_channels_enable(NRF_PPI_Type * p_reg, uint32_t mask)
25 {
26   p_reg->CHENSET = mask;
27   nrf_ppi_regw_sideeffects_CHENSET();
28 }
29 
nrf_ppi_channels_disable(NRF_PPI_Type * p_reg,uint32_t mask)30 void nrf_ppi_channels_disable(NRF_PPI_Type * p_reg, uint32_t mask)
31 {
32   p_reg->CHENCLR = mask;
33   nrf_ppi_regw_sideeffects_CHENCLR();
34 }
35 
nrf_ppi_channel_endpoint_setup(NRF_PPI_Type * p_reg,nrf_ppi_channel_t channel,uint32_t eep,uint32_t tep)36 void nrf_ppi_channel_endpoint_setup(NRF_PPI_Type *    p_reg,
37                                     nrf_ppi_channel_t channel,
38                                     uint32_t          eep,
39                                     uint32_t          tep)
40 {
41   p_reg->CH[(uint32_t) channel].EEP = eep;
42   nrf_ppi_regw_sideeffects_EEP(channel);
43   p_reg->CH[(uint32_t) channel].TEP = tep;
44   nrf_ppi_regw_sideeffects_TEP(channel);
45 }
46 
nrf_ppi_event_endpoint_setup(NRF_PPI_Type * p_reg,nrf_ppi_channel_t channel,uint32_t eep)47 void nrf_ppi_event_endpoint_setup(NRF_PPI_Type *    p_reg,
48                                   nrf_ppi_channel_t channel,
49                                   uint32_t          eep)
50 {
51   p_reg->CH[(uint32_t) channel].EEP = eep;
52   nrf_ppi_regw_sideeffects_EEP(channel);
53 }
54 
nrf_ppi_task_endpoint_setup(NRF_PPI_Type * p_reg,nrf_ppi_channel_t channel,uint32_t tep)55 void nrf_ppi_task_endpoint_setup(NRF_PPI_Type *    p_reg,
56                                  nrf_ppi_channel_t channel,
57                                  uint32_t          tep)
58 {
59   p_reg->CH[(uint32_t) channel].TEP = tep;
60   nrf_ppi_regw_sideeffects_TEP(channel);
61 }
62 
nrf_ppi_fork_endpoint_setup(NRF_PPI_Type * p_reg,nrf_ppi_channel_t channel,uint32_t fork_tep)63 void nrf_ppi_fork_endpoint_setup(NRF_PPI_Type *    p_reg,
64                                  nrf_ppi_channel_t channel,
65                                  uint32_t          fork_tep)
66 {
67   p_reg->FORK[(uint32_t) channel].TEP = fork_tep;
68   nrf_ppi_regw_sideeffects_FORK_TEP(channel);
69 }
70 
nrf_ppi_group_disable(NRF_PPI_Type * p_reg,nrf_ppi_channel_group_t group)71 void nrf_ppi_group_disable(NRF_PPI_Type * p_reg, nrf_ppi_channel_group_t group)
72 {
73   p_reg->TASKS_CHG[(uint32_t) group].DIS = 1;
74   nrf_ppi_regw_sideeffects_TASKS_CHG_DIS(group);
75 }
76 
nrf_ppi_group_enable(NRF_PPI_Type * p_reg,nrf_ppi_channel_group_t group)77 void nrf_ppi_group_enable(NRF_PPI_Type * p_reg, nrf_ppi_channel_group_t group)
78 {
79   p_reg->TASKS_CHG[(uint32_t) group].EN = 1;
80   nrf_ppi_regw_sideeffects_TASKS_CHG_EN(group);
81 }
82