1/*
2 * state_asm.S - assembly language processor management routines
3 */
4
5/*
6 * Copyright (c) 2005-2010 Tensilica Inc.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining
9 * a copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sublicense, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
23 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 */
27
28#include <xtensa/coreasm.h>
29
30	.text
31
32//----------------------------------------------------------------------
33// 		save the extra processor state.
34//----------------------------------------------------------------------
35
36
37
38// void xthal_save_extra(void *base)
39
40DECLFUNC(xthal_save_extra)
41	abi_entry
42	xchal_extra_store_funcbody
43	abi_return
44	endfunc
45
46
47//----------------------------------------------------------------------
48// 		restore the extra processor state.
49//----------------------------------------------------------------------
50
51
52
53// void xthal_restore_extra(void *base)
54
55DECLFUNC(xthal_restore_extra)
56	abi_entry
57	xchal_extra_load_funcbody
58	abi_return
59	endfunc
60
61//----------------------------------------------------------------------
62// 		save the TIE COPROCESSORS state
63//----------------------------------------------------------------------
64
65
66
67// void xthal_save_cpregs(void *base, int)
68DECLFUNC(xthal_save_cpregs)
69	abi_entry
70	xchal_cpi_store_funcbody
71	abi_return
72	endfunc
73
74// void xthal_save_cp0(void *base)
75DECLFUNC(xthal_save_cp0)
76	abi_entry
77	xchal_cp0_store_a2
78	abi_return
79	endfunc
80
81// void xthal_save_cp1(void *base)
82DECLFUNC(xthal_save_cp1)
83	abi_entry
84	xchal_cp1_store_a2
85	abi_return
86	endfunc
87
88// void xthal_save_cp2(void *base)
89DECLFUNC(xthal_save_cp2)
90	abi_entry
91	xchal_cp2_store_a2
92	abi_return
93	endfunc
94
95// void xthal_save_cp3(void *base)
96DECLFUNC(xthal_save_cp3)
97	abi_entry
98	xchal_cp3_store_a2
99	abi_return
100	endfunc
101
102// void xthal_save_cp4(void *base)
103DECLFUNC(xthal_save_cp4)
104	abi_entry
105	xchal_cp4_store_a2
106	abi_return
107	endfunc
108
109// void xthal_save_cp5(void *base)
110DECLFUNC(xthal_save_cp5)
111	abi_entry
112	xchal_cp5_store_a2
113	abi_return
114	endfunc
115
116// void xthal_save_cp6(void *base)
117DECLFUNC(xthal_save_cp6)
118	abi_entry
119	xchal_cp6_store_a2
120	abi_return
121	endfunc
122
123// void xthal_save_cp7(void *base)
124DECLFUNC(xthal_save_cp7)
125	abi_entry
126	xchal_cp7_store_a2
127	abi_return
128	endfunc
129
130//----------------------------------------------------------------------
131// 		restore the TIE coprocessor state
132//----------------------------------------------------------------------
133
134
135
136// void xthal_restore_cpregs(void *base, int)
137
138DECLFUNC(xthal_restore_cpregs)
139	abi_entry
140	xchal_cpi_load_funcbody
141	abi_return
142	endfunc
143
144// void xthal_restore_cp0(void *base)
145DECLFUNC(xthal_restore_cp0)
146	abi_entry
147	xchal_cp0_load_a2
148	abi_return
149	endfunc
150
151// void xthal_restore_cp1(void *base)
152DECLFUNC(xthal_restore_cp1)
153	abi_entry
154	xchal_cp1_load_a2
155	abi_return
156	endfunc
157
158// void xthal_restore_cp2(void *base)
159DECLFUNC(xthal_restore_cp2)
160	abi_entry
161	xchal_cp2_load_a2
162	abi_return
163	endfunc
164
165// void xthal_restore_cp3(void *base)
166DECLFUNC(xthal_restore_cp3)
167	abi_entry
168	xchal_cp3_load_a2
169	abi_return
170	endfunc
171
172// void xthal_restore_cp4(void *base)
173DECLFUNC(xthal_restore_cp4)
174	abi_entry
175	xchal_cp4_load_a2
176	abi_return
177	endfunc
178
179// void xthal_restore_cp5(void *base)
180DECLFUNC(xthal_restore_cp5)
181	abi_entry
182	xchal_cp5_load_a2
183	abi_return
184	endfunc
185
186// void xthal_restore_cp6(void *base)
187DECLFUNC(xthal_restore_cp6)
188	abi_entry
189	xchal_cp6_load_a2
190	abi_return
191	endfunc
192
193// void xthal_restore_cp7(void *base)
194DECLFUNC(xthal_restore_cp7)
195	abi_entry
196	xchal_cp7_load_a2
197	abi_return
198	endfunc
199
200
201	.section .rodata, "a"
202_SYM(Xthal_cpregs_save_fn)
203# ifdef __XTENSA_CALL0_ABI__
204_SYM(Xthal_cpregs_save_nw_fn)
205# endif
206	.long	xthal_save_cp0
207	.long	xthal_save_cp1
208	.long	xthal_save_cp2
209	.long	xthal_save_cp3
210	.long	xthal_save_cp4
211	.long	xthal_save_cp5
212	.long	xthal_save_cp6
213	.long	xthal_save_cp7
214	endfunc
215	.text
216
217
218# ifndef __XTENSA_CALL0_ABI__
219	.section .rodata, "a"
220_SYM(Xthal_cpregs_save_nw_fn)
221	.long	xthal_save_cp0_nw
222	.long	xthal_save_cp1_nw
223	.long	xthal_save_cp2_nw
224	.long	xthal_save_cp3_nw
225	.long	xthal_save_cp4_nw
226	.long	xthal_save_cp5_nw
227	.long	xthal_save_cp6_nw
228	.long	xthal_save_cp7_nw
229	endfunc
230	.text
231# endif
232
233
234	.section .rodata, "a"
235_SYM(Xthal_cpregs_restore_fn)
236# ifdef __XTENSA_CALL0_ABI__
237_SYM(Xthal_cpregs_restore_nw_fn)
238# endif
239	.long	xthal_restore_cp0
240	.long	xthal_restore_cp1
241	.long	xthal_restore_cp2
242	.long	xthal_restore_cp3
243	.long	xthal_restore_cp4
244	.long	xthal_restore_cp5
245	.long	xthal_restore_cp6
246	.long	xthal_restore_cp7
247	endfunc
248	.text
249
250
251# ifndef __XTENSA_CALL0_ABI__
252	.section .rodata, "a"
253_SYM(Xthal_cpregs_restore_nw_fn)
254	.long	xthal_restore_cp0_nw
255	.long	xthal_restore_cp1_nw
256	.long	xthal_restore_cp2_nw
257	.long	xthal_restore_cp3_nw
258	.long	xthal_restore_cp4_nw
259	.long	xthal_restore_cp5_nw
260	.long	xthal_restore_cp6_nw
261	.long	xthal_restore_cp7_nw
262	endfunc
263	.text
264# endif
265
266
267//----------------------------------------------------------------------
268//		coprocessor enable/disable
269//----------------------------------------------------------------------
270
271
272
273// validate the register file.
274// void xthal_validate_cp(int)
275
276DECLFUNC(xthal_validate_cp)
277	abi_entry
278#if XCHAL_HAVE_CP
279	rsr.cpenable	a3
280	movi	a4, 1
281	ssl	a2
282	sll	a4, a4
283	or	a3, a3, a4
284	wsr.cpenable	a3
285#endif
286	abi_return
287	endfunc
288
289
290
291// invalidate the register file.
292// void xthal_invalidate_cp(int)
293
294DECLFUNC(xthal_invalidate_cp)
295	abi_entry
296#if XCHAL_HAVE_CP
297	rsr.cpenable	a3
298	movi	a4, 1
299	ssl	a2
300	sll	a4, a4
301	and	a4, a3, a4
302	xor	a3, a3, a4
303	wsr.cpenable	a3
304#endif
305	abi_return
306	endfunc
307
308
309//----------------------------------------------------------------------
310//  Access the CPENABLE register
311//----------------------------------------------------------------------
312
313
314
315// unsigned xthal_get_cpenable(void);
316
317DECLFUNC(xthal_get_cpenable)
318	abi_entry
319#if XCHAL_HAVE_CP
320	rsr.cpenable	a2
321#else
322	movi	a2, 0	// if no CPENABLE (no coprocessors), none is ever enabled
323#endif
324	abi_return
325	endfunc
326
327
328
329// void xthal_set_cpenable(unsigned);
330//
331// Note:  to help asm code performance (eg. OS task switch),
332// this routine returns the previous value of CPENABLE in a3
333// (not a2, because that could require an extra mov instruction).
334// This return value is not shown in the prototype, because
335// C code won't see it.
336// [Perhaps this should go in an RTOS-specific Core HAL or BSP.  TBD.]
337
338DECLFUNC(xthal_set_cpenable)
339	abi_entry
340#if XCHAL_HAVE_CP
341	//rsr.cpenable	a3		// return previous CPENABLE
342	movi	a3, 0		// for now, always return 0 (VxWorks currently done that way)
343
344	wsr.cpenable	a2
345#else
346	movi	a3, 0	// if no CPENABLE (no coprocessors), none is ever enabled
347#endif
348	abi_return
349	endfunc
350
351
352/*  Nothing implemented below this point.  */
353/************************************************************************/
354
355#if 0
356
357//----------------------------------------------------------------------
358// initialize the processor state
359//----------------------------------------------------------------------
360
361// void xthal_init_extra_nw()
362	.global	xthal_init_extra_nw
363	.align	4
364xthal_init_extra_nw:
365	//addi	sp, sp, 0
366	... NOT IMPLEMENTED ...
367	ret
368
369//----------------------------------------------------------------------
370// initialize the TIE coprocessor
371//----------------------------------------------------------------------
372
373// void xthal_init_cp_nw(int)
374	.global	xthal_init_cp_nw
375	.align	4
376xthal_init_cp_nw:
377	//addi	sp, sp, 0
378	... NOT IMPLEMENTED ...
379	ret
380
381//----------------------------------------------------------------------
382//
383//----------------------------------------------------------------------
384
385// initialize the extra processor
386// void xthal_init_mem_extra_nw()
387	.global	xthal_init_mem_extra_nw
388	.align	4
389xthal_init_mem_extra_nw:
390	//addi	sp, sp, 0
391	... NOT IMPLEMENTED ...
392	ret
393
394//----------------------------------------------------------------------
395//
396//----------------------------------------------------------------------
397
398// initialize the TIE coprocessor
399// void xthal_init_mem_cp_nw(int)
400	.global	xthal_init_mem_cp_nw
401	.align	4
402xthal_init_mem_cp_nw:
403	//addi	sp, sp, 0
404	... NOT IMPLEMENTED ...
405	ret
406
407#endif /*0*/
408
409