1# Low Latency Pipeline and PCM 2# 3# Pipeline Endpoints for connection are :- 4# 5# host PCM_C <--B5-- volume(0C) <--B4-- source DAI0 6 7# Include topology builder 8include(`utils.m4') 9include(`buffer.m4') 10include(`pcm.m4') 11include(`pga.m4') 12include(`mixercontrol.m4') 13 14# 15# Controls 16# 17# Volume Mixer control with max value of 32 18C_CONTROLMIXER(PCM PCM_ID Capture Volume, PIPELINE_ID, 19 CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), 20 CONTROLMIXER_MAX(, 40), 21 false, 22 CONTROLMIXER_TLV(TLV 32 steps from -64dB to 0dB for 2dB, vtlv_m64s2), 23 Channel register and shift for Front Left/Right, 24 LIST(` ', KCONTROL_CHANNEL(FL, 0, 0), KCONTROL_CHANNEL(FR, 0, 1))) 25 26# 27# Volume configuration 28# 29 30W_VENDORTUPLES(capture_pga_tokens, sof_volume_tokens, 31LIST(` ', `SOF_TKN_VOLUME_RAMP_STEP_TYPE "0"' 32 ` ', `SOF_TKN_VOLUME_RAMP_STEP_MS "250"')) 33 34W_DATA(capture_pga_conf, capture_pga_tokens) 35 36# 37# Components and Buffers 38# 39 40# Host "Low Latency Capture" PCM 41# with 0 sink and 2 source periods 42W_PCM_CAPTURE(PCM_ID, Low Latency Capture, 0, 2, SCHEDULE_CORE) 43 44# "Capture Volume" has 2 sink and x source periods for host and DAI ping-pong 45W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, SCHEDULE_CORE, 46 LIST(` ', "PIPELINE_ID PCM PCM_ID Capture Volume")) 47 48# Capture Buffers 49W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS, 50 COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), 51 PLATFORM_DAI_MEM_CAP) 52W_BUFFER(1, COMP_BUFFER_SIZE(2, 53 COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), 54 PLATFORM_HOST_MEM_CAP) 55 56# 57# Pipeline Graph 58# 59# host PCM <--B1-- volume <--B0-- source DAI0 60 61P_GRAPH(pipe-low-latency-capture, PIPELINE_ID, 62 LIST(` ', 63 `dapm(N_PCMC(PCM_ID), N_BUFFER(1))', 64 `dapm(N_BUFFER(1), N_PGA(0))', 65 `dapm(N_PGA(0), N_BUFFER(0))')) 66 67# 68# Pipeline Source and Sinks 69# 70indir(`define', concat(`PIPELINE_SINK_', PIPELINE_ID), N_BUFFER(0)) 71indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), Low Latency Capture PCM_ID) 72 73# 74# PCM Configuration 75# 76 77PCM_CAPABILITIES(Low Latency Capture PCM_ID, CAPABILITY_FORMAT_NAME(PIPELINE_FORMAT), PCM_MIN_RATE, PCM_MAX_RATE, 2, PIPELINE_CHANNELS, 2, 4, 192, 16384, 65536, 65536) 78