1 // Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 enum intr_type { 22 INTR_TYPE_LEVEL = 0, 23 INTR_TYPE_EDGE 24 }; 25 /*************************** Software interrupt dispatcher ***************************/ 26 27 /** Callback type of the interrupt handler */ 28 typedef void (*intr_handler_t)(void*); 29 30 /** Set the interrupt handler function for the given CPU interrupt 31 * @param rv_int_num CPU interrupt number 32 * @param fn Handler function 33 * @param arg Handler argument 34 */ 35 void intr_handler_set(int rv_int_num, intr_handler_t fn, void* arg); 36 37 /** Get the interrupt handler function for the given CPU interrupt 38 * 39 *@return interrupt handler registered for a particular interrupt number, or NULL otherwise 40 */ 41 intr_handler_t intr_handler_get(int rv_int_num); 42 43 /** Get the interrupt handler argument associated with the given CPU interrupt 44 * 45 *@return interrupt handler argument for a particular interrupt number, or NULL otherwise 46 */ 47 void *intr_handler_get_arg(int rv_int_num); 48 49 /*************************** Interrupt matrix ***************************/ 50 51 /** 52 * this function will be removed in later, please use `intr_matrix_set` instead 53 * Route the peripheral interrupt signal to the CPU 54 * @param periph_intr_source Peripheral interrupt number, one of ETS_XXX_SOURCE 55 * @param rv_int_num CPU interrupt number 56 */ 57 void intr_matrix_route(int periph_intr_source, int rv_int_num); 58 59 /*************************** ESP-RV Interrupt Controller ***************************/ 60 61 /** 62 * @brief Enable interrupts from interrupt controller. 63 * 64 * @param uint32_t unmask, unmask bits for interrupts, each bit for an interrupt 65 * 66 * return none 67 */ 68 void esprv_intc_int_enable(uint32_t unmask); 69 70 /** 71 * @brief Disable interrupts from interrupt controller. 72 * 73 * @param uint32_t mask, mask bits for interrupts, each bit for an interrupt 74 * 75 * return none 76 */ 77 void esprv_intc_int_disable(uint32_t mask); 78 79 /** 80 * @brief Set interrupt type, level or edge 81 * 82 * @param int intr_num, interrupt number 83 * 84 * @param enum intr_type type, interrupt type, the level interrupt 85 can be cleared automatically once the interrupt source cleared, the edge interrupt should be clear by software after handled 86 * 87 * return none 88 */ 89 void esprv_intc_int_set_type(int intr_num, enum intr_type type); 90 91 /** 92 * Set interrupt priority in the interrupt controller 93 * @param rv_int_num CPU interrupt number 94 * @param priority Interrupt priority level, 1 to 7 95 */ 96 void esprv_intc_int_set_priority(int rv_int_num, int priority); 97 98 /** 99 * Set interrupt priority threshold. 100 * Interrupts with priority levels lower than the threshold are masked. 101 * 102 * @param priority_threshold Interrupt priority threshold, 0 to 7 103 */ 104 void esprv_intc_set_threshold(int priority_threshold); 105 106 /** 107 * @brief Get interrupt unmask 108 * @param none 109 * @return uint32_t interrupt unmask 110 */ 111 uint32_t esprv_intc_get_interrupt_unmask(void); 112 113 #ifdef __cplusplus 114 } 115 #endif 116
