1 /*
2 * Copyright (c) 2023 Nordic Semiconductor ASA
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6 #define DT_DRV_COMPAT nordic_npm1300_regulator
7
8 #include <errno.h>
9 #include <string.h>
10
11 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/drivers/regulator.h>
13 #include <zephyr/drivers/mfd/npm1300.h>
14 #include <zephyr/dt-bindings/regulator/npm1300.h>
15 #include <zephyr/sys/linear_range.h>
16 #include <zephyr/sys/util.h>
17
18 /* nPM1300 voltage sources */
19 enum npm1300_sources {
20 NPM1300_SOURCE_BUCK1,
21 NPM1300_SOURCE_BUCK2,
22 NPM1300_SOURCE_LDO1,
23 NPM1300_SOURCE_LDO2,
24 };
25
26 /* nPM1300 gpio control channels */
27 enum npm1300_gpio_type {
28 NPM1300_GPIO_TYPE_ENABLE,
29 NPM1300_GPIO_TYPE_RETENTION,
30 NPM1300_GPIO_TYPE_PWM
31 };
32
33 /* nPM1300 regulator base addresses */
34 #define BUCK_BASE 0x04U
35 #define LDSW_BASE 0x08U
36 #define SHIP_BASE 0x0BU
37
38 /* nPM1300 regulator register offsets */
39 #define BUCK_OFFSET_EN_SET 0x00U
40 #define BUCK_OFFSET_EN_CLR 0x01U
41 #define BUCK_OFFSET_PWM_SET 0x04U
42 #define BUCK_OFFSET_PWM_CLR 0x05U
43 #define BUCK_OFFSET_VOUT_NORM 0x08U
44 #define BUCK_OFFSET_VOUT_RET 0x09U
45 #define BUCK_OFFSET_EN_CTRL 0x0CU
46 #define BUCK_OFFSET_VRET_CTRL 0x0DU
47 #define BUCK_OFFSET_PWM_CTRL 0x0EU
48 #define BUCK_OFFSET_SW_CTRL 0x0FU
49 #define BUCK_OFFSET_VOUT_STAT 0x10U
50 #define BUCK_OFFSET_CTRL0 0x15U
51 #define BUCK_OFFSET_STATUS 0x34U
52
53 /* nPM1300 ldsw register offsets */
54 #define LDSW_OFFSET_EN_SET 0x00U
55 #define LDSW_OFFSET_EN_CLR 0x01U
56 #define LDSW_OFFSET_STATUS 0x04U
57 #define LDSW_OFFSET_GPISEL 0x05U
58 #define LDSW_OFFSET_CONFIG 0x07U
59 #define LDSW_OFFSET_LDOSEL 0x08U
60 #define LDSW_OFFSET_VOUTSEL 0x0CU
61
62 /* nPM1300 ship register offsets */
63 #define SHIP_OFFSET_SHIP 0x02U
64
65 #define BUCK1_ON_MASK 0x04U
66 #define BUCK2_ON_MASK 0x40U
67
68 #define LDSW1_ON_MASK 0x03U
69 #define LDSW2_ON_MASK 0x0CU
70
71 #define LDSW1_SOFTSTART_MASK 0x0CU
72 #define LDSW1_SOFTSTART_SHIFT 2U
73 #define LDSW2_SOFTSTART_MASK 0x30U
74 #define LDSW2_SOFTSTART_SHIFT 4U
75
76 struct regulator_npm1300_pconfig {
77 const struct device *mfd;
78 struct gpio_dt_spec dvs_state_pins[5];
79 };
80
81 struct regulator_npm1300_config {
82 struct regulator_common_config common;
83 const struct device *mfd;
84 uint8_t source;
85 int32_t retention_uv;
86 struct gpio_dt_spec enable_gpios;
87 struct gpio_dt_spec retention_gpios;
88 struct gpio_dt_spec pwm_gpios;
89 uint8_t soft_start;
90 bool ldo_disable_workaround;
91 };
92
93 struct regulator_npm1300_data {
94 struct regulator_common_data data;
95 };
96
97 /* Linear range for output voltage, common for all bucks and LDOs on this device */
98 static const struct linear_range buckldo_range = LINEAR_RANGE_INIT(1000000, 100000, 0U, 23U);
99
regulator_npm1300_count_voltages(const struct device * dev)100 unsigned int regulator_npm1300_count_voltages(const struct device *dev)
101 {
102 const struct regulator_npm1300_config *config = dev->config;
103
104 switch (config->source) {
105 case NPM1300_SOURCE_BUCK1:
106 case NPM1300_SOURCE_BUCK2:
107 case NPM1300_SOURCE_LDO1:
108 case NPM1300_SOURCE_LDO2:
109 return linear_range_values_count(&buckldo_range);
110 default:
111 return 0;
112 }
113 }
114
regulator_npm1300_list_voltage(const struct device * dev,unsigned int idx,int32_t * volt_uv)115 int regulator_npm1300_list_voltage(const struct device *dev, unsigned int idx, int32_t *volt_uv)
116 {
117 const struct regulator_npm1300_config *config = dev->config;
118
119 switch (config->source) {
120 case NPM1300_SOURCE_BUCK1:
121 case NPM1300_SOURCE_BUCK2:
122 case NPM1300_SOURCE_LDO1:
123 case NPM1300_SOURCE_LDO2:
124 return linear_range_get_value(&buckldo_range, idx, volt_uv);
125 default:
126 return -EINVAL;
127 }
128 }
129
retention_set_voltage(const struct device * dev,int32_t retention_uv)130 static int retention_set_voltage(const struct device *dev, int32_t retention_uv)
131 {
132 const struct regulator_npm1300_config *config = dev->config;
133 uint16_t idx;
134 uint8_t chan;
135 int ret;
136
137 switch (config->source) {
138 case NPM1300_SOURCE_BUCK1:
139 chan = 0U;
140 break;
141 case NPM1300_SOURCE_BUCK2:
142 chan = 1U;
143 break;
144 default:
145 return -ENOTSUP;
146 }
147
148 ret = linear_range_get_win_index(&buckldo_range, retention_uv, retention_uv, &idx);
149
150 if (ret == -EINVAL) {
151 return ret;
152 }
153
154 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_VOUT_RET + (chan * 2U),
155 idx);
156 }
157
buck_get_voltage_index(const struct device * dev,uint8_t chan,uint8_t * idx)158 static int buck_get_voltage_index(const struct device *dev, uint8_t chan, uint8_t *idx)
159 {
160 const struct regulator_npm1300_config *config = dev->config;
161 uint8_t sel;
162 int ret;
163
164 ret = mfd_npm1300_reg_read(config->mfd, BUCK_BASE, BUCK_OFFSET_SW_CTRL, &sel);
165
166 if (ret < 0) {
167 return ret;
168 }
169
170 if ((sel >> chan) & 1U) {
171 /* SW control */
172 return mfd_npm1300_reg_read(config->mfd, BUCK_BASE,
173 BUCK_OFFSET_VOUT_NORM + (chan * 2U), idx);
174 }
175
176 /* VSET pin control */
177 return mfd_npm1300_reg_read(config->mfd, BUCK_BASE, BUCK_OFFSET_VOUT_STAT + chan, idx);
178 }
179
buck_set_voltage(const struct device * dev,uint8_t chan,int32_t min_uv,int32_t max_uv)180 static int buck_set_voltage(const struct device *dev, uint8_t chan, int32_t min_uv, int32_t max_uv)
181 {
182 const struct regulator_npm1300_config *config = dev->config;
183 uint8_t mask;
184 uint8_t curr_idx;
185 uint16_t idx;
186 int ret;
187
188 ret = linear_range_get_win_index(&buckldo_range, min_uv, max_uv, &idx);
189
190 if (ret == -EINVAL) {
191 return ret;
192 }
193
194 /* Get current setting, and return if current and new index match */
195 ret = buck_get_voltage_index(dev, chan, &curr_idx);
196
197 if ((ret < 0) || (idx == curr_idx)) {
198 return ret;
199 }
200
201 ret = mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_VOUT_NORM + (chan * 2U),
202 idx);
203
204 if (ret < 0) {
205 return ret;
206 }
207
208 /* Enable SW control of buck output */
209 mask = BIT(chan);
210 return mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_SW_CTRL, mask, mask);
211 }
212
ldo_set_voltage(const struct device * dev,uint8_t chan,int32_t min_uv,int32_t max_uv)213 static int ldo_set_voltage(const struct device *dev, uint8_t chan, int32_t min_uv, int32_t max_uv)
214 {
215 const struct regulator_npm1300_config *config = dev->config;
216 uint16_t idx;
217 int ret;
218
219 ret = linear_range_get_win_index(&buckldo_range, min_uv, max_uv, &idx);
220
221 if (ret == -EINVAL) {
222 return ret;
223 }
224
225 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_VOUTSEL + chan, idx);
226 }
227
regulator_npm1300_set_voltage(const struct device * dev,int32_t min_uv,int32_t max_uv)228 int regulator_npm1300_set_voltage(const struct device *dev, int32_t min_uv, int32_t max_uv)
229 {
230 const struct regulator_npm1300_config *config = dev->config;
231
232 switch (config->source) {
233 case NPM1300_SOURCE_BUCK1:
234 return buck_set_voltage(dev, 0, min_uv, max_uv);
235 case NPM1300_SOURCE_BUCK2:
236 return buck_set_voltage(dev, 1, min_uv, max_uv);
237 case NPM1300_SOURCE_LDO1:
238 return ldo_set_voltage(dev, 0, min_uv, max_uv);
239 case NPM1300_SOURCE_LDO2:
240 return ldo_set_voltage(dev, 1, min_uv, max_uv);
241 default:
242 return -ENODEV;
243 }
244 }
245
buck_get_voltage(const struct device * dev,uint8_t chan,int32_t * volt_uv)246 static int buck_get_voltage(const struct device *dev, uint8_t chan, int32_t *volt_uv)
247 {
248 uint8_t idx;
249 int ret;
250
251 ret = buck_get_voltage_index(dev, chan, &idx);
252
253 if (ret < 0) {
254 return ret;
255 }
256
257 return linear_range_get_value(&buckldo_range, idx, volt_uv);
258 }
259
ldo_get_voltage(const struct device * dev,uint8_t chan,int32_t * volt_uv)260 static int ldo_get_voltage(const struct device *dev, uint8_t chan, int32_t *volt_uv)
261 {
262 const struct regulator_npm1300_config *config = dev->config;
263 uint8_t idx;
264 int ret;
265
266 ret = mfd_npm1300_reg_read(config->mfd, LDSW_BASE, LDSW_OFFSET_VOUTSEL + chan, &idx);
267
268 if (ret < 0) {
269 return ret;
270 }
271
272 return linear_range_get_value(&buckldo_range, idx, volt_uv);
273 }
274
regulator_npm1300_get_voltage(const struct device * dev,int32_t * volt_uv)275 int regulator_npm1300_get_voltage(const struct device *dev, int32_t *volt_uv)
276 {
277 const struct regulator_npm1300_config *config = dev->config;
278
279 switch (config->source) {
280 case NPM1300_SOURCE_BUCK1:
281 return buck_get_voltage(dev, 0, volt_uv);
282 case NPM1300_SOURCE_BUCK2:
283 return buck_get_voltage(dev, 1, volt_uv);
284 case NPM1300_SOURCE_LDO1:
285 return ldo_get_voltage(dev, 0, volt_uv);
286 case NPM1300_SOURCE_LDO2:
287 return ldo_get_voltage(dev, 1, volt_uv);
288 default:
289 return -ENODEV;
290 }
291 }
292
set_buck_mode(const struct device * dev,uint8_t chan,regulator_mode_t mode)293 static int set_buck_mode(const struct device *dev, uint8_t chan, regulator_mode_t mode)
294 {
295 const struct regulator_npm1300_config *config = dev->config;
296 uint8_t pfm_mask = BIT(chan);
297 uint8_t pfm_data;
298 uint8_t pwm_reg;
299 int ret;
300
301 switch (mode) {
302 case NPM1300_BUCK_MODE_PWM:
303 pfm_data = 0U;
304 pwm_reg = BUCK_OFFSET_PWM_SET;
305 break;
306 case NPM1300_BUCK_MODE_AUTO:
307 pfm_data = 0U;
308 pwm_reg = BUCK_OFFSET_PWM_CLR;
309 break;
310 case NPM1300_BUCK_MODE_PFM:
311 pfm_data = pfm_mask;
312 pwm_reg = BUCK_OFFSET_PWM_CLR;
313 break;
314 default:
315 return -ENOTSUP;
316 }
317
318 ret = mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_CTRL0, pfm_data, pfm_mask);
319 if (ret < 0) {
320 return ret;
321 }
322
323 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, pwm_reg + (chan * 2U), 1U);
324 }
325
set_ldsw_mode(const struct device * dev,uint8_t chan,regulator_mode_t mode)326 static int set_ldsw_mode(const struct device *dev, uint8_t chan, regulator_mode_t mode)
327 {
328 const struct regulator_npm1300_config *config = dev->config;
329
330 switch (mode) {
331 case NPM1300_LDSW_MODE_LDO:
332 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_LDOSEL + chan, 1U);
333 case NPM1300_LDSW_MODE_LDSW:
334 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_LDOSEL + chan, 0U);
335 default:
336 return -ENOTSUP;
337 }
338 }
339
regulator_npm1300_set_mode(const struct device * dev,regulator_mode_t mode)340 int regulator_npm1300_set_mode(const struct device *dev, regulator_mode_t mode)
341 {
342 const struct regulator_npm1300_config *config = dev->config;
343
344 switch (config->source) {
345 case NPM1300_SOURCE_BUCK1:
346 return set_buck_mode(dev, 0, mode);
347 case NPM1300_SOURCE_BUCK2:
348 return set_buck_mode(dev, 1, mode);
349 case NPM1300_SOURCE_LDO1:
350 return set_ldsw_mode(dev, 0, mode);
351 case NPM1300_SOURCE_LDO2:
352 return set_ldsw_mode(dev, 1, mode);
353 default:
354 return -ENOTSUP;
355 }
356 }
357
regulator_npm1300_enable(const struct device * dev)358 int regulator_npm1300_enable(const struct device *dev)
359 {
360 const struct regulator_npm1300_config *config = dev->config;
361 int ret;
362
363 switch (config->source) {
364 case NPM1300_SOURCE_BUCK1:
365 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_SET, 1U);
366 case NPM1300_SOURCE_BUCK2:
367 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_SET + 2U, 1U);
368 case NPM1300_SOURCE_LDO1:
369 ret = mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_EN_SET, 1U);
370 break;
371 case NPM1300_SOURCE_LDO2:
372 ret = mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_EN_SET + 2U, 1U);
373 break;
374 default:
375 return 0;
376 }
377
378 if (ret < 0) {
379 return ret;
380 }
381
382 if (!config->ldo_disable_workaround) {
383 uint8_t unused;
384
385 k_msleep(2);
386 return mfd_npm1300_reg_read(config->mfd, LDSW_BASE, LDSW_OFFSET_STATUS, &unused);
387 }
388
389 return ret;
390 }
391
regulator_npm1300_disable(const struct device * dev)392 int regulator_npm1300_disable(const struct device *dev)
393 {
394 const struct regulator_npm1300_config *config = dev->config;
395
396 switch (config->source) {
397 case NPM1300_SOURCE_BUCK1:
398 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_CLR, 1U);
399 case NPM1300_SOURCE_BUCK2:
400 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_CLR + 2U, 1U);
401 case NPM1300_SOURCE_LDO1:
402 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_EN_CLR, 1U);
403 case NPM1300_SOURCE_LDO2:
404 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_EN_CLR + 2U, 1U);
405 default:
406 return 0;
407 }
408 }
409
regulator_npm1300_set_buck_pin_ctrl(const struct device * dev,uint8_t chan,uint8_t pin,uint8_t inv,enum npm1300_gpio_type type)410 static int regulator_npm1300_set_buck_pin_ctrl(const struct device *dev, uint8_t chan, uint8_t pin,
411 uint8_t inv, enum npm1300_gpio_type type)
412 {
413 const struct regulator_npm1300_config *config = dev->config;
414 uint8_t ctrl;
415 uint8_t mask;
416
417 switch (chan) {
418 case 0:
419 /* Invert control in bit 6, pin control in bits 2-0 */
420 ctrl = (inv << 6U) | (pin + 1U);
421 mask = BIT(6U) | BIT_MASK(3U);
422 break;
423 case 1:
424 /* Invert control in bit 7, pin control in bits 5-3 */
425 ctrl = (inv << 7U) | ((pin + 1U) << 3U);
426 mask = BIT(7U) | (BIT_MASK(3U) << 3U);
427 break;
428 default:
429 return -EINVAL;
430 }
431
432 switch (type) {
433 case NPM1300_GPIO_TYPE_ENABLE:
434 return mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_CTRL, ctrl,
435 mask);
436 case NPM1300_GPIO_TYPE_PWM:
437 return mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_PWM_CTRL, ctrl,
438 mask);
439 case NPM1300_GPIO_TYPE_RETENTION:
440 return mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_VRET_CTRL, ctrl,
441 mask);
442 default:
443 return -ENOTSUP;
444 }
445 }
446
regulator_npm1300_set_ldsw_pin_ctrl(const struct device * dev,uint8_t chan,uint8_t pin,uint8_t inv,enum npm1300_gpio_type type)447 static int regulator_npm1300_set_ldsw_pin_ctrl(const struct device *dev, uint8_t chan, uint8_t pin,
448 uint8_t inv, enum npm1300_gpio_type type)
449 {
450 const struct regulator_npm1300_config *config = dev->config;
451 uint8_t ctrl;
452
453 if (type != NPM1300_GPIO_TYPE_ENABLE) {
454 return -ENOTSUP;
455 }
456
457 ctrl = (pin + 1U) | (inv << 3U);
458
459 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_GPISEL + chan, ctrl);
460 }
461
regulator_npm1300_set_pin_ctrl(const struct device * dev,const struct gpio_dt_spec * spec,enum npm1300_gpio_type type)462 int regulator_npm1300_set_pin_ctrl(const struct device *dev, const struct gpio_dt_spec *spec,
463 enum npm1300_gpio_type type)
464 {
465 const struct regulator_npm1300_config *config = dev->config;
466 uint8_t inv;
467
468 if (spec->port == NULL) {
469 return 0;
470 }
471
472 inv = (spec->dt_flags & GPIO_ACTIVE_LOW) != 0U;
473
474 switch (config->source) {
475 case NPM1300_SOURCE_BUCK1:
476 return regulator_npm1300_set_buck_pin_ctrl(dev, 0, spec->pin, inv, type);
477 case NPM1300_SOURCE_BUCK2:
478 return regulator_npm1300_set_buck_pin_ctrl(dev, 1, spec->pin, inv, type);
479 case NPM1300_SOURCE_LDO1:
480 return regulator_npm1300_set_ldsw_pin_ctrl(dev, 0, spec->pin, inv, type);
481 case NPM1300_SOURCE_LDO2:
482 return regulator_npm1300_set_ldsw_pin_ctrl(dev, 1, spec->pin, inv, type);
483 default:
484 return -ENODEV;
485 }
486 }
487
regulator_npm1300_dvs_state_set(const struct device * dev,regulator_dvs_state_t state)488 int regulator_npm1300_dvs_state_set(const struct device *dev, regulator_dvs_state_t state)
489 {
490 const struct regulator_npm1300_pconfig *pconfig = dev->config;
491 const struct gpio_dt_spec *spec;
492 int ret;
493
494 for (size_t idx = 0U; idx < 5U; idx++) {
495 spec = &pconfig->dvs_state_pins[idx];
496
497 if (spec->port != NULL) {
498 ret = gpio_pin_set_dt(spec, ((state >> idx) & 1U) != 0U);
499
500 if (ret != 0) {
501 return ret;
502 }
503 }
504 }
505
506 return 0;
507 }
508
regulator_npm1300_ship_mode(const struct device * dev)509 int regulator_npm1300_ship_mode(const struct device *dev)
510 {
511 const struct regulator_npm1300_pconfig *pconfig = dev->config;
512
513 return mfd_npm1300_reg_write(pconfig->mfd, SHIP_BASE, SHIP_OFFSET_SHIP, 1U);
514 }
515
516 static DEVICE_API(regulator_parent, parent_api) = {
517 .dvs_state_set = regulator_npm1300_dvs_state_set,
518 .ship_mode = regulator_npm1300_ship_mode,
519 };
520
regulator_npm1300_common_init(const struct device * dev)521 int regulator_npm1300_common_init(const struct device *dev)
522 {
523 const struct regulator_npm1300_pconfig *pconfig = dev->config;
524 const struct gpio_dt_spec *spec;
525 int ret;
526
527 for (size_t idx = 0U; idx < 5U; idx++) {
528 spec = &pconfig->dvs_state_pins[idx];
529
530 if (spec->port != NULL) {
531 if (!gpio_is_ready_dt(spec)) {
532 return -ENODEV;
533 }
534
535 ret = gpio_pin_configure_dt(spec, GPIO_OUTPUT);
536 if (ret != 0) {
537 return ret;
538 }
539 }
540 }
541
542 return 0;
543 }
544
get_enabled_reg(const struct device * dev,uint8_t base,uint8_t offset,uint8_t mask,bool * enabled)545 static int get_enabled_reg(const struct device *dev, uint8_t base, uint8_t offset, uint8_t mask,
546 bool *enabled)
547 {
548 const struct regulator_npm1300_config *config = dev->config;
549 uint8_t data;
550
551 int ret = mfd_npm1300_reg_read(config->mfd, base, offset, &data);
552
553 if (ret < 0) {
554 return ret;
555 }
556
557 *enabled = (data & mask) != 0U;
558
559 return 0;
560 }
561
get_enabled(const struct device * dev,bool * enabled)562 static int get_enabled(const struct device *dev, bool *enabled)
563 {
564 const struct regulator_npm1300_config *config = dev->config;
565
566 switch (config->source) {
567 case NPM1300_SOURCE_BUCK1:
568 return get_enabled_reg(dev, BUCK_BASE, BUCK_OFFSET_STATUS, BUCK1_ON_MASK, enabled);
569 case NPM1300_SOURCE_BUCK2:
570 return get_enabled_reg(dev, BUCK_BASE, BUCK_OFFSET_STATUS, BUCK2_ON_MASK, enabled);
571 case NPM1300_SOURCE_LDO1:
572 return get_enabled_reg(dev, LDSW_BASE, LDSW_OFFSET_STATUS, LDSW1_ON_MASK, enabled);
573 case NPM1300_SOURCE_LDO2:
574 return get_enabled_reg(dev, LDSW_BASE, LDSW_OFFSET_STATUS, LDSW2_ON_MASK, enabled);
575 default:
576 return -ENODEV;
577 }
578 }
579
soft_start_set(const struct device * dev,uint8_t soft_start)580 static int soft_start_set(const struct device *dev, uint8_t soft_start)
581 {
582 const struct regulator_npm1300_config *config = dev->config;
583
584 switch (config->source) {
585 case NPM1300_SOURCE_LDO1:
586 return mfd_npm1300_reg_update(config->mfd, LDSW_BASE, LDSW_OFFSET_CONFIG,
587 soft_start << LDSW1_SOFTSTART_SHIFT,
588 LDSW1_SOFTSTART_MASK);
589 case NPM1300_SOURCE_LDO2:
590 return mfd_npm1300_reg_update(config->mfd, LDSW_BASE, LDSW_OFFSET_CONFIG,
591 soft_start << LDSW2_SOFTSTART_SHIFT,
592 LDSW2_SOFTSTART_MASK);
593 default:
594 return -ENOTSUP;
595 }
596 }
597
regulator_npm1300_init(const struct device * dev)598 int regulator_npm1300_init(const struct device *dev)
599 {
600 const struct regulator_npm1300_config *config = dev->config;
601 bool enabled;
602 int ret = 0;
603
604 if (!device_is_ready(config->mfd)) {
605 return -ENODEV;
606 }
607
608 ret = get_enabled(dev, &enabled);
609 if (ret < 0) {
610 return ret;
611 }
612
613 ret = regulator_common_init(dev, enabled);
614 if (ret < 0) {
615 return ret;
616 }
617
618 /* Configure retention voltage */
619 if (config->retention_uv != 0) {
620 ret = retention_set_voltage(dev, config->retention_uv);
621 if (ret != 0) {
622 return ret;
623 }
624 }
625
626 /* Configure soft start */
627 if (config->soft_start != UINT8_MAX) {
628 ret = soft_start_set(dev, config->soft_start);
629 if (ret != 0) {
630 return ret;
631 }
632 }
633
634 /* Configure GPIO pin control */
635 ret = regulator_npm1300_set_pin_ctrl(dev, &config->enable_gpios, NPM1300_GPIO_TYPE_ENABLE);
636 if (ret != 0) {
637 return ret;
638 }
639
640 ret = regulator_npm1300_set_pin_ctrl(dev, &config->retention_gpios,
641 NPM1300_GPIO_TYPE_RETENTION);
642 if (ret != 0) {
643 return ret;
644 }
645
646 ret = regulator_npm1300_set_pin_ctrl(dev, &config->pwm_gpios, NPM1300_GPIO_TYPE_PWM);
647 if (ret != 0) {
648 return ret;
649 }
650
651 return ret;
652 }
653
654 static DEVICE_API(regulator, api) = {
655 .enable = regulator_npm1300_enable,
656 .disable = regulator_npm1300_disable,
657 .count_voltages = regulator_npm1300_count_voltages,
658 .list_voltage = regulator_npm1300_list_voltage,
659 .set_voltage = regulator_npm1300_set_voltage,
660 .get_voltage = regulator_npm1300_get_voltage,
661 .set_mode = regulator_npm1300_set_mode,
662 };
663
664 #define REGULATOR_NPM1300_DEFINE(node_id, id, _source) \
665 static struct regulator_npm1300_data data_##id; \
666 \
667 static const struct regulator_npm1300_config config_##id = { \
668 .common = REGULATOR_DT_COMMON_CONFIG_INIT(node_id), \
669 .mfd = DEVICE_DT_GET(DT_GPARENT(node_id)), \
670 .source = _source, \
671 .retention_uv = DT_PROP_OR(node_id, retention_microvolt, 0), \
672 .soft_start = DT_ENUM_IDX_OR(node_id, soft_start_microamp, UINT8_MAX), \
673 .enable_gpios = GPIO_DT_SPEC_GET_OR(node_id, enable_gpios, {0}), \
674 .retention_gpios = GPIO_DT_SPEC_GET_OR(node_id, retention_gpios, {0}), \
675 .pwm_gpios = GPIO_DT_SPEC_GET_OR(node_id, pwm_gpios, {0}), \
676 .ldo_disable_workaround = DT_PROP(node_id, nordic_anomaly38_disable_workaround)}; \
677 \
678 DEVICE_DT_DEFINE(node_id, regulator_npm1300_init, NULL, &data_##id, &config_##id, \
679 POST_KERNEL, CONFIG_REGULATOR_NPM1300_INIT_PRIORITY, &api);
680
681 #define REGULATOR_NPM1300_DEFINE_COND(inst, child, source) \
682 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \
683 (REGULATOR_NPM1300_DEFINE(DT_INST_CHILD(inst, child), child##inst, source)), \
684 ())
685
686 #define REGULATOR_NPM1300_DEFINE_ALL(inst) \
687 static const struct regulator_npm1300_pconfig config_##inst = { \
688 .mfd = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
689 .dvs_state_pins = {GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 0, {0}), \
690 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 1, {0}), \
691 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 2, {0}), \
692 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 3, {0}), \
693 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 4, {0})}}; \
694 \
695 DEVICE_DT_INST_DEFINE(inst, regulator_npm1300_common_init, NULL, NULL, &config_##inst, \
696 POST_KERNEL, CONFIG_REGULATOR_NPM1300_COMMON_INIT_PRIORITY, \
697 &parent_api); \
698 \
699 REGULATOR_NPM1300_DEFINE_COND(inst, buck1, NPM1300_SOURCE_BUCK1) \
700 REGULATOR_NPM1300_DEFINE_COND(inst, buck2, NPM1300_SOURCE_BUCK2) \
701 REGULATOR_NPM1300_DEFINE_COND(inst, ldo1, NPM1300_SOURCE_LDO1) \
702 REGULATOR_NPM1300_DEFINE_COND(inst, ldo2, NPM1300_SOURCE_LDO2)
703
704 DT_INST_FOREACH_STATUS_OKAY(REGULATOR_NPM1300_DEFINE_ALL)
705
