1 /*
2 * Copyright (c) 2020-2023, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <plat/arm/common/plat_arm.h>
8 #include <plat/arm/css/common/css_pm.h>
9
10 /******************************************************************************
11 * The power domain tree descriptor.
12 ******************************************************************************/
13 const unsigned char rd_n2_pd_tree_desc[] = {
14 (PLAT_ARM_CLUSTER_COUNT) * (CSS_SGI_CHIP_COUNT),
15 CSS_SGI_MAX_CPUS_PER_CLUSTER,
16 CSS_SGI_MAX_CPUS_PER_CLUSTER,
17 CSS_SGI_MAX_CPUS_PER_CLUSTER,
18 CSS_SGI_MAX_CPUS_PER_CLUSTER,
19 #if (PLAT_ARM_CLUSTER_COUNT > 4 || \
20 (CSS_SGI_PLATFORM_VARIANT == 2 && CSS_SGI_CHIP_COUNT > 1))
21 CSS_SGI_MAX_CPUS_PER_CLUSTER,
22 CSS_SGI_MAX_CPUS_PER_CLUSTER,
23 CSS_SGI_MAX_CPUS_PER_CLUSTER,
24 CSS_SGI_MAX_CPUS_PER_CLUSTER,
25 #endif
26 #if (PLAT_ARM_CLUSTER_COUNT > 8 || \
27 (CSS_SGI_PLATFORM_VARIANT == 2 && CSS_SGI_CHIP_COUNT > 2))
28 CSS_SGI_MAX_CPUS_PER_CLUSTER,
29 CSS_SGI_MAX_CPUS_PER_CLUSTER,
30 CSS_SGI_MAX_CPUS_PER_CLUSTER,
31 CSS_SGI_MAX_CPUS_PER_CLUSTER,
32 #endif
33 #if (PLAT_ARM_CLUSTER_COUNT > 8 || \
34 (CSS_SGI_PLATFORM_VARIANT == 2 && CSS_SGI_CHIP_COUNT > 3))
35 CSS_SGI_MAX_CPUS_PER_CLUSTER,
36 CSS_SGI_MAX_CPUS_PER_CLUSTER,
37 CSS_SGI_MAX_CPUS_PER_CLUSTER,
38 CSS_SGI_MAX_CPUS_PER_CLUSTER,
39 #endif
40 };
41
42 /*******************************************************************************
43 * This function returns the topology tree information.
44 ******************************************************************************/
plat_get_power_domain_tree_desc(void)45 const unsigned char *plat_get_power_domain_tree_desc(void)
46 {
47 return rd_n2_pd_tree_desc;
48 }
49
50 /*******************************************************************************
51 * The array mapping platform core position (implemented by plat_my_core_pos())
52 * to the SCMI power domain ID implemented by SCP.
53 ******************************************************************************/
54 #if (CSS_SGI_PLATFORM_VARIANT == 2)
55 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
56 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x0)),
57 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x1)),
58 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x2)),
59 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x3)),
60 #if (CSS_SGI_CHIP_COUNT > 1)
61 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x0)),
62 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x1)),
63 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x2)),
64 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x3)),
65 #endif
66 #if (CSS_SGI_CHIP_COUNT > 2)
67 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x0)),
68 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x1)),
69 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x2)),
70 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x3)),
71 #endif
72 #if (CSS_SGI_CHIP_COUNT > 3)
73 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x0)),
74 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x1)),
75 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x2)),
76 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x3)),
77 #endif
78 };
79 #else
80 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
81 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x0)),
82 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x1)),
83 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x2)),
84 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x3)),
85 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x4)),
86 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x5)),
87 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x6)),
88 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x7)),
89 #if (PLAT_ARM_CLUSTER_COUNT > 8)
90 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x8)),
91 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x9)),
92 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xA)),
93 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xB)),
94 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xC)),
95 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xD)),
96 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xE)),
97 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xF)),
98 #endif
99 };
100 #endif
101
