1/*
2 * Copyright (c) 2024 Andrew Featherstone
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv8-m.dtsi>
8
9/* Model in the device tree a Cortex-M33 core being 'plugged' into each
10 * 'socket' within the SoC. Within the datasheet these are core 0 and core 1.
11 */
12&cpu0 {
13	compatible = "arm,cortex-m33";
14};
15
16&cpu1 {
17	compatible = "arm,cortex-m33";
18};
19
20&nvic {
21	arm,num-irq-priority-bits = <4>;
22};
23