1 /*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 /* Use the NRF_RTC instance for coarse radio event scheduling */
8 #if !defined(CONFIG_BT_CTLR_NRF_GRTC)
9 #define NRF_RTC NRF_RTC10
10 #endif /* !CONFIG_BT_CTLR_NRF_GRTC */
11
12 #undef EVENT_TIMER_ID
13 #define EVENT_TIMER_ID 10
14
15 #undef EVENT_TIMER
16 #define EVENT_TIMER _CONCAT(NRF_TIMER, EVENT_TIMER_ID)
17
18 #if !defined(CONFIG_BT_CTLR_TIFS_HW)
19 #undef SW_SWITCH_TIMER
20 #if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
21 #define SW_SWITCH_TIMER EVENT_TIMER
22 #else /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
23 /* TODO: Using NRF_TIMER from another domain needs DPPIC and PPIB setup */
24 #error "SW tIFS switching using dedicated second timer not supported yet."
25 #endif /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
26 #endif /* !CONFIG_BT_CTLR_TIFS_HW */
27
28 /* HAL abstraction of event timer prescaler value */
29 #define HAL_EVENT_TIMER_PRESCALER_VALUE 5U
30
31 /* NRF Radio HW timing constants
32 * - provided in US and NS (for higher granularity)
33 * - based on the timings configured in the HW models, which are based
34 * on the old 52832 product specification
35 */
36
37 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
38 * in microseconds for LE 1M PHY.
39 */
40 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS 41000
41 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_US \
42 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS)
43
44 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
45 * in microseconds for LE 1M PHY.
46 */
47 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS 141000
48 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_US \
49 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS)
50
51 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode
52 * and no HW TIFS auto-switch) in microseconds for LE 1M PHY.
53 */
54 /* 129.5 + 0.8 */
55 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS 130000
56 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_US \
57 HAL_RADIO_NS2US_ROUND( \
58 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS)
59
60 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
61 * in microseconds for LE 2M PHY.
62 */
63 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS 40000
64 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_US \
65 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS)
66
67 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
68 * in microseconds for LE 2M PHY.
69 */
70 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS 140000
71 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_US \
72 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS)
73
74 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
75 * no HW TIFS auto-switch) in microseconds for LE 2M PHY.
76 */
77 /* 129.5 - 0.1 */
78 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS 129000
79 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_US \
80 HAL_RADIO_NS2US_ROUND( \
81 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS)
82
83 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
84 * in microseconds for LE CODED PHY [S2].
85 */
86 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS 42000
87 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_US \
88 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS)
89
90 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
91 * in microseconds for LE 2M PHY [S2].
92 */
93 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS 132000
94 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_US \
95 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS)
96
97 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
98 * no HW TIFS auto-switch) in microseconds for LE 2M PHY [S2].
99 */
100 /* 129.5 + 2.2 */
101 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS 132000
102 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_US \
103 HAL_RADIO_NS2US_ROUND( \
104 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS)
105
106 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
107 * in microseconds for LE CODED PHY [S8].
108 */
109 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS 42000
110 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_US \
111 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS)
112 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
113 * in microseconds for LE 2M PHY [S8].
114 */
115 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS 122000
116 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_US \
117 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS)
118
119 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
120 * no HW TIFS auto-switch) in microseconds for LE 2M PHY [S8].
121 */
122 /* 129.5 + 2.2 */
123 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS 132000
124 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_US \
125 HAL_RADIO_NS2US_ROUND( \
126 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS)
127
128 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
129 * in microseconds for LE 1M PHY.
130 */
131 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS 40000
132 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_US \
133 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS)
134
135 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
136 * in microseconds for LE 1M PHY.
137 */
138 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS 140000
139 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_US \
140 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS)
141
142 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
143 * no HW TIFS auto-switch) in microseconds for LE 1M PHY.
144 */
145 /* 129.5 + 0.2 */
146 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS 129000
147 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_US \
148 HAL_RADIO_NS2US_CEIL( \
149 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS)
150
151 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
152 * in microseconds for LE 2M PHY.
153 */
154 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS 40000
155 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_US \
156 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS)
157
158 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
159 * in microseconds for LE 2M PHY.
160 */
161 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS 140000
162 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_US \
163 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS)
164
165 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
166 * no HW TIFS auto-switch) in microseconds for LE 2M PHY.
167 */
168 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS 129000
169 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_US \
170 HAL_RADIO_NS2US_CEIL( \
171 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS)
172
173 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
174 * in microseconds for LE Coded PHY [S2].
175 */
176 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS 40000
177 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_US \
178 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS)
179
180 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
181 * in microseconds for LE Coded PHY [S2].
182 */
183 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS 120000
184 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_US \
185 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS)
186
187 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode
188 * and no HW TIFS auto-switch) in microseconds for LE Coded PHY [S2].
189 */
190 /* 129.5 + 0.2 */
191 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS 130000
192 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_US \
193 HAL_RADIO_NS2US_CEIL( \
194 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS)
195
196 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
197 * in microseconds for LE Coded PHY [S8].
198 */
199 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS 40000
200 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_US \
201 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS)
202
203 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
204 * in microseconds for LE Coded PHY [S8].
205 */
206 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS 120000
207 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_US \
208 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS)
209
210 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
211 * no HW TIFS auto-switch) in microseconds for LE Coded PHY [S8].
212 */
213 /* 129.5 + 0.2 */
214 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS 130000
215 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_US \
216 HAL_RADIO_NS2US_CEIL( \
217 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS)
218
219 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_US 1
220 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_NS 1000
221
222 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_US 9
223 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_NS 9000
224 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_US 5
225 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_NS 5000
226 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_US 30
227 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_NS 30000
228 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_US 30
229 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_NS 30000
230
231 #if defined(CONFIG_BT_CTLR_RADIO_ENABLE_FAST)
232 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
233 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_US
234 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
235 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS
236
237 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
238 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_US
239 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
240 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS
241
242 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
243 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_US
244 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
245 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS
246
247 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
248 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_US
249 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
250 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS
251
252 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
253 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_US
254 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
255 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS
256
257 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
258 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_US
259 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
260 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS
261
262 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
263 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_US
264 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
265 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS
266
267 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
268 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_US
269 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
270 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS
271
272 #else /* !CONFIG_BT_CTLR_RADIO_ENABLE_FAST */
273 #if defined(CONFIG_BT_CTLR_TIFS_HW)
274 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
275 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_US
276 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
277 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS
278
279 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
280 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_US
281 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
282 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS
283
284 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
285 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_US
286 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
287 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS
288
289 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
290 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_US
291 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
292 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS
293
294 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
295 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_US
296 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
297 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS
298
299 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
300 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_US
301 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
302 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS
303
304 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
305 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_US
306 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
307 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS
308
309 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
310 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_US
311 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
312 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS
313
314 #else /* !CONFIG_BT_CTLR_TIFS_HW */
315 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
316 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_US
317 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
318 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS
319
320 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
321 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_US
322 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
323 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS
324
325 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
326 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_US
327 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
328 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS
329
330 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
331 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_US
332 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
333 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS
334
335 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
336 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_US
337 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
338 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS
339
340 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
341 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_US
342 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
343 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS
344
345 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
346 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_US
347 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
348 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS
349
350 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
351 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_US
352 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
353 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS
354 #endif /* !CONFIG_BT_CTLR_TIFS_HW */
355 #endif /* !CONFIG_BT_CTLR_RADIO_ENABLE_FAST */
356
357 /* HAL abstraction of Radio bitfields */
358 #define HAL_NRF_RADIO_EVENT_END NRF_RADIO_EVENT_END
359 #define HAL_RADIO_EVENTS_END EVENTS_END
360 #define HAL_RADIO_PUBLISH_END PUBLISH_END
361 #define HAL_NRF_RADIO_EVENT_PHYEND NRF_RADIO_EVENT_PHYEND
362 #define HAL_RADIO_EVENTS_PHYEND EVENTS_PHYEND
363 #define HAL_RADIO_PUBLISH_PHYEND PUBLISH_PHYEND
364 #define HAL_RADIO_INTENSET_DISABLED_Msk RADIO_INTENSET00_DISABLED_Msk
365 #define HAL_RADIO_SHORTS_TRX_END_DISABLE_Msk RADIO_SHORTS_PHYEND_DISABLE_Msk
366 #define HAL_RADIO_SHORTS_TRX_PHYEND_DISABLE_Msk RADIO_SHORTS_PHYEND_DISABLE_Msk
367 #define HAL_RADIO_CLEARPATTERN_CLEARPATTERN_Clear (1UL)
368
369 /* HAL abstraction of Radio IRQ number */
370 #define HAL_RADIO_IRQn RADIO_0_IRQn
371
372 /* SoC specific NRF_RADIO power-on reset value. Refer to Product Specification,
373 * RADIO Registers section for the documented reset values.
374 *
375 * NOTE: Only implementation used values defined here.
376 * In the future if MDK or nRFx header include these, use them instead.
377 */
378 #define HAL_RADIO_RESET_VALUE_DFEMODE 0x00000000UL
379 #define HAL_RADIO_RESET_VALUE_CTEINLINECONF 0x00002800UL
380 #define HAL_RADIO_RESET_VALUE_DATAWHITE 0x00890040UL
381
382 /* HAL abstraction of CCM h/w */
383 #define NRF_CCM NRF_CCM00
384 #define NRF_CCM_TASK_CRYPT NRF_CCM_TASK_START
385 #define EVENTS_ENDCRYPT EVENTS_END
386 #define INPTR IN.PTR
387 #define OUTPTR OUT.PTR
388 #define MICSTATUS MACSTATUS
389 #define CCM_INTENSET_ENDCRYPT_Msk CCM_INTENSET_END_Msk
390 #define CCM_INTENCLR_ENDCRYPT_Msk CCM_INTENCLR_END_Msk
391 #define CCM_MODE_DATARATE_125Kbps CCM_MODE_DATARATE_125Kbit
392 #define CCM_MODE_DATARATE_500Kbps CCM_MODE_DATARATE_500Kbit
393 #define CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbit
394
hal_radio_reset(void)395 static inline void hal_radio_reset(void)
396 {
397 /* TODO: Add any required setup for each radio event
398 */
399 }
400
hal_radio_stop(void)401 static inline void hal_radio_stop(void)
402 {
403 /* TODO: Add any required cleanup of actions taken in hal_radio_reset()
404 */
405 }
406
hal_radio_ram_prio_setup(void)407 static inline void hal_radio_ram_prio_setup(void)
408 {
409 /* TODO */
410 }
411
hal_radio_phy_mode_get(uint8_t phy,uint8_t flags)412 static inline uint32_t hal_radio_phy_mode_get(uint8_t phy, uint8_t flags)
413 {
414 uint32_t mode;
415
416 switch (phy) {
417 case BIT(0):
418 default:
419 mode = RADIO_MODE_MODE_Ble_1Mbit;
420 break;
421
422 case BIT(1):
423 mode = RADIO_MODE_MODE_Ble_2Mbit;
424 break;
425
426 #if defined(CONFIG_BT_CTLR_PHY_CODED)
427 case BIT(2):
428 if (flags & 0x01) {
429 mode = RADIO_MODE_MODE_Ble_LR125Kbit;
430 } else {
431 mode = RADIO_MODE_MODE_Ble_LR500Kbit;
432 }
433 break;
434 #endif /* CONFIG_BT_CTLR_PHY_CODED */
435 }
436
437 return mode;
438 }
439
hal_radio_tx_power_max_get(void)440 static inline int8_t hal_radio_tx_power_max_get(void)
441 {
442 return 8; /* +8 dBm */
443 }
444
hal_radio_tx_power_min_get(void)445 static inline int8_t hal_radio_tx_power_min_get(void)
446 {
447 return -46; /* -46 dBm */
448 }
449
hal_radio_tx_power_floor(int8_t tx_power_lvl)450 static inline int8_t hal_radio_tx_power_floor(int8_t tx_power_lvl)
451 {
452 if (tx_power_lvl >= 8) {
453 return 8;
454 }
455
456 if (tx_power_lvl >= 7) {
457 return 7;
458 }
459
460 if (tx_power_lvl >= 6) {
461 return 6;
462 }
463
464 if (tx_power_lvl >= 5) {
465 return 5;
466 }
467
468 if (tx_power_lvl >= 4) {
469 return 4;
470 }
471
472 if (tx_power_lvl >= 3) {
473 return 3;
474 }
475
476 if (tx_power_lvl >= 2) {
477 return 2;
478 }
479
480 if (tx_power_lvl >= 1) {
481 return 1;
482 }
483
484 if (tx_power_lvl >= 0) {
485 return 0;
486 }
487
488 if (tx_power_lvl >= -1) {
489 return -1;
490 }
491
492 if (tx_power_lvl >= -2) {
493 return -2;
494 }
495
496 if (tx_power_lvl >= -3) {
497 return -3;
498 }
499
500 if (tx_power_lvl >= -4) {
501 return -4;
502 }
503
504 if (tx_power_lvl >= -5) {
505 return -5;
506 }
507
508 if (tx_power_lvl >= -6) {
509 return -6;
510 }
511
512 if (tx_power_lvl >= -7) {
513 return -7;
514 }
515
516 if (tx_power_lvl >= -8) {
517 return -8;
518 }
519
520 if (tx_power_lvl >= -9) {
521 return -9;
522 }
523
524 if (tx_power_lvl >= -10) {
525 return -10;
526 }
527
528 if (tx_power_lvl >= -12) {
529 return -12;
530 }
531
532 if (tx_power_lvl >= -14) {
533 return -14;
534 }
535
536 if (tx_power_lvl >= -16) {
537 return -16;
538 }
539
540 if (tx_power_lvl >= -20) {
541 return -20;
542 }
543
544 if (tx_power_lvl >= -26) {
545 return -26;
546 }
547
548 if (tx_power_lvl >= -40) {
549 return -40;
550 }
551
552 return -46;
553 }
554
hal_radio_tx_power_value(int8_t tx_power_lvl)555 static inline uint32_t hal_radio_tx_power_value(int8_t tx_power_lvl)
556 {
557 if (tx_power_lvl >= 8) {
558 return RADIO_TXPOWER_TXPOWER_Pos8dBm;
559 }
560
561 if (tx_power_lvl >= 7) {
562 return RADIO_TXPOWER_TXPOWER_Pos7dBm;
563 }
564
565 if (tx_power_lvl >= 6) {
566 return RADIO_TXPOWER_TXPOWER_Pos6dBm;
567 }
568
569 if (tx_power_lvl >= 5) {
570 return RADIO_TXPOWER_TXPOWER_Pos5dBm;
571 }
572
573 if (tx_power_lvl >= 4) {
574 return RADIO_TXPOWER_TXPOWER_Pos4dBm;
575 }
576
577 if (tx_power_lvl >= 3) {
578 return RADIO_TXPOWER_TXPOWER_Pos3dBm;
579 }
580
581 if (tx_power_lvl >= 2) {
582 return RADIO_TXPOWER_TXPOWER_Pos2dBm;
583 }
584
585 if (tx_power_lvl >= 1) {
586 return RADIO_TXPOWER_TXPOWER_Pos1dBm;
587 }
588
589 if (tx_power_lvl >= 0) {
590 return RADIO_TXPOWER_TXPOWER_0dBm;
591 }
592
593 if (tx_power_lvl >= -1) {
594 return RADIO_TXPOWER_TXPOWER_Neg1dBm;
595 }
596
597 if (tx_power_lvl >= -2) {
598 return RADIO_TXPOWER_TXPOWER_Neg2dBm;
599 }
600
601 if (tx_power_lvl >= -3) {
602 return RADIO_TXPOWER_TXPOWER_Neg3dBm;
603 }
604
605 if (tx_power_lvl >= -4) {
606 return RADIO_TXPOWER_TXPOWER_Neg4dBm;
607 }
608
609 if (tx_power_lvl >= -5) {
610 return RADIO_TXPOWER_TXPOWER_Neg5dBm;
611 }
612
613 if (tx_power_lvl >= -6) {
614 return RADIO_TXPOWER_TXPOWER_Neg6dBm;
615 }
616
617 if (tx_power_lvl >= -7) {
618 return RADIO_TXPOWER_TXPOWER_Neg7dBm;
619 }
620
621 if (tx_power_lvl >= -8) {
622 return RADIO_TXPOWER_TXPOWER_Neg8dBm;
623 }
624
625 if (tx_power_lvl >= -9) {
626 return RADIO_TXPOWER_TXPOWER_Neg9dBm;
627 }
628
629 if (tx_power_lvl >= -10) {
630 return RADIO_TXPOWER_TXPOWER_Neg10dBm;
631 }
632
633 if (tx_power_lvl >= -12) {
634 return RADIO_TXPOWER_TXPOWER_Neg12dBm;
635 }
636
637 if (tx_power_lvl >= -14) {
638 return RADIO_TXPOWER_TXPOWER_Neg14dBm;
639 }
640
641 if (tx_power_lvl >= -16) {
642 return RADIO_TXPOWER_TXPOWER_Neg16dBm;
643 }
644
645 if (tx_power_lvl >= -20) {
646 return RADIO_TXPOWER_TXPOWER_Neg20dBm;
647 }
648
649 #if defined(RADIO_TXPOWER_TXPOWER_Neg26dBm)
650 if (tx_power_lvl >= -26) {
651 return RADIO_TXPOWER_TXPOWER_Neg26dBm;
652 }
653 #endif
654
655 #if defined(RADIO_TXPOWER_TXPOWER_Neg28dBm)
656 if (tx_power_lvl >= -28) {
657 return RADIO_TXPOWER_TXPOWER_Neg28dBm;
658 }
659 #endif
660
661 if (tx_power_lvl >= -40) {
662 return RADIO_TXPOWER_TXPOWER_Neg40dBm;
663 }
664
665 return RADIO_TXPOWER_TXPOWER_Neg46dBm;
666 }
667
hal_radio_tx_ready_delay_us_get(uint8_t phy,uint8_t flags)668 static inline uint32_t hal_radio_tx_ready_delay_us_get(uint8_t phy, uint8_t flags)
669 {
670 switch (phy) {
671 default:
672 case BIT(0):
673 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US;
674 case BIT(1):
675 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US;
676
677 #if defined(CONFIG_BT_CTLR_PHY_CODED)
678 case BIT(2):
679 if (flags & 0x01) {
680 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US;
681 } else {
682 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US;
683 }
684 #endif /* CONFIG_BT_CTLR_PHY_CODED */
685 }
686 }
687
hal_radio_rx_ready_delay_us_get(uint8_t phy,uint8_t flags)688 static inline uint32_t hal_radio_rx_ready_delay_us_get(uint8_t phy, uint8_t flags)
689 {
690 switch (phy) {
691 default:
692 case BIT(0):
693 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US;
694 case BIT(1):
695 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US;
696
697 #if defined(CONFIG_BT_CTLR_PHY_CODED)
698 case BIT(2):
699 if (flags & 0x01) {
700 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US;
701 } else {
702 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US;
703 }
704 #endif /* CONFIG_BT_CTLR_PHY_CODED */
705 }
706 }
707
hal_radio_tx_chain_delay_us_get(uint8_t phy,uint8_t flags)708 static inline uint32_t hal_radio_tx_chain_delay_us_get(uint8_t phy, uint8_t flags)
709 {
710 ARG_UNUSED(phy);
711 ARG_UNUSED(flags);
712 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_US;
713 }
714
hal_radio_rx_chain_delay_us_get(uint8_t phy,uint8_t flags)715 static inline uint32_t hal_radio_rx_chain_delay_us_get(uint8_t phy, uint8_t flags)
716 {
717 switch (phy) {
718 default:
719 case BIT(0):
720 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_US;
721 case BIT(1):
722 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_US;
723
724 #if defined(CONFIG_BT_CTLR_PHY_CODED)
725 case BIT(2):
726 if (flags & 0x01) {
727 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_US;
728 } else {
729 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_US;
730 }
731 #endif /* CONFIG_BT_CTLR_PHY_CODED */
732 }
733 }
734
hal_radio_tx_ready_delay_ns_get(uint8_t phy,uint8_t flags)735 static inline uint32_t hal_radio_tx_ready_delay_ns_get(uint8_t phy, uint8_t flags)
736 {
737 switch (phy) {
738 default:
739 case BIT(0):
740 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS;
741 case BIT(1):
742 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS;
743
744 #if defined(CONFIG_BT_CTLR_PHY_CODED)
745 case BIT(2):
746 if (flags & 0x01) {
747 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS;
748 } else {
749 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS;
750 }
751 #endif /* CONFIG_BT_CTLR_PHY_CODED */
752 }
753 }
754
hal_radio_rx_ready_delay_ns_get(uint8_t phy,uint8_t flags)755 static inline uint32_t hal_radio_rx_ready_delay_ns_get(uint8_t phy, uint8_t flags)
756 {
757 switch (phy) {
758 default:
759 case BIT(0):
760 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS;
761 case BIT(1):
762 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS;
763
764 #if defined(CONFIG_BT_CTLR_PHY_CODED)
765 case BIT(2):
766 if (flags & 0x01) {
767 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS;
768 } else {
769 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS;
770 }
771 #endif /* CONFIG_BT_CTLR_PHY_CODED */
772 }
773 }
774
hal_radio_tx_chain_delay_ns_get(uint8_t phy,uint8_t flags)775 static inline uint32_t hal_radio_tx_chain_delay_ns_get(uint8_t phy, uint8_t flags)
776 {
777 ARG_UNUSED(phy);
778 ARG_UNUSED(flags);
779 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_NS;
780 }
781
hal_radio_rx_chain_delay_ns_get(uint8_t phy,uint8_t flags)782 static inline uint32_t hal_radio_rx_chain_delay_ns_get(uint8_t phy, uint8_t flags)
783 {
784 switch (phy) {
785 default:
786 case BIT(0):
787 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_NS;
788 case BIT(1):
789 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_NS;
790
791 #if defined(CONFIG_BT_CTLR_PHY_CODED)
792 case BIT(2):
793 if (flags & 0x01) {
794 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_NS;
795 } else {
796 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_NS;
797 }
798 #endif /* CONFIG_BT_CTLR_PHY_CODED */
799 }
800 }
801
