1 /*
2 * Copyright (c) 2023 Nordic Semiconductor ASA
3 * Copyright (c) 2019 Ioannis Glaropoulos
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 /* Use the NRF_RTC instance for coarse radio event scheduling */
9 #define NRF_RTC NRF_RTC0
10
11 /* Override EVENT_TIMER_ID from 4 to 0, as nRF5340 does not have 4 timer
12 * instances.
13 */
14 #if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
15 #undef EVENT_TIMER_ID
16 #define EVENT_TIMER_ID 0
17
18 #undef EVENT_TIMER
19 #define EVENT_TIMER _CONCAT(NRF_TIMER, EVENT_TIMER_ID)
20
21 #undef SW_SWITCH_TIMER
22 #define SW_SWITCH_TIMER EVENT_TIMER
23 #endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
24
25 /* HAL abstraction of event timer prescaler value */
26 #define HAL_EVENT_TIMER_PRESCALER_VALUE 4U
27
28 /* NRF Radio HW timing constants
29 * - provided in US and NS (for higher granularity)
30 * - based on the timings configured in the HW models, which are based
31 * on the product specification
32 * - Note that this timings are approx. the same as in the real HW,
33 * but tend to be rounded to the nearest microsecond
34 */
35
36 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
37 * in microseconds for LE 1M PHY.
38 */
39 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_FAST_NS 41000
40 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_FAST_US \
41 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_FAST_NS)
42
43 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
44 * in microseconds for LE 1M PHY.
45 */
46 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_NS 141000
47 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_US \
48 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_NS)
49
50 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode
51 * and no HW TIFS auto-switch) in microseconds for LE 1M PHY.
52 */
53 /* 129.5 + 0.8 */
54 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS 130000
55 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_US \
56 HAL_RADIO_NS2US_ROUND( \
57 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS)
58
59 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
60 * in microseconds for LE 2M PHY.
61 */
62 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_FAST_NS 40000
63 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_FAST_US \
64 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_FAST_NS)
65
66 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
67 * in microseconds for LE 2M PHY.
68 */
69 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_NS 140000
70 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_US \
71 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_NS)
72
73 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
74 * no HW TIFS auto-switch) in microseconds for LE 2M PHY.
75 */
76 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS 129000
77 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_US \
78 HAL_RADIO_NS2US_ROUND( \
79 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS)
80
81 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
82 * in microseconds for LE CODED PHY [S2].
83 */
84 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_FAST_NS 42000
85 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_FAST_US \
86 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_FAST_NS)
87
88 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
89 * in microseconds for LE 2M PHY [S2].
90 */
91 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_NS 132000
92 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_US \
93 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_NS)
94
95 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
96 * no HW TIFS auto-switch) in microseconds for LE 2M PHY [S2].
97 */
98 /* 129.5 + 2.2 */
99 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS 132000
100 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_US \
101 HAL_RADIO_NS2US_ROUND( \
102 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS)
103
104 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
105 * in microseconds for LE CODED PHY [S8].
106 */
107 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_FAST_NS 42000
108 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_FAST_US \
109 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_FAST_NS)
110 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
111 * in microseconds for LE 2M PHY [S8].
112 */
113 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_NS 122000
114 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_US \
115 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_NS)
116
117 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
118 * no HW TIFS auto-switch) in microseconds for LE 2M PHY [S8].
119 */
120 /* 129.5 + 2.2 */
121 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS 132000
122 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_US \
123 HAL_RADIO_NS2US_ROUND( \
124 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS)
125
126 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
127 * in microseconds for LE 1M PHY.
128 */
129 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_FAST_NS 40000
130 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_FAST_US \
131 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_FAST_NS)
132
133 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
134 * in microseconds for LE 1M PHY.
135 */
136 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_NS 140000
137 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_US \
138 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_NS)
139
140 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
141 * no HW TIFS auto-switch) in microseconds for LE 1M PHY.
142 */
143 /* 129.5 + 0.2 */
144 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS 129000
145 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_US \
146 HAL_RADIO_NS2US_CEIL( \
147 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS)
148
149 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
150 * in microseconds for LE 2M PHY.
151 */
152 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_FAST_NS 40000
153 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_FAST_US \
154 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_FAST_NS)
155
156 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
157 * in microseconds for LE 2M PHY.
158 */
159 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_NS 140000
160 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_US \
161 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_NS)
162
163 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
164 * no HW TIFS auto-switch) in microseconds for LE 2M PHY.
165 */
166 /* 129.5 + 0.2 */
167 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS 129000
168 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_US \
169 HAL_RADIO_NS2US_CEIL( \
170 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS)
171
172 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
173 * in microseconds for LE Coded PHY [S2].
174 */
175 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_FAST_NS 40000
176 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_FAST_US \
177 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_FAST_NS)
178
179 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
180 * in microseconds for LE Coded PHY [S2].
181 */
182 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_NS 120000
183 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_US \
184 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_NS)
185
186 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode
187 * and no HW TIFS auto-switch) in microseconds for LE Coded PHY [S2].
188 */
189 /* 129.5 + 0.2 */
190 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS 130000
191 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_US \
192 HAL_RADIO_NS2US_CEIL( \
193 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS)
194
195 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
196 * in microseconds for LE Coded PHY [S8].
197 */
198 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_FAST_NS 40000
199 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_FAST_US \
200 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_FAST_NS)
201
202 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
203 * in microseconds for LE Coded PHY [S8].
204 */
205 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_NS 120000
206 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_US \
207 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_NS)
208
209 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
210 * no HW TIFS auto-switch) in microseconds for LE Coded PHY [S8].
211 */
212 /* 129.5 + 0.2 */
213 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS 130000
214 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_US \
215 HAL_RADIO_NS2US_CEIL( \
216 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS)
217
218 #define HAL_RADIO_NRF5340_TX_CHAIN_DELAY_NS 1000
219 #define HAL_RADIO_NRF5340_TX_CHAIN_DELAY_US \
220 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF5340_TX_CHAIN_DELAY_NS)
221
222 #define HAL_RADIO_NRF5340_RX_CHAIN_DELAY_1M_US 9
223 #define HAL_RADIO_NRF5340_RX_CHAIN_DELAY_1M_NS 9000
224 #define HAL_RADIO_NRF5340_RX_CHAIN_DELAY_2M_US 5
225 #define HAL_RADIO_NRF5340_RX_CHAIN_DELAY_2M_NS 5000
226 #define HAL_RADIO_NRF5340_RX_CHAIN_DELAY_S2_US 30
227 #define HAL_RADIO_NRF5340_RX_CHAIN_DELAY_S2_NS 30000
228 #define HAL_RADIO_NRF5340_RX_CHAIN_DELAY_S8_US 30
229 #define HAL_RADIO_NRF5340_RX_CHAIN_DELAY_S8_NS 30000
230
231 #if defined(CONFIG_BT_CTLR_RADIO_ENABLE_FAST)
232 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_US \
233 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_FAST_US
234 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_NS \
235 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_FAST_NS
236
237 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_US \
238 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_FAST_US
239 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_NS \
240 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_FAST_NS
241
242 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_US \
243 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_FAST_US
244 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_NS \
245 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_FAST_NS
246
247 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_US \
248 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_FAST_US
249 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_NS \
250 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_FAST_NS
251
252 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_US \
253 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_FAST_US
254 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_NS \
255 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_FAST_NS
256
257 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_US \
258 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_FAST_US
259 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_NS \
260 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_FAST_NS
261
262 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_US \
263 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_FAST_US
264 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_NS \
265 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_FAST_NS
266
267 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_US \
268 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_FAST_US
269 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_NS \
270 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_FAST_NS
271
272 #else /* !CONFIG_BT_CTLR_RADIO_ENABLE_FAST */
273 #if defined(CONFIG_BT_CTLR_TIFS_HW)
274 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_US \
275 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_US
276 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_NS \
277 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_NS
278
279 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_US \
280 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_US
281 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_NS \
282 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_NS
283
284 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_US \
285 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_US
286 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_NS \
287 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_NS
288
289 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_US \
290 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_US
291 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_NS \
292 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_NS
293
294 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_US \
295 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_US
296 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_NS \
297 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_NS
298
299 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_US \
300 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_US
301 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_NS \
302 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_NS
303
304 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_US \
305 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_US
306 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_NS \
307 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_NS
308
309 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_US \
310 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_US
311 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_NS \
312 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_NS
313
314 #else /* !CONFIG_BT_CTLR_TIFS_HW */
315 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_US \
316 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_US
317 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_NS \
318 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS
319
320 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_US \
321 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_US
322 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_NS \
323 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS
324
325 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_US \
326 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_US
327 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_NS \
328 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS
329
330 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_US \
331 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_US
332 #define HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_NS \
333 HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS
334
335 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_US \
336 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_US
337 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_NS \
338 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS
339
340 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_US \
341 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_US
342 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_NS \
343 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS
344
345 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_US \
346 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_US
347 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_NS \
348 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS
349
350 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_US \
351 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_US
352 #define HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_NS \
353 HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS
354
355 #endif /* !CONFIG_BT_CTLR_TIFS_HW */
356 #endif /* !CONFIG_BT_CTLR_RADIO_ENABLE_FAST */
357
358 /* nRF5340 supports +3dBm Tx Power using high voltage request, define +3dBm
359 * value for Controller use.
360 */
361 #ifndef RADIO_TXPOWER_TXPOWER_Pos3dBm
362 #define RADIO_TXPOWER_TXPOWER_Pos3dBm (0x03UL)
363 #endif
364
365 /* HAL abstraction of Radio bitfields */
366 #define HAL_NRF_RADIO_EVENT_END NRF_RADIO_EVENT_END
367 #define HAL_RADIO_EVENTS_END EVENTS_END
368 #define HAL_RADIO_PUBLISH_END PUBLISH_END
369 #define HAL_NRF_RADIO_EVENT_PHYEND NRF_RADIO_EVENT_PHYEND
370 #define HAL_RADIO_EVENTS_PHYEND EVENTS_PHYEND
371 #define HAL_RADIO_PUBLISH_PHYEND PUBLISH_PHYEND
372 #define HAL_RADIO_INTENSET_DISABLED_Msk RADIO_INTENSET_DISABLED_Msk
373 #define HAL_RADIO_SHORTS_TRX_END_DISABLE_Msk RADIO_SHORTS_END_DISABLE_Msk
374 #define HAL_RADIO_SHORTS_TRX_PHYEND_DISABLE_Msk RADIO_SHORTS_PHYEND_DISABLE_Msk
375 #define HAL_RADIO_CLEARPATTERN_CLEARPATTERN_Clear RADIO_CLEARPATTERN_CLEARPATTERN_Clear
376
377 /* HAL abstraction of Radio IRQ number */
378 #define HAL_RADIO_IRQn RADIO_IRQn
379
380 /* SoC specific NRF_RADIO power-on reset value. Refer to Product Specification,
381 * RADIO Registers section for the documented reset values.
382 *
383 * NOTE: Only implementation used values defined here.
384 * In the future if MDK or nRFx header include these, use them instead.
385 */
386 #define HAL_RADIO_RESET_VALUE_DFEMODE 0x00000000UL
387 #define HAL_RADIO_RESET_VALUE_CTEINLINECONF 0x00002800UL
388
389 static inline void hal_radio_tx_power_high_voltage_clear(void);
390
hal_radio_reset(void)391 static inline void hal_radio_reset(void)
392 {
393 }
394
hal_radio_stop(void)395 static inline void hal_radio_stop(void)
396 {
397 /* If +3dBm Tx power was used, then turn off high voltage when radio not
398 * used.
399 */
400 hal_radio_tx_power_high_voltage_clear();
401 }
402
hal_radio_ram_prio_setup(void)403 static inline void hal_radio_ram_prio_setup(void)
404 {
405 }
406
hal_radio_phy_mode_get(uint8_t phy,uint8_t flags)407 static inline uint32_t hal_radio_phy_mode_get(uint8_t phy, uint8_t flags)
408 {
409 uint32_t mode;
410
411 switch (phy) {
412 case BIT(0):
413 default:
414 mode = RADIO_MODE_MODE_Ble_1Mbit;
415 break;
416
417 case BIT(1):
418 mode = RADIO_MODE_MODE_Ble_2Mbit;
419 break;
420
421 #if defined(CONFIG_BT_CTLR_PHY_CODED)
422 case BIT(2):
423 if (flags & 0x01) {
424 mode = RADIO_MODE_MODE_Ble_LR125Kbit;
425 } else {
426 mode = RADIO_MODE_MODE_Ble_LR500Kbit;
427 }
428 break;
429 #endif /* CONFIG_BT_CTLR_PHY_CODED */
430 }
431
432 return mode;
433 }
434
hal_radio_tx_power_max_get(void)435 static inline uint32_t hal_radio_tx_power_max_get(void)
436 {
437 return RADIO_TXPOWER_TXPOWER_0dBm;
438 }
439
hal_radio_tx_power_min_get(void)440 static inline uint32_t hal_radio_tx_power_min_get(void)
441 {
442 return RADIO_TXPOWER_TXPOWER_Neg40dBm;
443 }
444
hal_radio_tx_power_floor(int8_t tx_power_lvl)445 static inline uint32_t hal_radio_tx_power_floor(int8_t tx_power_lvl)
446 {
447 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_0dBm) {
448 return RADIO_TXPOWER_TXPOWER_0dBm;
449 }
450
451 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg1dBm) {
452 return RADIO_TXPOWER_TXPOWER_Neg1dBm;
453 }
454
455 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg2dBm) {
456 return RADIO_TXPOWER_TXPOWER_Neg2dBm;
457 }
458
459 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg3dBm) {
460 return RADIO_TXPOWER_TXPOWER_Neg3dBm;
461 }
462
463 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg4dBm) {
464 return RADIO_TXPOWER_TXPOWER_Neg4dBm;
465 }
466
467 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg5dBm) {
468 return RADIO_TXPOWER_TXPOWER_Neg5dBm;
469 }
470
471 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg6dBm) {
472 return RADIO_TXPOWER_TXPOWER_Neg6dBm;
473 }
474
475 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg7dBm) {
476 return RADIO_TXPOWER_TXPOWER_Neg7dBm;
477 }
478
479 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg8dBm) {
480 return RADIO_TXPOWER_TXPOWER_Neg8dBm;
481 }
482
483 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg12dBm) {
484 return RADIO_TXPOWER_TXPOWER_Neg12dBm;
485 }
486
487 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg16dBm) {
488 return RADIO_TXPOWER_TXPOWER_Neg16dBm;
489 }
490
491 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg20dBm) {
492 return RADIO_TXPOWER_TXPOWER_Neg20dBm;
493 }
494
495 /* Note: The -30 dBm power level is deprecated so ignore it! */
496 return RADIO_TXPOWER_TXPOWER_Neg40dBm;
497 }
498
hal_radio_tx_power_high_voltage_set(int8_t tx_power_lvl)499 static inline void hal_radio_tx_power_high_voltage_set(int8_t tx_power_lvl)
500 {
501 if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Pos3dBm) {
502 nrf_vreqctrl_radio_high_voltage_set(NRF_VREQCTRL, true);
503 }
504 }
505
hal_radio_tx_power_high_voltage_clear(void)506 static inline void hal_radio_tx_power_high_voltage_clear(void)
507 {
508 nrf_vreqctrl_radio_high_voltage_set(NRF_VREQCTRL, false);
509 }
510
hal_radio_tx_ready_delay_us_get(uint8_t phy,uint8_t flags)511 static inline uint32_t hal_radio_tx_ready_delay_us_get(uint8_t phy, uint8_t flags)
512 {
513 ARG_UNUSED(flags);
514
515 switch (phy) {
516 default:
517 case BIT(0):
518 return HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_US;
519 case BIT(1):
520 return HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_US;
521
522 #if defined(CONFIG_BT_CTLR_PHY_CODED)
523 case BIT(2):
524 if (flags & 0x01) {
525 return HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_US;
526 } else {
527 return HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_US;
528 }
529 #endif /* CONFIG_BT_CTLR_PHY_CODED */
530 }
531 }
532
hal_radio_rx_ready_delay_us_get(uint8_t phy,uint8_t flags)533 static inline uint32_t hal_radio_rx_ready_delay_us_get(uint8_t phy, uint8_t flags)
534 {
535 ARG_UNUSED(flags);
536
537 switch (phy) {
538 default:
539 case BIT(0):
540 return HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_US;
541 case BIT(1):
542 return HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_US;
543
544 #if defined(CONFIG_BT_CTLR_PHY_CODED)
545 case BIT(2):
546 if (flags & 0x01) {
547 return HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_US;
548 } else {
549 return HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_US;
550 }
551 #endif /* CONFIG_BT_CTLR_PHY_CODED */
552 }
553 }
554
hal_radio_tx_chain_delay_us_get(uint8_t phy,uint8_t flags)555 static inline uint32_t hal_radio_tx_chain_delay_us_get(uint8_t phy, uint8_t flags)
556 {
557 ARG_UNUSED(phy);
558 ARG_UNUSED(flags);
559
560 return HAL_RADIO_NRF5340_TX_CHAIN_DELAY_US;
561 }
562
hal_radio_rx_chain_delay_us_get(uint8_t phy,uint8_t flags)563 static inline uint32_t hal_radio_rx_chain_delay_us_get(uint8_t phy, uint8_t flags)
564 {
565 ARG_UNUSED(flags);
566
567 switch (phy) {
568 default:
569 case BIT(0):
570 return HAL_RADIO_NRF5340_RX_CHAIN_DELAY_1M_US;
571 case BIT(1):
572 return HAL_RADIO_NRF5340_RX_CHAIN_DELAY_2M_US;
573
574 #if defined(CONFIG_BT_CTLR_PHY_CODED)
575 case BIT(2):
576 if (flags & 0x01) {
577 return HAL_RADIO_NRF5340_RX_CHAIN_DELAY_S8_US;
578 } else {
579 return HAL_RADIO_NRF5340_RX_CHAIN_DELAY_S2_US;
580 }
581 #endif /* CONFIG_BT_CTLR_PHY_CODED */
582 }
583 }
584
hal_radio_tx_ready_delay_ns_get(uint8_t phy,uint8_t flags)585 static inline uint32_t hal_radio_tx_ready_delay_ns_get(uint8_t phy, uint8_t flags)
586 {
587 ARG_UNUSED(flags);
588
589 switch (phy) {
590 default:
591 case BIT(0):
592 return HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_1M_NS;
593 case BIT(1):
594 return HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_2M_NS;
595
596 #if defined(CONFIG_BT_CTLR_PHY_CODED)
597 case BIT(2):
598 if (flags & 0x01) {
599 return HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S8_NS;
600 } else {
601 return HAL_RADIO_NRF5340_TXEN_TXIDLE_TX_S2_NS;
602 }
603 #endif /* CONFIG_BT_CTLR_PHY_CODED */
604 }
605 }
606
hal_radio_rx_ready_delay_ns_get(uint8_t phy,uint8_t flags)607 static inline uint32_t hal_radio_rx_ready_delay_ns_get(uint8_t phy, uint8_t flags)
608 {
609 ARG_UNUSED(flags);
610
611 switch (phy) {
612 default:
613 case BIT(0):
614 return HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_1M_NS;
615 case BIT(1):
616 return HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_2M_NS;
617
618 #if defined(CONFIG_BT_CTLR_PHY_CODED)
619 case BIT(2):
620 if (flags & 0x01) {
621 return HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S8_NS;
622 } else {
623 return HAL_RADIO_NRF5340_RXEN_RXIDLE_RX_S2_NS;
624 }
625 #endif /* CONFIG_BT_CTLR_PHY_CODED */
626 }
627 }
628
hal_radio_tx_chain_delay_ns_get(uint8_t phy,uint8_t flags)629 static inline uint32_t hal_radio_tx_chain_delay_ns_get(uint8_t phy, uint8_t flags)
630 {
631 ARG_UNUSED(phy);
632 ARG_UNUSED(flags);
633
634 return HAL_RADIO_NRF5340_TX_CHAIN_DELAY_NS;
635 }
636
hal_radio_rx_chain_delay_ns_get(uint8_t phy,uint8_t flags)637 static inline uint32_t hal_radio_rx_chain_delay_ns_get(uint8_t phy, uint8_t flags)
638 {
639 ARG_UNUSED(flags);
640
641 switch (phy) {
642 default:
643 case BIT(0):
644 return HAL_RADIO_NRF5340_RX_CHAIN_DELAY_1M_NS;
645 case BIT(1):
646 return HAL_RADIO_NRF5340_RX_CHAIN_DELAY_2M_NS;
647
648 #if defined(CONFIG_BT_CTLR_PHY_CODED)
649 case BIT(2):
650 if (flags & 0x01) {
651 return HAL_RADIO_NRF5340_RX_CHAIN_DELAY_S8_NS;
652 } else {
653 return HAL_RADIO_NRF5340_RX_CHAIN_DELAY_S2_NS;
654 }
655 #endif /* CONFIG_BT_CTLR_PHY_CODED */
656 }
657 }
658
