1 /* 2 * Copyright (c) 2021-2024 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /******************************************************************************* 8 * Enable Radio on Event Timer tick: 9 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task. 10 */ 11 #define HAL_RADIO_ENABLE_TX_ON_TICK_PPI 9 12 #define HAL_RADIO_ENABLE_RX_ON_TICK_PPI 9 13 14 /******************************************************************************* 15 * Capture event timer on Address reception: 16 * wire the RADIO EVENTS_ADDRESS event to the 17 * EVENT_TIMER TASKS_CAPTURE[<address timer>] task. 18 */ 19 #define HAL_RADIO_RECV_TIMEOUT_CANCEL_PPI 11 20 21 /******************************************************************************* 22 * Disable Radio on HCTO: 23 * wire the EVENT_TIMER EVENTS_COMPARE[<HCTO timer>] event 24 * to the RADIO TASKS_DISABLE task. 25 */ 26 #define HAL_RADIO_DISABLE_ON_HCTO_PPI 12 27 28 /******************************************************************************* 29 * Capture event timer on Radio end: 30 * wire the RADIO EVENTS_END event to the 31 * EVENT_TIMER TASKS_CAPTURE[<radio end timer>] task. 32 */ 33 #define HAL_RADIO_END_TIME_CAPTURE_PPI 13 34 35 /******************************************************************************* 36 * Start event timer on RTC tick: 37 * wire the RTC0 EVENTS_COMPARE[2] event to EVENT_TIMER TASKS_START task. 38 */ 39 #define HAL_EVENT_TIMER_START_PPI 8 40 #define HAL_PPIB_SEND_EVENT_TIMER_START_PPI \ 41 _CONCAT(NRF_PPIB_TASK_SEND_, HAL_EVENT_TIMER_START_PPI) 42 #define HAL_PPIB_RECEIVE_EVENT_TIMER_START_PPI \ 43 _CONCAT(NRF_PPIB_EVENT_RECEIVE_, HAL_EVENT_TIMER_START_PPI) 44 45 /******************************************************************************* 46 * Capture event timer on Radio ready: 47 * wire the RADIO EVENTS_READY event to the 48 * EVENT_TIMER TASKS_CAPTURE[<radio ready timer>] task. 49 */ 50 #define HAL_RADIO_READY_TIME_CAPTURE_PPI 10 51 52 /******************************************************************************* 53 * Trigger encryption task upon address reception: 54 * wire the RADIO EVENTS_ADDRESS event to the CCM TASKS_CRYPT task. 55 * 56 * Note: we do not need an additional PPI, since we have already set up 57 * a PPI to publish RADIO ADDRESS event. 58 * Note: For nRF54L, CCM is started on RADIO PAYLOAD, hence need an explicit 59 * PPI channel. 60 */ 61 #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX) 62 #define HAL_TRIGGER_CRYPT_PPI 7 63 #else /* CONFIG_SOC_COMPATIBLE_NRF54LX */ 64 #define HAL_TRIGGER_CRYPT_PPI HAL_RADIO_RECV_TIMEOUT_CANCEL_PPI 65 #endif /* CONFIG_SOC_COMPATIBLE_NRF54LX */ 66 #define HAL_PPIB_SEND_TRIGGER_CRYPT_PPI \ 67 _CONCAT(NRF_PPIB_TASK_SEND_, HAL_TRIGGER_CRYPT_PPI) 68 #define HAL_PPIB_RECEIVE_TRIGGER_CRYPT_PPI \ 69 _CONCAT(NRF_PPIB_EVENT_RECEIVE_, HAL_TRIGGER_CRYPT_PPI) 70 71 /******************************************************************************* 72 * Trigger automatic address resolution on Bit counter match: 73 * wire the RADIO EVENTS_BCMATCH event to the AAR TASKS_START task. 74 */ 75 #define HAL_TRIGGER_AAR_PPI 6 76 77 #if defined(CONFIG_BT_CTLR_PHY_CODED) && \ 78 defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED) 79 /******************************************************************************* 80 * Trigger Radio Rate override upon Rateboost event. 81 */ 82 #define HAL_TRIGGER_RATEOVERRIDE_PPI 3 83 #endif /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */ 84 85 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || defined(HAL_RADIO_GPIO_HAVE_LNA_PIN) 86 /******************************************************************************/ 87 #define HAL_ENABLE_PALNA_PPI 2 88 89 #if defined(HAL_RADIO_FEM_IS_NRF21540) 90 #define HAL_DISABLE_PALNA_PPI 0 91 #else 92 #define HAL_DISABLE_PALNA_PPI HAL_ENABLE_PALNA_PPI 93 #endif 94 95 #define HAL_ENABLE_FEM_PPI 1 96 #define HAL_DISABLE_FEM_PPI HAL_DISABLE_PALNA_PPI 97 98 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN || HAL_RADIO_GPIO_HAVE_LNA_PIN */ 99 100 /******************************************************************************/ 101 #if !defined(CONFIG_BT_CTLR_TIFS_HW) 102 /* DPPI setup used for SW-based auto-switching during TIFS. */ 103 104 /* Clear SW-switch timer on packet end: 105 * wire the RADIO EVENTS_END event to SW_SWITCH_TIMER TASKS_CLEAR task. 106 * 107 * Note: In case of single timer configuration we do not need an additional PPI, 108 * since we have already set up a PPI to publish RADIO END event. In other case 109 * separate PPI is used because packet end is marked by PHYEND event while last 110 * bit or CRC is marked by END event. 111 */ 112 #if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER) 113 #define HAL_SW_SWITCH_TIMER_CLEAR_PPI HAL_RADIO_END_TIME_CAPTURE_PPI 114 #else /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */ 115 #define HAL_SW_SWITCH_TIMER_CLEAR_PPI 24 116 #endif /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */ 117 118 /* Wire a SW SWITCH TIMER EVENTS_COMPARE[<cc_offset>] event 119 * to a PPI GROUP TASK DISABLE task (PPI group with index <index>). 120 * 2 adjacent PPIs (14 & 15) and 2 adjacent PPI groups are used for this wiring; 121 * <index> must be 0 or 1. <offset> must be a valid TIMER CC register offset. 122 */ 123 #define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_BASE 14 124 125 /* Enable the SW Switch PPI Group on RADIO END Event. 126 * 127 * Note: we do not need an additional PPI, since we have already set up 128 * a PPI to publish RADIO END event. 129 */ 130 #define HAL_SW_SWITCH_GROUP_TASK_ENABLE_PPI HAL_SW_SWITCH_TIMER_CLEAR_PPI 131 132 /* Enable Radio on SW Switch timer event. 133 * Wire a SW SWITCH TIMER EVENTS_COMPARE[<cc_offset>] event 134 * to a RADIO Enable task (TX or RX). 135 * 136 * Note: 137 * We use the same PPI as for disabling the SW Switch PPI groups, 138 * since we need to listen for the same event (SW Switch event). 139 * 140 * We use the same PPI for the alternative SW Switch Timer compare 141 * event. 142 */ 143 #define HAL_SW_SWITCH_RADIO_ENABLE_PPI_BASE 14 144 145 #if defined(CONFIG_BT_CTLR_PHY_CODED) && \ 146 defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED) 147 148 #define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_BASE \ 149 HAL_SW_SWITCH_RADIO_ENABLE_PPI_BASE 150 151 /* Cancel the SW switch timer running considering S8 timing: 152 * wire the RADIO EVENTS_RATEBOOST event to SW_SWITCH_TIMER TASKS_CAPTURE task. 153 * 154 * Note: We already have a PPI where we publish the RATEBOOST event. 155 */ 156 #define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI HAL_TRIGGER_RATEOVERRIDE_PPI 157 158 #endif /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */ 159 160 #if defined(CONFIG_BT_CTLR_DF_PHYEND_OFFSET_COMPENSATION_ENABLE) 161 /* Cancel the SW switch timer running considering PHYEND delay compensation timing: 162 * wire the RADIO EVENTS_CTEPRESENT event to SW_SWITCH_TIMER TASKS_CAPTURE task. 163 */ 164 #define HAL_SW_SWITCH_TIMER_PHYEND_DELAY_COMPENSATION_DISABLE_PPI 16 165 #endif /* CONFIG_BT_CTLR_DF_PHYEND_OFFSET_COMPENSATION_ENABLE */ 166 167 #if defined(CONFIG_BT_CTLR_DF_CONN_CTE_RX) 168 /* Trigger encryption task upon bit counter match event fire: 169 * wire the RADIO EVENTS_BCMATCH event to the CCM TASKS_CRYPT task. 170 * 171 * Note: The PPI number is shared with HAL_TRIGGER_RATEOVERRIDE_PPI because it is used only 172 * when direction finding RX and PHY is set to PHY1M. Due to that it can be shared with Radio Rate 173 * override. 174 */ 175 #define HAL_TRIGGER_CRYPT_DELAY_PPI 3 176 #endif /* CONFIG_BT_CTLR_DF_CONN_CTE_RX */ 177 178 /* The 2 adjacent PPI groups used for implementing SW_SWITCH_TIMER-based 179 * auto-switch for TIFS. 'index' must be 0 or 1. 180 */ 181 #define SW_SWITCH_TIMER_TASK_GROUP_BASE 4 182 #endif /* !CONFIG_BT_CTLR_TIFS_HW */ 183
