1 /* 2 * Copyright (c) 2021-2024 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /******************************************************************************* 8 * Enable Radio on Event Timer tick: 9 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task. 10 */ 11 #define HAL_RADIO_ENABLE_TX_ON_TICK_PPI 6 12 #define HAL_RADIO_ENABLE_RX_ON_TICK_PPI 6 13 14 /******************************************************************************* 15 * Capture event timer on Address reception: 16 * wire the RADIO EVENTS_ADDRESS event to the 17 * EVENT_TIMER TASKS_CAPTURE[<address timer>] task. 18 */ 19 #define HAL_RADIO_RECV_TIMEOUT_CANCEL_PPI 9 20 21 /******************************************************************************* 22 * Disable Radio on HCTO: 23 * wire the EVENT_TIMER EVENTS_COMPARE[<HCTO timer>] event 24 * to the RADIO TASKS_DISABLE task. 25 */ 26 #define HAL_RADIO_DISABLE_ON_HCTO_PPI 10 27 28 /******************************************************************************* 29 * Capture event timer on Radio end: 30 * wire the RADIO EVENTS_END event to the 31 * EVENT_TIMER TASKS_CAPTURE[<radio end timer>] task. 32 */ 33 #define HAL_RADIO_END_TIME_CAPTURE_PPI 11 34 35 /******************************************************************************* 36 * Start event timer on RTC tick: 37 * wire the RTC0 EVENTS_COMPARE[2] event to EVENT_TIMER TASKS_START task. 38 */ 39 #define HAL_EVENT_TIMER_START_PPI 7 40 #define HAL_PPIB_SEND_EVENT_TIMER_START_PPI \ 41 _CONCAT(NRF_PPIB_TASK_SEND_, HAL_EVENT_TIMER_START_PPI) 42 #define HAL_PPIB_RECEIVE_EVENT_TIMER_START_PPI \ 43 _CONCAT(NRF_PPIB_EVENT_RECEIVE_, HAL_EVENT_TIMER_START_PPI) 44 45 /******************************************************************************* 46 * Capture event timer on Radio ready: 47 * wire the RADIO EVENTS_READY event to the 48 * EVENT_TIMER TASKS_CAPTURE[<radio ready timer>] task. 49 */ 50 #define HAL_RADIO_READY_TIME_CAPTURE_PPI 8 51 52 /******************************************************************************* 53 * Trigger encryption task upon address reception: 54 * wire the RADIO EVENTS_ADDRESS event to the CCM TASKS_CRYPT task. 55 * 56 * Note: we do not need an additional PPI, since we have already set up 57 * a PPI to publish RADIO ADDRESS event. 58 */ 59 #define HAL_TRIGGER_CRYPT_PPI HAL_RADIO_RECV_TIMEOUT_CANCEL_PPI 60 61 /******************************************************************************* 62 * Trigger automatic address resolution on Bit counter match: 63 * wire the RADIO EVENTS_BCMATCH event to the AAR TASKS_START task. 64 */ 65 #define HAL_TRIGGER_AAR_PPI 12 66 67 #if defined(CONFIG_BT_CTLR_PHY_CODED) && \ 68 defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED) 69 /******************************************************************************* 70 * Trigger Radio Rate override upon Rateboost event. 71 */ 72 #define HAL_TRIGGER_RATEOVERRIDE_PPI 13 73 #endif /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */ 74 75 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || defined(HAL_RADIO_GPIO_HAVE_LNA_PIN) 76 /******************************************************************************/ 77 #define HAL_ENABLE_PALNA_PPI 5 78 79 #if defined(HAL_RADIO_FEM_IS_NRF21540) 80 #define HAL_DISABLE_PALNA_PPI 4 81 #else 82 #define HAL_DISABLE_PALNA_PPI HAL_ENABLE_PALNA_PPI 83 #endif 84 85 #define HAL_ENABLE_FEM_PPI 3 86 #define HAL_DISABLE_FEM_PPI HAL_DISABLE_PALNA_PPI 87 88 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN || HAL_RADIO_GPIO_HAVE_LNA_PIN */ 89 90 /******************************************************************************/ 91 #if !defined(CONFIG_BT_CTLR_TIFS_HW) 92 /* DPPI setup used for SW-based auto-switching during TIFS. */ 93 94 /* Clear SW-switch timer on packet end: 95 * wire the RADIO EVENTS_END event to SW_SWITCH_TIMER TASKS_CLEAR task. 96 * 97 * Note: In case of HW TIFS support or single timer configuration we do not need 98 * an additional PPI, since we have already set up a PPI to publish RADIO END 99 * event. In other case separate PPI is used because packet end is marked by 100 * PHYEND event while last bit or CRC is marked by END event. 101 */ 102 #if !defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER) 103 #define HAL_SW_SWITCH_TIMER_CLEAR_PPI 24 104 #else /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */ 105 #define HAL_SW_SWITCH_TIMER_CLEAR_PPI HAL_RADIO_END_TIME_CAPTURE_PPI 106 #endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */ 107 108 /* Wire a SW SWITCH TIMER EVENTS_COMPARE[<cc_offset>] event 109 * to a PPI GROUP TASK DISABLE task (PPI group with index <index>). 110 * 2 adjacent PPIs (14 & 15) and 2 adjacent PPI groups are used for this wiring; 111 * <index> must be 0 or 1. <offset> must be a valid TIMER CC register offset. 112 */ 113 #define HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_BASE 14 114 115 /* Enable the SW Switch PPI Group on RADIO END Event. 116 * 117 * Note: we do not need an additional PPI, since we have already set up 118 * a PPI to publish RADIO END event. 119 */ 120 #define HAL_SW_SWITCH_GROUP_TASK_ENABLE_PPI HAL_SW_SWITCH_TIMER_CLEAR_PPI 121 122 /* Enable Radio on SW Switch timer event. 123 * Wire a SW SWITCH TIMER EVENTS_COMPARE[<cc_offset>] event 124 * to a RADIO Enable task (TX or RX). 125 * 126 * Note: 127 * We use the same PPI as for disabling the SW Switch PPI groups, 128 * since we need to listen for the same event (SW Switch event). 129 * 130 * We use the same PPI for the alternative SW Switch Timer compare 131 * event. 132 */ 133 #define HAL_SW_SWITCH_RADIO_ENABLE_PPI_BASE 14 134 135 #if defined(CONFIG_BT_CTLR_PHY_CODED) && \ 136 defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED) 137 138 #define HAL_SW_SWITCH_RADIO_ENABLE_S2_PPI_BASE \ 139 HAL_SW_SWITCH_RADIO_ENABLE_PPI_BASE 140 141 /* Cancel the SW switch timer running considering S8 timing: 142 * wire the RADIO EVENTS_RATEBOOST event to SW_SWITCH_TIMER TASKS_CAPTURE task. 143 * 144 * Note: We already have a PPI where we publish the RATEBOOST event. 145 */ 146 #define HAL_SW_SWITCH_TIMER_S8_DISABLE_PPI HAL_TRIGGER_RATEOVERRIDE_PPI 147 148 #endif /* CONFIG_BT_CTLR_PHY_CODED && CONFIG_HAS_HW_NRF_RADIO_BLE_CODED */ 149 150 #if defined(CONFIG_BT_CTLR_DF_PHYEND_OFFSET_COMPENSATION_ENABLE) 151 /* Cancel the SW switch timer running considering PHYEND delay compensation timing: 152 * wire the RADIO EVENTS_CTEPRESENT event to SW_SWITCH_TIMER TASKS_CAPTURE task. 153 */ 154 #define HAL_SW_SWITCH_TIMER_PHYEND_DELAY_COMPENSATION_DISABLE_PPI 16 155 #endif /* CONFIG_BT_CTLR_DF_PHYEND_OFFSET_COMPENSATION_ENABLE */ 156 157 #if defined(CONFIG_BT_CTLR_DF_CONN_CTE_RX) 158 /* Trigger encryption task upon bit counter match event fire: 159 * wire the RADIO EVENTS_BCMATCH event to the CCM TASKS_CRYPT task. 160 * 161 * Note: The PPI number is shared with HAL_TRIGGER_RATEOVERRIDE_PPI because it is used only 162 * when direction finding RX and PHY is set to PHY1M. Due to that it can be shared with Radio Rate 163 * override. 164 */ 165 #define HAL_TRIGGER_CRYPT_DELAY_PPI 13 166 #endif /* CONFIG_BT_CTLR_DF_CONN_CTE_RX */ 167 168 /* The 2 adjacent PPI groups used for implementing SW_SWITCH_TIMER-based 169 * auto-switch for TIFS. 'index' must be 0 or 1. 170 */ 171 #define SW_SWITCH_TIMER_TASK_GROUP_BASE 0 172 #endif /* !CONFIG_BT_CTLR_TIFS_HW */ 173
