1 /*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 /* Use the NRF_RTC instance for coarse radio event scheduling */
8 #if !defined(CONFIG_BT_CTLR_NRF_GRTC)
9 #define NRF_RTC NRF_RTC10
10 #endif /* !CONFIG_BT_CTLR_NRF_GRTC */
11
12 #undef EVENT_TIMER_ID
13 #define EVENT_TIMER_ID 10
14
15 #undef EVENT_TIMER
16 #define EVENT_TIMER _CONCAT(NRF_TIMER, EVENT_TIMER_ID)
17
18 #if !defined(CONFIG_BT_CTLR_TIFS_HW)
19 #undef SW_SWITCH_TIMER
20 #if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
21 #define SW_SWITCH_TIMER EVENT_TIMER
22 #else /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
23 /* TODO: Using NRF_TIMER from another domain needs DPPIC and PPIB setup */
24 #error "SW tIFS switching using dedicated second timer not supported yet."
25 #endif /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
26 #endif /* !CONFIG_BT_CTLR_TIFS_HW */
27
28 /* HAL abstraction of event timer prescaler value */
29 #define HAL_EVENT_TIMER_PRESCALER_VALUE 5U
30
31 /* NRF Radio HW timing constants
32 * - provided in US and NS (for higher granularity)
33 * - based on empirical measurements and sniffer logs
34 */
35
36 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
37 * in microseconds for LE 1M PHY.
38 */
39 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS 40900 /*40.1 + 0.8*/
40 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_US \
41 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS)
42
43 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
44 * in microseconds for LE 1M PHY.
45 */
46 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS 140900 /*140.1 + 0.8*/
47 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_US \
48 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS)
49
50 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode
51 * and no HW TIFS auto-switch) in microseconds for LE 1M PHY.
52 */
53 /* 129.5 + 0.8 */
54 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS 130300
55 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_US \
56 HAL_RADIO_NS2US_ROUND( \
57 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS)
58
59 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
60 * in microseconds for LE 2M PHY.
61 */
62 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS 40000 /* 40.1 - 0.1 */
63 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_US \
64 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS)
65
66 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
67 * in microseconds for LE 2M PHY.
68 */
69 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS 144900 /* 145 - 0.1 */
70 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_US \
71 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS)
72
73 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
74 * no HW TIFS auto-switch) in microseconds for LE 2M PHY.
75 */
76 /* 129.5 - 0.1 */
77 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS 129400
78 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_US \
79 HAL_RADIO_NS2US_ROUND( \
80 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS)
81
82 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
83 * in microseconds for LE CODED PHY [S2].
84 */
85 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS 42300 /* 40.1 + 2.2 */
86 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_US \
87 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS)
88
89 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
90 * in microseconds for LE 2M PHY [S2].
91 */
92 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS 132200 /* 130 + 2.2 */
93 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_US \
94 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS)
95
96 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
97 * no HW TIFS auto-switch) in microseconds for LE 2M PHY [S2].
98 */
99 /* 129.5 + 2.2 */
100 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS 131700
101 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_US \
102 HAL_RADIO_NS2US_ROUND( \
103 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS)
104
105 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
106 * in microseconds for LE CODED PHY [S8].
107 */
108 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS 42300 /* 40.1 + 2.2 */
109 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_US \
110 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS)
111 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
112 * in microseconds for LE 2M PHY [S8].
113 */
114 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS 121800 /*119.6 + 2.2*/
115 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_US \
116 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS)
117
118 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
119 * no HW TIFS auto-switch) in microseconds for LE 2M PHY [S8].
120 */
121 /* 129.5 + 2.2 */
122 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS 131700
123 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_US \
124 HAL_RADIO_NS2US_ROUND( \
125 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS)
126
127 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
128 * in microseconds for LE 1M PHY.
129 */
130 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS 40300 /* 40.1 + 0.2 */
131 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_US \
132 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS)
133
134 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
135 * in microseconds for LE 1M PHY.
136 */
137 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS 140300 /*140.1 + 0.2*/
138 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_US \
139 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS)
140
141 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
142 * no HW TIFS auto-switch) in microseconds for LE 1M PHY.
143 */
144 /* 129.5 + 0.2 */
145 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS 129700
146 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_US \
147 HAL_RADIO_NS2US_CEIL( \
148 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS)
149
150 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
151 * in microseconds for LE 2M PHY.
152 */
153 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS 40300 /* 40.1 + 0.2 */
154 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_US \
155 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS)
156
157 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
158 * in microseconds for LE 2M PHY.
159 */
160 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS 144800 /*144.6 + 0.2*/
161 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_US \
162 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS)
163
164 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
165 * no HW TIFS auto-switch) in microseconds for LE 2M PHY.
166 */
167 /* 129.5 + 0.2 */
168 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS 129700
169 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_US \
170 HAL_RADIO_NS2US_CEIL( \
171 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS)
172
173 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
174 * in microseconds for LE Coded PHY [S2].
175 */
176 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS 40300 /* 40.1 + 0.2 */
177 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_US \
178 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS)
179
180 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
181 * in microseconds for LE Coded PHY [S2].
182 */
183 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS 130200 /* 130 + 0.2 */
184 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_US \
185 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS)
186
187 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode
188 * and no HW TIFS auto-switch) in microseconds for LE Coded PHY [S2].
189 */
190 /* 129.5 + 0.2 */
191 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS 129700
192 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_US \
193 HAL_RADIO_NS2US_CEIL( \
194 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS)
195
196 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
197 * in microseconds for LE Coded PHY [S8].
198 */
199 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS 40300 /* 40.1 + 0.2 */
200 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_US \
201 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS)
202
203 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
204 * in microseconds for LE Coded PHY [S8].
205 */
206 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS 120200 /* 120.0 + 0.2 */
207 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_US \
208 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS)
209
210 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
211 * no HW TIFS auto-switch) in microseconds for LE Coded PHY [S8].
212 */
213 /* 129.5 + 0.2 */
214 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS 129700
215 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_US \
216 HAL_RADIO_NS2US_CEIL( \
217 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS)
218
219 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_1M_US 1 /* ceil(0.6) */
220 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_1M_NS 600 /* 0.6 */
221 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_2M_US 1 /* ceil(0.6) */
222 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_2M_NS 600 /* 0.6 */
223 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S2_US 1 /* ceil(0.6) */
224 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S2_NS 600 /* 0.6 */
225 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S8_US 1 /* ceil(0.6) */
226 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S8_NS 600 /* 0.6 */
227
228 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_US 10 /* ceil(9.4) */
229 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_NS 9400 /* 9.4 */
230 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_US 5 /* ceil(5.0) */
231 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_NS 5000 /* 5.0 */
232 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_US 25 /* ceil(19.6) */
233 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_NS 24600 /* 19.6 */
234 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_US 30 /* ceil(29.6) */
235 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_NS 29600 /* 29.6 */
236
237 #if defined(CONFIG_BT_CTLR_RADIO_ENABLE_FAST)
238 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
239 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_US
240 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
241 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS
242
243 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
244 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_US
245 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
246 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS
247
248 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
249 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_US
250 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
251 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS
252
253 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
254 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_US
255 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
256 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS
257
258 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
259 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_US
260 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
261 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS
262
263 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
264 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_US
265 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
266 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS
267
268 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
269 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_US
270 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
271 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS
272
273 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
274 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_US
275 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
276 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS
277
278 #else /* !CONFIG_BT_CTLR_RADIO_ENABLE_FAST */
279 #if defined(CONFIG_BT_CTLR_TIFS_HW)
280 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
281 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_US
282 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
283 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS
284
285 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
286 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_US
287 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
288 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS
289
290 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
291 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_US
292 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
293 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS
294
295 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
296 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_US
297 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
298 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS
299
300 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
301 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_US
302 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
303 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS
304
305 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
306 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_US
307 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
308 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS
309
310 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
311 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_US
312 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
313 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS
314
315 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
316 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_US
317 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
318 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS
319
320 #else /* !CONFIG_BT_CTLR_TIFS_HW */
321 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
322 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_US
323 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
324 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS
325
326 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
327 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_US
328 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
329 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS
330
331 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
332 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_US
333 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
334 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS
335
336 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
337 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_US
338 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
339 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS
340
341 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
342 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_US
343 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
344 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS
345
346 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
347 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_US
348 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
349 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS
350
351 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
352 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_US
353 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
354 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS
355
356 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
357 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_US
358 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
359 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS
360 #endif /* !CONFIG_BT_CTLR_TIFS_HW */
361 #endif /* !CONFIG_BT_CTLR_RADIO_ENABLE_FAST */
362
363 /* HAL abstraction of Radio bitfields */
364 #define HAL_NRF_RADIO_EVENT_END NRF_RADIO_EVENT_END
365 #define HAL_RADIO_EVENTS_END EVENTS_END
366 #define HAL_RADIO_PUBLISH_END PUBLISH_END
367 #define HAL_NRF_RADIO_EVENT_PHYEND NRF_RADIO_EVENT_PHYEND
368 #define HAL_RADIO_EVENTS_PHYEND EVENTS_PHYEND
369 #define HAL_RADIO_PUBLISH_PHYEND PUBLISH_PHYEND
370 #define HAL_RADIO_INTENSET_DISABLED_Msk RADIO_INTENSET00_DISABLED_Msk
371 #define HAL_RADIO_SHORTS_TRX_END_DISABLE_Msk RADIO_SHORTS_PHYEND_DISABLE_Msk
372 #define HAL_RADIO_SHORTS_TRX_PHYEND_DISABLE_Msk RADIO_SHORTS_PHYEND_DISABLE_Msk
373 #define HAL_RADIO_CLEARPATTERN_CLEARPATTERN_Clear (1UL)
374
375 /* HAL abstraction of Radio IRQ number */
376 #define HAL_RADIO_IRQn RADIO_0_IRQn
377
378 /* SoC specific NRF_RADIO power-on reset value. Refer to Product Specification,
379 * RADIO Registers section for the documented reset values.
380 *
381 * NOTE: Only implementation used values defined here.
382 * In the future if MDK or nRFx header include these, use them instead.
383 */
384 #define HAL_RADIO_RESET_VALUE_DFEMODE 0x00000000UL
385 #define HAL_RADIO_RESET_VALUE_CTEINLINECONF 0x00002800UL
386 #define HAL_RADIO_RESET_VALUE_DATAWHITE 0x00890040UL
387
388 /* HAL abstraction of CCM h/w */
389 #define NRF_CCM NRF_CCM00
390 #define NRF_CCM_TASK_CRYPT NRF_CCM_TASK_START
391 #define EVENTS_ENDCRYPT EVENTS_END
392 #define INPTR IN.PTR
393 #define OUTPTR OUT.PTR
394 #define MICSTATUS MACSTATUS
395 #define CCM_INTENSET_ENDCRYPT_Msk CCM_INTENSET_END_Msk
396 #define CCM_INTENCLR_ENDCRYPT_Msk CCM_INTENCLR_END_Msk
397 #define CCM_MODE_DATARATE_125Kbps CCM_MODE_DATARATE_125Kbit
398 #define CCM_MODE_DATARATE_500Kbps CCM_MODE_DATARATE_500Kbit
399 #define CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbit
400
hal_radio_reset(void)401 static inline void hal_radio_reset(void)
402 {
403 /* TODO: Add any required setup for each radio event
404 */
405 }
406
hal_radio_stop(void)407 static inline void hal_radio_stop(void)
408 {
409 /* TODO: Add any required cleanup of actions taken in hal_radio_reset()
410 */
411 }
412
hal_radio_ram_prio_setup(void)413 static inline void hal_radio_ram_prio_setup(void)
414 {
415 /* TODO */
416 }
417
hal_radio_phy_mode_get(uint8_t phy,uint8_t flags)418 static inline uint32_t hal_radio_phy_mode_get(uint8_t phy, uint8_t flags)
419 {
420 uint32_t mode;
421
422 switch (phy) {
423 case BIT(0):
424 default:
425 mode = RADIO_MODE_MODE_Ble_1Mbit;
426 break;
427
428 case BIT(1):
429 mode = RADIO_MODE_MODE_Ble_2Mbit;
430 break;
431
432 #if defined(CONFIG_BT_CTLR_PHY_CODED)
433 case BIT(2):
434 if (flags & 0x01) {
435 mode = RADIO_MODE_MODE_Ble_LR125Kbit;
436 } else {
437 mode = RADIO_MODE_MODE_Ble_LR500Kbit;
438 }
439 break;
440 #endif /* CONFIG_BT_CTLR_PHY_CODED */
441 }
442
443 return mode;
444 }
445
hal_radio_tx_power_max_get(void)446 static inline int8_t hal_radio_tx_power_max_get(void)
447 {
448 return 8; /* +8 dBm */
449 }
450
hal_radio_tx_power_min_get(void)451 static inline int8_t hal_radio_tx_power_min_get(void)
452 {
453 return -46; /* -46 dBm */
454 }
455
hal_radio_tx_power_floor(int8_t tx_power_lvl)456 static inline int8_t hal_radio_tx_power_floor(int8_t tx_power_lvl)
457 {
458 if (tx_power_lvl >= 8) {
459 return 8;
460 }
461
462 if (tx_power_lvl >= 7) {
463 return 7;
464 }
465
466 if (tx_power_lvl >= 6) {
467 return 6;
468 }
469
470 if (tx_power_lvl >= 5) {
471 return 5;
472 }
473
474 if (tx_power_lvl >= 4) {
475 return 4;
476 }
477
478 if (tx_power_lvl >= 3) {
479 return 3;
480 }
481
482 if (tx_power_lvl >= 2) {
483 return 2;
484 }
485
486 if (tx_power_lvl >= 1) {
487 return 1;
488 }
489
490 if (tx_power_lvl >= 0) {
491 return 0;
492 }
493
494 if (tx_power_lvl >= -1) {
495 return -1;
496 }
497
498 if (tx_power_lvl >= -2) {
499 return -2;
500 }
501
502 if (tx_power_lvl >= -3) {
503 return -3;
504 }
505
506 if (tx_power_lvl >= -4) {
507 return -4;
508 }
509
510 if (tx_power_lvl >= -5) {
511 return -5;
512 }
513
514 if (tx_power_lvl >= -6) {
515 return -6;
516 }
517
518 if (tx_power_lvl >= -7) {
519 return -7;
520 }
521
522 if (tx_power_lvl >= -8) {
523 return -8;
524 }
525
526 if (tx_power_lvl >= -9) {
527 return -9;
528 }
529
530 if (tx_power_lvl >= -10) {
531 return -10;
532 }
533
534 if (tx_power_lvl >= -12) {
535 return -12;
536 }
537
538 if (tx_power_lvl >= -14) {
539 return -14;
540 }
541
542 if (tx_power_lvl >= -16) {
543 return -16;
544 }
545
546 if (tx_power_lvl >= -20) {
547 return -20;
548 }
549
550 if (tx_power_lvl >= -26) {
551 return -26;
552 }
553
554 if (tx_power_lvl >= -40) {
555 return -40;
556 }
557
558 return -46;
559 }
560
hal_radio_tx_power_value(int8_t tx_power_lvl)561 static inline uint32_t hal_radio_tx_power_value(int8_t tx_power_lvl)
562 {
563 if (tx_power_lvl >= 8) {
564 return RADIO_TXPOWER_TXPOWER_Pos8dBm;
565 }
566
567 if (tx_power_lvl >= 7) {
568 return RADIO_TXPOWER_TXPOWER_Pos7dBm;
569 }
570
571 if (tx_power_lvl >= 6) {
572 return RADIO_TXPOWER_TXPOWER_Pos6dBm;
573 }
574
575 if (tx_power_lvl >= 5) {
576 return RADIO_TXPOWER_TXPOWER_Pos5dBm;
577 }
578
579 if (tx_power_lvl >= 4) {
580 return RADIO_TXPOWER_TXPOWER_Pos4dBm;
581 }
582
583 if (tx_power_lvl >= 3) {
584 return RADIO_TXPOWER_TXPOWER_Pos3dBm;
585 }
586
587 if (tx_power_lvl >= 2) {
588 return RADIO_TXPOWER_TXPOWER_Pos2dBm;
589 }
590
591 if (tx_power_lvl >= 1) {
592 return RADIO_TXPOWER_TXPOWER_Pos1dBm;
593 }
594
595 if (tx_power_lvl >= 0) {
596 return RADIO_TXPOWER_TXPOWER_0dBm;
597 }
598
599 if (tx_power_lvl >= -1) {
600 return RADIO_TXPOWER_TXPOWER_Neg1dBm;
601 }
602
603 if (tx_power_lvl >= -2) {
604 return RADIO_TXPOWER_TXPOWER_Neg2dBm;
605 }
606
607 if (tx_power_lvl >= -3) {
608 return RADIO_TXPOWER_TXPOWER_Neg3dBm;
609 }
610
611 if (tx_power_lvl >= -4) {
612 return RADIO_TXPOWER_TXPOWER_Neg4dBm;
613 }
614
615 if (tx_power_lvl >= -5) {
616 return RADIO_TXPOWER_TXPOWER_Neg5dBm;
617 }
618
619 if (tx_power_lvl >= -6) {
620 return RADIO_TXPOWER_TXPOWER_Neg6dBm;
621 }
622
623 if (tx_power_lvl >= -7) {
624 return RADIO_TXPOWER_TXPOWER_Neg7dBm;
625 }
626
627 if (tx_power_lvl >= -8) {
628 return RADIO_TXPOWER_TXPOWER_Neg8dBm;
629 }
630
631 if (tx_power_lvl >= -9) {
632 return RADIO_TXPOWER_TXPOWER_Neg9dBm;
633 }
634
635 if (tx_power_lvl >= -10) {
636 return RADIO_TXPOWER_TXPOWER_Neg10dBm;
637 }
638
639 if (tx_power_lvl >= -12) {
640 return RADIO_TXPOWER_TXPOWER_Neg12dBm;
641 }
642
643 if (tx_power_lvl >= -14) {
644 return RADIO_TXPOWER_TXPOWER_Neg14dBm;
645 }
646
647 if (tx_power_lvl >= -16) {
648 return RADIO_TXPOWER_TXPOWER_Neg16dBm;
649 }
650
651 if (tx_power_lvl >= -20) {
652 return RADIO_TXPOWER_TXPOWER_Neg20dBm;
653 }
654
655 #if defined(RADIO_TXPOWER_TXPOWER_Neg26dBm)
656 if (tx_power_lvl >= -26) {
657 return RADIO_TXPOWER_TXPOWER_Neg26dBm;
658 }
659 #endif
660
661 #if defined(RADIO_TXPOWER_TXPOWER_Neg28dBm)
662 if (tx_power_lvl >= -28) {
663 return RADIO_TXPOWER_TXPOWER_Neg28dBm;
664 }
665 #endif
666
667 if (tx_power_lvl >= -40) {
668 return RADIO_TXPOWER_TXPOWER_Neg40dBm;
669 }
670
671 return RADIO_TXPOWER_TXPOWER_Neg46dBm;
672 }
673
hal_radio_tx_ready_delay_us_get(uint8_t phy,uint8_t flags)674 static inline uint32_t hal_radio_tx_ready_delay_us_get(uint8_t phy, uint8_t flags)
675 {
676 switch (phy) {
677 default:
678 case BIT(0):
679 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US;
680 case BIT(1):
681 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US;
682
683 #if defined(CONFIG_BT_CTLR_PHY_CODED)
684 case BIT(2):
685 if (flags & 0x01) {
686 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US;
687 } else {
688 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US;
689 }
690 #endif /* CONFIG_BT_CTLR_PHY_CODED */
691 }
692 }
693
hal_radio_rx_ready_delay_us_get(uint8_t phy,uint8_t flags)694 static inline uint32_t hal_radio_rx_ready_delay_us_get(uint8_t phy, uint8_t flags)
695 {
696 switch (phy) {
697 default:
698 case BIT(0):
699 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US;
700 case BIT(1):
701 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US;
702
703 #if defined(CONFIG_BT_CTLR_PHY_CODED)
704 case BIT(2):
705 if (flags & 0x01) {
706 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US;
707 } else {
708 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US;
709 }
710 #endif /* CONFIG_BT_CTLR_PHY_CODED */
711 }
712 }
713
hal_radio_tx_chain_delay_us_get(uint8_t phy,uint8_t flags)714 static inline uint32_t hal_radio_tx_chain_delay_us_get(uint8_t phy, uint8_t flags)
715 {
716 switch (phy) {
717 default:
718 case BIT(0):
719 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_1M_US;
720 case BIT(1):
721 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_2M_US;
722
723 #if defined(CONFIG_BT_CTLR_PHY_CODED)
724 case BIT(2):
725 if (flags & 0x01) {
726 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S8_US;
727 } else {
728 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S2_US;
729 }
730 #endif /* CONFIG_BT_CTLR_PHY_CODED */
731 }
732 }
733
hal_radio_rx_chain_delay_us_get(uint8_t phy,uint8_t flags)734 static inline uint32_t hal_radio_rx_chain_delay_us_get(uint8_t phy, uint8_t flags)
735 {
736 switch (phy) {
737 default:
738 case BIT(0):
739 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_US;
740 case BIT(1):
741 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_US;
742
743 #if defined(CONFIG_BT_CTLR_PHY_CODED)
744 case BIT(2):
745 if (flags & 0x01) {
746 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_US;
747 } else {
748 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_US;
749 }
750 #endif /* CONFIG_BT_CTLR_PHY_CODED */
751 }
752 }
753
hal_radio_tx_ready_delay_ns_get(uint8_t phy,uint8_t flags)754 static inline uint32_t hal_radio_tx_ready_delay_ns_get(uint8_t phy, uint8_t flags)
755 {
756 switch (phy) {
757 default:
758 case BIT(0):
759 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS;
760 case BIT(1):
761 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS;
762
763 #if defined(CONFIG_BT_CTLR_PHY_CODED)
764 case BIT(2):
765 if (flags & 0x01) {
766 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS;
767 } else {
768 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS;
769 }
770 #endif /* CONFIG_BT_CTLR_PHY_CODED */
771 }
772 }
773
hal_radio_rx_ready_delay_ns_get(uint8_t phy,uint8_t flags)774 static inline uint32_t hal_radio_rx_ready_delay_ns_get(uint8_t phy, uint8_t flags)
775 {
776 switch (phy) {
777 default:
778 case BIT(0):
779 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS;
780 case BIT(1):
781 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS;
782
783 #if defined(CONFIG_BT_CTLR_PHY_CODED)
784 case BIT(2):
785 if (flags & 0x01) {
786 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS;
787 } else {
788 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS;
789 }
790 #endif /* CONFIG_BT_CTLR_PHY_CODED */
791 }
792 }
793
hal_radio_tx_chain_delay_ns_get(uint8_t phy,uint8_t flags)794 static inline uint32_t hal_radio_tx_chain_delay_ns_get(uint8_t phy, uint8_t flags)
795 {
796 switch (phy) {
797 default:
798 case BIT(0):
799 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_1M_NS;
800 case BIT(1):
801 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_2M_NS;
802
803 #if defined(CONFIG_BT_CTLR_PHY_CODED)
804 case BIT(2):
805 if (flags & 0x01) {
806 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S8_NS;
807 } else {
808 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S2_NS;
809 }
810 #endif /* CONFIG_BT_CTLR_PHY_CODED */
811 }
812 }
813
hal_radio_rx_chain_delay_ns_get(uint8_t phy,uint8_t flags)814 static inline uint32_t hal_radio_rx_chain_delay_ns_get(uint8_t phy, uint8_t flags)
815 {
816 switch (phy) {
817 default:
818 case BIT(0):
819 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_NS;
820 case BIT(1):
821 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_NS;
822
823 #if defined(CONFIG_BT_CTLR_PHY_CODED)
824 case BIT(2):
825 if (flags & 0x01) {
826 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_NS;
827 } else {
828 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_NS;
829 }
830 #endif /* CONFIG_BT_CTLR_PHY_CODED */
831 }
832 }
833
