1 /* 2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /*******************************************************************************************************************//** 8 * @addtogroup DMAC_B 9 * @{ 10 **********************************************************************************************************************/ 11 12 #ifndef R_DMAC_B_H 13 #define R_DMAC_B_H 14 15 /*********************************************************************************************************************** 16 * Includes 17 **********************************************************************************************************************/ 18 #include "bsp_api.h" 19 #include "r_transfer_api.h" 20 21 /* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ 22 FSP_HEADER 23 24 /*********************************************************************************************************************** 25 * Macro definitions 26 **********************************************************************************************************************/ 27 28 /** Max configurable number of transfers in TRANSFER_MODE_NORMAL. */ 29 #define DMAC_B_MAX_NORMAL_TRANSFER_LENGTH (0xFFFFFFFF) 30 31 /** Max number of transfers per block in TRANSFER_MODE_BLOCK */ 32 #define DMAC_B_MAX_BLOCK_TRANSFER_LENGTH (0xFFFFFFFF) 33 34 /*********************************************************************************************************************** 35 * Typedef definitions 36 **********************************************************************************************************************/ 37 38 /** Events that can trigger a callback function. */ 39 typedef enum e_dmac_b_event 40 { 41 DMAC_B_EVENT_TRANSFER_END = 0, ///< DMA transfer has completed. 42 DMAC_B_EVENT_TRANSFER_ERROR = 1, ///< A bus error occurred during DMA transfer. 43 } dmac_b_event_t; 44 45 /** Callback function parameter data. */ 46 typedef struct st_dmac_b_callback_args_t 47 { 48 dmac_b_event_t event; ///< Event code 49 void const * p_context; ///< Placeholder for user data. Set in r_transfer_t::open function in ::transfer_cfg_t. 50 } dmac_b_callback_args_t; 51 52 /** Transfer size specifies the size of each individual transfer. */ 53 typedef enum e_dmac_b_transfer_size 54 { 55 DMAC_B_TRANSFER_SIZE_1_BYTE = 0, ///< Each transfer transfers a 8-bit value. 56 DMAC_B_TRANSFER_SIZE_2_BYTE = 1, ///< Each transfer transfers a 16-bit value. 57 DMAC_B_TRANSFER_SIZE_4_BYTE = 2, ///< Each transfer transfers a 32-bit value. 58 DMAC_B_TRANSFER_SIZE_8_BYTE = 3, ///< Each transfer transfers a 64-bit value. 59 DMAC_B_TRANSFER_SIZE_16_BYTE = 4, ///< Each transfer transfers a 128-bit value. 60 DMAC_B_TRANSFER_SIZE_32_BYTE = 5, ///< Each transfer transfers a 256-bit value. 61 DMAC_B_TRANSFER_SIZE_64_BYTE = 6, ///< Each transfer transfers a 512-bit value. 62 DMAC_B_TRANSFER_SIZE_128_BYTE = 7, ///< Each transfer transfers a 1024-bit value. 63 } dmac_b_transfer_size_t; 64 65 /** DACK output mode. See RZ/T2M hardware manual Table 14.19 DMA Transfer Request Detection Operation Setting Table. */ 66 typedef enum e_dmac_b_ack_mode 67 { 68 DMAC_B_ACK_MODE_LEVEL_MODE = 1, ///< Level mode. 69 DMAC_B_ACK_MODE_BUS_CYCLE_MODE = 2, ///< Bus cycle mode. 70 DMAC_B_ACK_MODE_MASK_DACK_OUTPUT = 4, ///< Output is masked. 71 } dmac_b_ack_mode_t; 72 73 #ifndef BSP_OVERRIDE_DMAC_B_EXTERNAL_DETECTION_T 74 75 /** Detection method of the external DMA request signal. See RZ/T2M hardware manual Table 14.19 DMA Transfer Request Detection Operation Setting Table. */ 76 typedef enum e_dmac_b_external_detection 77 { 78 DMAC_B_EXTERNAL_DETECTION_LOW_LEVEL = 0, ///< Low level detection. 79 DMAC_B_EXTERNAL_DETECTION_FALLING_EDGE = 1, ///< Falling edge detection. 80 DMAC_B_EXTERNAL_DETECTION_RISING_EDGE = 2, ///< Rising edge detection. 81 DMAC_B_EXTERNAL_DETECTION_FALLING_RISING_EDGE = 3, ///< Falling/Rising edge detection. 82 } dmac_b_external_detection_t; 83 84 #endif 85 86 /** Detection method of the internal DMA request signal. See RZ/T2M hardware manual Table 14.19 DMA Transfer Request Detection Operation Setting Table. */ 87 typedef enum e_dmac_b_internal_detection 88 { 89 DMAC_B_INTERNAL_DETECTION_NO_DETECTION = 0, ///< Not using hardware detection. 90 DMAC_B_INTERNAL_DETECTION_FALLING_EDGE = 1, ///< Falling edge detection. 91 DMAC_B_INTERNAL_DETECTION_RISING_EDGE = 2, ///< Rising edge detection. 92 DMAC_B_INTERNAL_DETECTION_LOW_LEVEL = 5, ///< Low level detection. 93 DMAC_B_INTERNAL_DETECTION_HIGH_LEVEL = 6, ///< High level detection. 94 } dmac_b_internal_detection_t; 95 96 /** DMA activation request source select. See RZ/T2M hardware manual Table 14.19 DMA Transfer Request Detection Operation Setting Table. */ 97 typedef enum e_dmac_b_request_direction 98 { 99 DMAC_B_REQUEST_DIRECTION_SOURCE_MODULE = 0, ///< Requested by a transfer source module. 100 DMAC_B_REQUEST_DIRECTION_DESTINATION_MODULE = 1, ///< Requested by a transfer destination module. 101 } dmac_b_request_direction_t; 102 103 /** Select the Next register set to be executed next. */ 104 typedef enum e_dmac_b_continuous_setting 105 { 106 DMAC_B_CONTINUOUS_SETTING_TRANSFER_ONCE = 0x0, ///< Transfer only once using the Next0 register set. 107 DMAC_B_CONTINUOUS_SETTING_TRANSFER_ALTERNATELY = 0x3, ///< Transfers are performed alternately with the Next0 register set and the Next1 register set. 108 } dmac_b_continuous_setting_t; 109 110 /** Register set settings. */ 111 typedef struct st_dmac_b_register_set_setting_t 112 { 113 void const * p_src; ///< Source pointer. 114 void * p_dest; ///< Destination pointer. 115 uint32_t length; ///< Transfer byte. 116 } dmac_b_register_set_setting_t; 117 118 /** DMAC channel scheduling. */ 119 typedef enum e_dmac_b_channel_scheduling 120 { 121 DMAC_B_CHANNEL_SCHEDULING_FIXED = 0, ///< Fixed priority mode. 122 DMAC_B_CHANNEL_SCHEDULING_ROUND_ROBIN = 1, ///< Round-robin mode. 123 } dmac_b_channel_scheduling_t; 124 125 /** DMAC mode setting. */ 126 typedef enum e_dmac_b_mode_select 127 { 128 DMAC_B_MODE_SELECT_REGISTER = 0, ///< Register mode. 129 DMAC_B_MODE_SELECT_LINK = 1, ///< Link mode. 130 } dmac_b_mode_select_t; 131 132 /** Control block used by driver. DO NOT INITIALIZE - this structure will be initialized in @ref transfer_api_t::open. */ 133 typedef struct st_dmac_b_instance_ctrl 134 { 135 uint32_t open; // Driver ID 136 137 transfer_cfg_t const * p_cfg; 138 139 /* Pointer to base register. */ 140 R_DMAC_B0_Type * p_reg; 141 } dmac_b_instance_ctrl_t; 142 143 /** DMAC transfer configuration extension. This extension is required. */ 144 typedef struct st_dmac_b_extended_cfg 145 { 146 uint8_t unit; ///< Unit number 147 uint8_t channel; ///< Channel number 148 IRQn_Type dmac_int_irq; ///< DMAC interrupt number 149 uint8_t dmac_int_ipl; ///< DMAC interrupt priority 150 151 /** Select which event will trigger the transfer. */ 152 dmac_trigger_event_t activation_source; 153 154 dmac_b_ack_mode_t ack_mode; ///< DACK output mode 155 dmac_b_external_detection_t external_detection_mode; ///< DMAC request detection method for external pin 156 dmac_b_internal_detection_t internal_detection_mode; ///< DMAC request detection method for internal pin 157 dmac_b_request_direction_t activation_request_source_select; ///< DMAC activation request source 158 159 dmac_b_mode_select_t dmac_mode; ///< DMAC Mode 160 dmac_b_continuous_setting_t continuous_setting; ///< Next register operation settings 161 uint16_t transfer_interval; ///< DMA transfer interval 162 dmac_b_channel_scheduling_t channel_scheduling; ///< DMA channel scheduling 163 164 /** Callback for transfer end interrupt. */ 165 void (* p_callback)(dmac_b_callback_args_t * cb_data); 166 167 /** Placeholder for user data. Passed to the user p_callback in ::dmac_b_callback_args_t. */ 168 void const * p_context; 169 } dmac_b_extended_cfg_t; 170 171 /** DMAC transfer information configuration extension. This extension is required. */ 172 typedef struct st_dmac_b_extended_info 173 { 174 /** Select number of source bytes to transfer at once. */ 175 dmac_b_transfer_size_t src_size; 176 177 /** Select number of destination bytes to transfer at once. */ 178 dmac_b_transfer_size_t dest_size; 179 180 /** Next1 Register set settings */ 181 dmac_b_register_set_setting_t * p_next1_register_setting; 182 } dmac_b_extended_info_t; 183 184 /********************************************************************************************************************** 185 * Exported global variables 186 **********************************************************************************************************************/ 187 188 /** @cond INC_HEADER_DEFS_SEC */ 189 /** Filled in Interface API structure for this Instance. */ 190 extern const transfer_api_t g_transfer_on_dmac_b; 191 192 /** @endcond */ 193 194 /*********************************************************************************************************************** 195 * Public Function Prototypes 196 **********************************************************************************************************************/ 197 fsp_err_t R_DMAC_B_Open(transfer_ctrl_t * const p_api_ctrl, transfer_cfg_t const * const p_cfg); 198 fsp_err_t R_DMAC_B_Reconfigure(transfer_ctrl_t * const p_api_ctrl, transfer_info_t * p_info); 199 fsp_err_t R_DMAC_B_Reset(transfer_ctrl_t * const p_api_ctrl, 200 void const * volatile p_src, 201 void * volatile p_dest, 202 uint16_t const num_transfers); 203 fsp_err_t R_DMAC_B_SoftwareStart(transfer_ctrl_t * const p_api_ctrl, transfer_start_mode_t mode); 204 fsp_err_t R_DMAC_B_SoftwareStop(transfer_ctrl_t * const p_api_ctrl); 205 fsp_err_t R_DMAC_B_Enable(transfer_ctrl_t * const p_api_ctrl); 206 fsp_err_t R_DMAC_B_Disable(transfer_ctrl_t * const p_api_ctrl); 207 fsp_err_t R_DMAC_B_InfoGet(transfer_ctrl_t * const p_api_ctrl, transfer_properties_t * const p_info); 208 fsp_err_t R_DMAC_B_Close(transfer_ctrl_t * const p_api_ctrl); 209 fsp_err_t R_DMAC_B_Reload(transfer_ctrl_t * const p_api_ctrl, 210 void const * p_src, 211 void * p_dest, 212 uint32_t const num_transfers); 213 214 /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ 215 FSP_FOOTER 216 217 #endif 218 219 /*******************************************************************************************************************//** 220 * @} (end defgroup DMAC) 221 **********************************************************************************************************************/ 222
