1<?xml version="1.0" encoding="utf-8"?> 2 3 4<!--**************************************************************************** 5* \file power_v3.cypersonality 6* \version 1.0 7* 8* \brief 9* Personality description file for MCU part of Low Power Assistant. 10* This supports CAT1C devices. 11 12* 13******************************************************************************** 14* \copyright 15* Copyright (c) 2022, Cypress Semiconductor Corporation (an Infineon company) or 16* an affiliate of Cypress Semiconductor Corporation. 17* SPDX-License-Identifier: Apache-2.0 18* 19* Licensed under the Apache License, Version 2.0 (the "License"); 20* you may not use this file except in compliance with the License. 21* You may obtain a copy of the License at 22* 23* http://www.apache.org/licenses/LICENSE-2.0 24* 25* Unless required by applicable law or agreed to in writing, software 26* distributed under the License is distributed on an "AS IS" BASIS, 27* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 28* See the License for the specific language governing permissions and 29* limitations under the License. 30*****************************************************************************--> 31 32<Personality id="power_v3" name="Power Settings" version="1.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7"> 33 <Dependencies> 34 <IpBlock name="mxs40srss_ver3" /> 35 <Resource name="srss\.power" /> 36 </Dependencies> 37 <ExposedMembers> 38 <ExposedMember key="vddaMv" paramId="vddaMv" /> 39 <ExposedMember key="usingUlp" paramId="usingUlp" /> 40 <ExposedMember key="deepsleepWhenIdle" paramId="deepsleepWhenIdle" /> 41 </ExposedMembers> 42 <Parameters> 43 <!-- Documentation --> 44 <ParamDoc id="pdlDoc" name="SysPm API Reference" group="Overview" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__syspm.html" linkText="Open SysPm Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" /> 45 46 <!-- Power settings --> 47 <ParamBool id="enableLowPowerProfileMode" name="Enable LPACTIVE/LPSLEEP mode" group="General" default="`${false}`" visible="true" editable="true" desc="This parameter enables the Low Power Profile mode i.e LPACTIVE/LPSLEEP" /> 48 49 <ParamChoice id="minCurrRegulator" name="Regulator Min Current Mode" group="General" default="`${CY_SYSPM_LDO_MODE_NORMAL}`" visible="true" editable="true" 50 desc="Enables Regulator Minimum Current Mode."> 51 <Entry name="Normal Current LDO" value="CY_SYSPM_LDO_MODE_NORMAL" visible="true" /> 52 <Entry name="Minimum Current LDO" value="CY_SYSPM_LDO_MODE_MIN" visible="true" /> 53 </ParamChoice> 54 55 <ParamBool id="transistorEnable" name="Enable REGHC" group="REGHC Controls" default="false" visible="true" editable="true" desc="Enables REGHC." /> 56 57 <ParamChoice id="reghcMode" name="REGHC Mode" group="REGHC Controls" default="`${CY_SYSPM_REGHC_MODE_TRANSISTOR}`" visible="`${transistorEnable}`" editable="false" 58 desc="Selects the mode for REGHC."> 59 <Entry name="External Transistor Mode" value="CY_SYSPM_REGHC_MODE_TRANSISTOR" visible="true" /> 60 <Entry name="External PMIC Mode" value="CY_SYSPM_REGHC_MODE_PMIC" visible="true" /> 61 </ParamChoice> 62 63 <ParamRange id="vadjMv" name="VADJ Voltage (mV)" group="REGHC Controls" default="1100" min="1020" max="1175" resolution="5" visible="`${transistorEnable}`" editable="true" desc="VADJ voltage in millivolts." /> 64 65 <ParamString id="vadjVoltMacro" name="VADJ Voltage Macro" group="Internal" default="`${vadjMv eq "1020" ? "CY_SYSPM_REGHC_VADJ_1_020V" : 66 vadjMv eq "1025" ? "CY_SYSPM_REGHC_VADJ_1_025V" : 67 vadjMv eq "1030" ? "CY_SYSPM_REGHC_VADJ_1_030V" : 68 vadjMv eq "1035" ? "CY_SYSPM_REGHC_VADJ_1_035V" : 69 vadjMv eq "1040" ? "CY_SYSPM_REGHC_VADJ_1_040V" : 70 vadjMv eq "1045" ? "CY_SYSPM_REGHC_VADJ_1_045V" : 71 vadjMv eq "1050" ? "CY_SYSPM_REGHC_VADJ_1_050V" : 72 vadjMv eq "1055" ? "CY_SYSPM_REGHC_VADJ_1_055V" : 73 vadjMv eq "1060" ? "CY_SYSPM_REGHC_VADJ_1_060V" : 74 vadjMv eq "1065" ? "CY_SYSPM_REGHC_VADJ_1_065V" : 75 vadjMv eq "1070" ? "CY_SYSPM_REGHC_VADJ_1_070V" : 76 vadjMv eq "1075" ? "CY_SYSPM_REGHC_VADJ_1_075V" : 77 vadjMv eq "1080" ? "CY_SYSPM_REGHC_VADJ_1_080V" : 78 vadjMv eq "1085" ? "CY_SYSPM_REGHC_VADJ_1_085V" : 79 vadjMv eq "1090" ? "CY_SYSPM_REGHC_VADJ_1_090V" : 80 vadjMv eq "1095" ? "CY_SYSPM_REGHC_VADJ_1_095V" : 81 vadjMv eq "1100" ? "CY_SYSPM_REGHC_VADJ_1_100V" : 82 vadjMv eq "1105" ? "CY_SYSPM_REGHC_VADJ_1_105V" : 83 vadjMv eq "1110" ? "CY_SYSPM_REGHC_VADJ_1_110V" : 84 vadjMv eq "1115" ? "CY_SYSPM_REGHC_VADJ_1_115V" : 85 vadjMv eq "1120" ? "CY_SYSPM_REGHC_VADJ_1_120V" : 86 vadjMv eq "1125" ? "CY_SYSPM_REGHC_VADJ_1_125V" : 87 vadjMv eq "1130" ? "CY_SYSPM_REGHC_VADJ_1_130V" : 88 vadjMv eq "1135" ? "CY_SYSPM_REGHC_VADJ_1_135V" : 89 vadjMv eq "1140" ? "CY_SYSPM_REGHC_VADJ_1_140V" : 90 vadjMv eq "1145" ? "CY_SYSPM_REGHC_VADJ_1_145V" : 91 vadjMv eq "1150" ? "CY_SYSPM_REGHC_VADJ_1_150V" : 92 vadjMv eq "1155" ? "CY_SYSPM_REGHC_VADJ_1_155V" : 93 vadjMv eq "1160" ? "CY_SYSPM_REGHC_VADJ_1_160V" : 94 vadjMv eq "1165" ? "CY_SYSPM_REGHC_VADJ_1_165V" : 95 vadjMv eq "1170" ? "CY_SYSPM_REGHC_VADJ_1_170V" : 96 vadjMv eq "1175" ? "CY_SYSPM_REGHC_VADJ_1_175V" : 97 "CY_SYSPM_REGHC_VADJ_1_100V"}`" visible="false" editable="false" desc="VADJ Voltage Macro." /> 98 99 100 <ParamChoice id="backupSrc" name="vBackup Source" group="General" default="VDDD" visible="true" editable="false" 101 desc="Selects whether the backup power domain is driven by a dedicated supply (e.g. super-cap or battery), or tied to VDDD."> 102 <Entry name="VDDD" value="VDDD" visible="true" /> 103 <Entry name="Dedicated Supply" value="DEDICATED" visible="true" /> 104 </ParamChoice> 105 106 <ParamChoice id="idlePwrMode" name="System Idle Power Mode" group="RTOS" default="CY_CFG_PWR_MODE_DEEPSLEEP" visible="true" editable="true" 107 desc="Selects the lowest power mode the system attempts to enter when there is no active tasks to execute, i.e. the system is in idle state. 108 This option only applies for an RTOS based application."> 109 <Entry name="Active" value="CY_CFG_PWR_MODE_ACTIVE" visible="true" /> 110 <Entry name="CPU Sleep" value="CY_CFG_PWR_MODE_SLEEP" visible="true" /> 111 <Entry name="System Deep Sleep" value="CY_CFG_PWR_MODE_DEEPSLEEP" visible="true" /> 112 </ParamChoice> 113 114 <!-- Operating conditions --> 115 116 <ParamRange id="vddaMv" name="VDDA Voltage (mV)" group="Operating Conditions" default="3300" min="2700" max="5500" resolution="1" visible="true" editable="true" desc="VDDA voltage in millivolts." /> 117 <ParamRange id="vdddMv" name="VDDD Voltage (mV)" group="Operating Conditions" default="3300" min="2700" max="5500" resolution="1" visible="true" editable="true" desc="VDDD voltage in millivolts." /> 118 <ParamRange id="vddio0Mv" name="VDDIO0 Voltage (mV)" group="Operating Conditions" default="3300" min="2700" max="5500" resolution="1" visible="true" editable="true" desc="VDDIO0 voltage in millivolts." /> 119 <ParamRange id="vddio1Mv" name="VDDIO1 Voltage (mV)" group="Operating Conditions" default="3300" min="2700" max="5500" resolution="1" visible="true" editable="true" desc="VDDIO1 voltage in millivolts." /> 120 121 <!-- Wakeup pins --> 122 <ParamSignal port="hibernate_wakeup[0]" name="Hibernate Wakeup (0)" group="Wakeup Pins" visible="`${hasVisibleOption("hibernate_wakeup[0]")}`" 123 desc="Reserve the hibernate_wakeup[0] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" > 124 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 125 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 126 <Fixed value="CY_GPIO_DM_PULLUP" /> 127 </Parameter> 128 </Constraint> 129 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 130 </ParamSignal> 131 132 <ParamSignal port="hibernate_wakeup[1]" name="Hibernate Wakeup (1)" group="Wakeup Pins" visible="`${hasVisibleOption("hibernate_wakeup[1]")}`" 133 desc="Reserve the hibernate_wakeup[1] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" > 134 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 135 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 136 <Fixed value="CY_GPIO_DM_PULLUP" /> 137 </Parameter> 138 </Constraint> 139 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 140 </ParamSignal> 141 142 <ParamSignal port="hibernate_wakeup[2]" name="Hibernate Wakeup (2)" group="Wakeup Pins" visible="`${hasVisibleOption("hibernate_wakeup[2]")}`" 143 desc="Reserve the hibernate_wakeup[2] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" > 144 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 145 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 146 <Fixed value="CY_GPIO_DM_PULLUP" /> 147 </Parameter> 148 </Constraint> 149 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 150 </ParamSignal> 151 152 <ParamSignal port="hibernate_wakeup[3]" name="Hibernate Wakeup (3)" group="Wakeup Pins" visible="`${hasVisibleOption("hibernate_wakeup[3]")}`" 153 desc="Reserve the hibernate_wakeup[3] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" > 154 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 155 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 156 <Fixed value="CY_GPIO_DM_PULLUP" /> 157 </Parameter> 158 </Constraint> 159 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 160 </ParamSignal> 161 162 <!--<ParamSignal port="pmic_wakeup_in[0]" name="PMIC Wakeup Input" group="Wakeup Pins" visible="`${regulatorMode eq pmicEnable}`" 163 desc="Reserve the pmic_wakeup_in pin" canBeEmpty="true" > 164 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${regulatorMode eq pmicEnable}`" > 165 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 166 <Fixed value="CY_GPIO_DM_PULLUP" /> 167 </Parameter> 168 </Constraint> 169 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 170 </ParamSignal> 171 172 <ParamSignal port="pmic_wakeup_out[0]" name="PMIC Wakeup Output" group="Wakeup Pins" visible="`${regulatorMode eq pmicEnable}`" 173 desc="Reserve the pmic_wakeup_out pin" canBeEmpty="`${!(regulatorMode eq pmicEnable)}`" > 174 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${regulatorMode eq pmicEnable}`" > 175 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 176 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 177 </Parameter> 178 </Constraint> 179 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 180 </ParamSignal> --> 181 <ParamBool id="usingUlp" name="usingUlp" group="Internal" default="false" visible="false" editable="false" desc="" /> 182 <ParamBool id="deepsleepWhenIdle" name="deepsleepWhenIdle" group="Internal" default="`${idlePwrMode eq CY_CFG_PWR_MODE_DEEPSLEEP}`" visible="false" editable="false" desc="" /> 183 184 <ParamSignal port="reghc_isense_inp[0]" name="External PS CTL0" group="REGHC Pins" visible="`${(transistorEnable eq true) && (reghcMode eq CY_SYSPM_REGHC_MODE_TRANSISTOR)}`" 185 desc="Positive terminal of the current sense resistor" canBeEmpty="true" > 186 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${(transistorEnable eq true) && (reghcMode eq CY_SYSPM_REGHC_MODE_TRANSISTOR)}`"> 187 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 188 <Fixed value="CY_GPIO_DM_PULLUP" /> 189 </Parameter> 190 </Constraint> 191 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 192 </ParamSignal> 193 194 <ParamSignal port="reghc_isense_inm[0]" name="External PS CTL1" group="REGHC Pins" visible="`${(transistorEnable eq true) && (reghcMode eq CY_SYSPM_REGHC_MODE_TRANSISTOR)}`" 195 desc="Negative terminal of the current sense resistor" canBeEmpty="true" > 196 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${(transistorEnable eq true) && (reghcMode eq CY_SYSPM_REGHC_MODE_TRANSISTOR)}`"> 197 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 198 <Fixed value="CY_GPIO_DM_PULLUP" /> 199 </Parameter> 200 </Constraint> 201 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 202 </ParamSignal> 203 204 <!--<ParamSignal port="reghc_rst_vout[0]" name="External PS CTL2" group="Wakeup Pins" visible="`${transistorEnable}`" 205 desc="External Power Supply CTL2" canBeEmpty="true" > 206 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${transistorEnable}`" > 207 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 208 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 209 </Parameter> 210 </Constraint> 211 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 212 </ParamSignal> --> 213 </Parameters> 214 215 <!-- Error checking --> 216 <DRCs> 217 <DRC type="ERROR" text="The input voltage of VDDD is set to `${vdddMv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vdddMv > vddaMv)}`" /> 218 <DRC type="ERROR" text="The input voltage of VDDIO0 is set to `${vddio0Mv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vddio0Mv > vddaMv)}`" /> 219 <DRC type="ERROR" text="The input voltage of VDDIO1 is set to `${vddio1Mv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vddio1Mv > vddaMv)}`" /> 220 <DRC type="ERROR" text="Assign External PS CTL 0/1 to a signal from REGHC Pins section or uncheck Enable External Transistor output from General section." condition="`${(transistorEnable && !hasConnection("reghc_isense_inp", 0)) && (transistorEnable && !hasConnection("reghc_isense_inm", 0))}`" /> 221 </DRCs> 222 223 <!-- Generated firmware --> 224 <ConfigFirmware> 225 <ConfigInclude value="cy_syspm.h" include="true" /> 226 <ConfigDefine name="CY_CFG_PWR_MODE_LP" public="true" value="0x01UL" include="true" /> 227 <ConfigDefine name="CY_CFG_PWR_MODE_ULP" public="true" value="0x02UL" include="true" /> 228 <ConfigDefine name="CY_CFG_PWR_MODE_ACTIVE" public="true" value="0x04UL" include="true" /> 229 <ConfigDefine name="CY_CFG_PWR_MODE_SLEEP" public="true" value="0x08UL" include="true" /> 230 <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP" public="true" value="0x10UL" include="true" /> 231 <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP_RAM" public="true" value="0x11UL" include="true" /> 232 <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP_OFF" public="true" value="0x12UL" include="true" /> 233 <ConfigDefine name="CY_CFG_PWR_SYS_IDLE_MODE" public="true" value="`${idlePwrMode}`" include="true" /> 234 <ConfigDefine name="CY_CFG_PWR_SYS_LP_PROFILE_MODE" public="true" value="`${enableLowPowerProfileMode ? 1 : 0}`" include="true" /> 235 <ConfigDefine name="CY_CFG_PWR_ENABLED" public="false" value="1" include="true" /> 236 <ConfigDefine name="CY_CFG_PWR_INIT" public="false" value="1" include="true" /> 237 <!-- <ConfigDefine name="CY_CFG_PWR_USING_PMIC" public="false" value="`${pmicEnable ? 1 : 0}`" include="true" /> --> 238 <ConfigDefine name="CY_CFG_PWR_VBACKUP_USING_VDDD" public="false" value="`${(backupSrc eq VDDD) ? 1 : 0}`" include="true" /> 239 <ConfigDefine name="CY_CFG_PWR_REGULATOR_MODE_MIN" public="false" value="`${((minCurrRegulator eq CY_SYSPM_LDO_MODE_MIN)) ? true : false}`" include="true" /> 240 <ConfigDefine name="CY_CFG_PWR_USING_ULP" public="false" value="`${usingUlp ? 1 : 0}`" include="true" /> 241 <!-- Operating conditions --> 242 <ConfigDefine name="CY_CFG_PWR_VDDA_MV" public="true" value="`${vddaMv}`" include="true" /> 243 <ConfigDefine name="CY_CFG_PWR_VDDD_MV" public="true" value="`${vdddMv}`" include="true" /> 244 <ConfigDefine name="CY_CFG_PWR_VDDIO0_MV" public="true" value="`${vddio0Mv}`" include="true" /> 245 <ConfigDefine name="CY_CFG_PWR_VDDIO1_MV" public="true" value="`${vddio1Mv}`" include="true" /> 246 <ConfigDefine name="CY_CFG_PWR_REGHC_ENABLED" public="true" value="`${transistorEnable}`" include="true" /> 247 <ConfigDefine name="CY_CFG_PWR_REGHC_MODE" public="true" value="`${transistorEnable ? reghcMode : 0xFF}`" include="true" /> 248 <ConfigDefine name="CY_CFG_PWR_REGHC_TRANS_VADJ_VOLT" public="true" value="`${transistorEnable ? vadjVoltMacro : 0}`" include="true" /> 249 250 <ConfigFunction signature="__STATIC_INLINE void init_cycfg_power(void)" body=" 251 /* **Reset the Backup domain on POR, XRES, BOD only if Backup domain is supplied by VDDD** */
 252 #if (CY_CFG_PWR_VBACKUP_USING_VDDD)
 253 #ifdef CY_CFG_SYSCLK_ILO_ENABLED
 254 if (0u == Cy_SysLib_GetResetReason() /* POR, XRES, or BOD */)
 255 {
 256 Cy_SysLib_ResetBackupDomain();
 257 Cy_SysClk_IloDisable();
 258 Cy_SysClk_IloInit();
 259 }
 260 #endif /* CY_CFG_SYSCLK_ILO_ENABLED */
 261 #endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */

 262 /* **REGHC Configuration** */
 263 #if (CY_CFG_PWR_REGHC_ENABLED)
 264 Cy_SysPm_ReghcConfigure(CY_CFG_PWR_REGHC_MODE, CY_CFG_PWR_REGHC_TRANS_VADJ_VOLT);
 265 #endif /* CY_CFG_PWR_REGHC_ENABLED */

 266 267 /* **System Active Low Power Profile(LPACTIVE/LPSLEEP) Configuration** */
 268 #if (CY_CFG_PWR_SYS_LP_PROFILE_MODE)
 269 Cy_SysPm_SystemLpActiveEnter();
 270 #endif /* CY_CFG_PWR_SYS_ACTIVE_MODE */

 271 /* **System Regulators Low Current Configuration** */
 272 #if CY_CFG_PWR_REGULATOR_MODE_MIN
 273 Cy_SysPm_SystemSetMinRegulatorCurrent();
 274 #else
 275 Cy_SysPm_SystemSetNormalRegulatorCurrent();
 276 #endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */
" 277 public="false" include="true" /> 278 <!--/* Configure PMIC */
 279 Cy_SysPm_UnlockPmic();
 280 #if CY_CFG_PWR_USING_PMIC
 281 Cy_SysPm_PmicEnableOutput();
 282 #else
 283 Cy_SysPm_PmicDisableOutput();
 284 #endif /* CY_CFG_PWR_USING_PMIC */ --> 285 </ConfigFirmware> 286</Personality> 287
