1<?xml version="1.0" encoding="utf-8"?> 2 3 4<!--**************************************************************************** 5* \file power_v2.cypersonality 6* \version 1.0 7* 8* \brief 9* Personality description file for MCU part of Low Power Assistant. 10* This supports CAT1B devices. 11* 12******************************************************************************** 13* \copyright 14* Copyright (c) 2022, Cypress Semiconductor Corporation (an Infineon company) or 15* an affiliate of Cypress Semiconductor Corporation. 16* SPDX-License-Identifier: Apache-2.0 17* 18* Licensed under the Apache License, Version 2.0 (the "License"); 19* you may not use this file except in compliance with the License. 20* You may obtain a copy of the License at 21* 22* http://www.apache.org/licenses/LICENSE-2.0 23* 24* Unless required by applicable law or agreed to in writing, software 25* distributed under the License is distributed on an "AS IS" BASIS, 26* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 27* See the License for the specific language governing permissions and 28* limitations under the License. 29*****************************************************************************--> 30 31<Personality id="power_v2" name="Power Settings" version="1.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7"> 32 <Dependencies> 33 <IpBlock name="mxs40ssrss" /> 34 <Resource name="srss\.power" /> 35 </Dependencies> 36 <ExposedMembers> 37 <ExposedMember key="vddaMv" paramId="vddaMv" /> 38 <ExposedMember key="usingUlp" paramId="usingUlp" /> 39 <ExposedMember key="deepsleepWhenIdle" paramId="deepsleepWhenIdle" /> 40 </ExposedMembers> 41 <Parameters> 42 <!-- Documentation --> 43 <ParamDoc id="pdlDoc" name="SysPm API Reference" group="Overview" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__syspm.html" linkText="Open SysPm Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" /> 44 45 <ParamChoice id="actPwrMode" name="System Active Power Profile" group="General" default="POWER_PROFILE_0" visible="true" editable="true" 46 desc="Selects the system operating power mode."> 47 <Entry name="Power Profile - 0 (LP MCU + Radio ON)" value="POWER_PROFILE_0" visible="true" /> 48 <Entry name="Power Profile - 1 (ULP MCU + Radio ON)" value="POWER_PROFILE_1" visible="true" /> 49 <Entry name="Power Profile - 2A (LP MCU Only)" value="POWER_PROFILE_2A" visible="true" /> 50 <Entry name="Power Profile - 2B (LP MCU Only)" value="POWER_PROFILE_2B" visible="true" /> 51 <Entry name="Power Profile - 3 (ULP MCU Only)" value="POWER_PROFILE_3" visible="true" /> 52 </ParamChoice> 53 54 <ParamString id="activePowerMode" name="System Active Power Mode" group="Internal" default="`${actPwrMode eq POWER_PROFILE_0 ? "LP" : 55 actPwrMode eq POWER_PROFILE_1 ? "ULP" : 56 actPwrMode eq POWER_PROFILE_2A ? "LP" : 57 actPwrMode eq POWER_PROFILE_2B ? "LP" : 58 actPwrMode eq POWER_PROFILE_3 ? "ULP" : 59 "LP"}`" visible="false" editable="false" desc="System Active Power Mode." /> 60 61 <!-- Power settings --> 62 <ParamBool id="enableLowPowerProfileMode" name="Enable LPACTIVE/LPSLEEP mode" group="General" default="`${false}`" visible="true" editable="true" desc="This parameter enables the Low Power Profile mode i.e LPACTIVE/LPSLEEP" /> 63 64 <ParamChoice id="minCurrRegulator" name="Regulator Min Current Mode" group="General" default="`${CY_SYSPM_LDO_MODE_NORMAL}`" visible="true" editable="true" 65 desc="Enables Regulator Minimum Current Mode."> 66 <Entry name="Normal Current LDO" value="CY_SYSPM_LDO_MODE_NORMAL" visible="true" /> 67 <Entry name="Minimum Current LDO" value="CY_SYSPM_LDO_MODE_MIN" visible="true" /> 68 </ParamChoice> 69 70 <ParamBool id="pmicEnable" name="Enable External PMIC Output" group="General" default="false" visible="true" editable="false" 71 desc="Enables an external PMIC to provide VDDD power to the device." /> 72 73 <ParamChoice id="backupSrc" name="vBackup Source" group="General" default="VDDD" visible="true" editable="true" 74 desc="Selects whether the backup power domain is driven by a dedicated supply (e.g. super-cap or battery), or tied to VDDD."> 75 <Entry name="VDDD" value="VDDD" visible="true" /> 76 <Entry name="Dedicated Supply" value="DEDICATED" visible="true" /> 77 </ParamChoice> 78 79 <ParamChoice id="idlePwrMode" name="System Idle Power Mode" group="RTOS" default="CY_CFG_PWR_MODE_DEEPSLEEP" visible="true" editable="true" 80 desc="Selects the lowest power mode the system attempts to enter when there is no active tasks to execute, i.e. the system is in idle state. 81 This option only applies for an RTOS based application."> 82 <Entry name="Active" value="CY_CFG_PWR_MODE_ACTIVE" visible="true" /> 83 <Entry name="CPU Sleep" value="CY_CFG_PWR_MODE_SLEEP" visible="true" /> 84 <Entry name="System Deep Sleep" value="CY_CFG_PWR_MODE_DEEPSLEEP" visible="true" /> 85 <Entry name="System Deep Sleep RAM" value="CY_CFG_PWR_MODE_DEEPSLEEP_RAM" visible="true" /> 86 <Entry name="System Deep Sleep OFF" value="CY_CFG_PWR_MODE_DEEPSLEEP_OFF" visible="true" /> 87 </ParamChoice> 88 89 <ParamRange id="deepsleepLatency" name="Deep Sleep Latency (ms)" group="RTOS" default="0" min="0" max="1000" resolution="1" visible="true" editable="true" 90 desc="Greater between the time required to enter to and exit from the deep sleep power mode. 91 This option only applies for an RTOS based application." /> 92 <!-- Operating conditions --> 93 <!-- Core Buck --> 94 <ParamString id="coreBuckParam" name="Core Buck Parameters" group="Internal" default="`${actPwrMode eq POWER_PROFILE_0 ? "1.16V High Power" : 95 actPwrMode eq POWER_PROFILE_1 ? "1.16V High Power" : 96 actPwrMode eq POWER_PROFILE_2A ? "1.16V High Power" : 97 actPwrMode eq POWER_PROFILE_2B ? "1.1V Low Power" : 98 actPwrMode eq POWER_PROFILE_3 ? "0.9V Low Power" : 99 "1.16V High Power"}`" visible="false" editable="false" desc="Core Buck Voltage and Mode." /> 100 101 <ParamString id="coreBuckVoltMacro" name="Core Buck Voltage Macro" group="Internal" default="`${coreBuckParam eq "1.16V High Power" ? "CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V" : 102 coreBuckParam eq "1.1V Low Power" ? "CY_SYSPM_CORE_BUCK_VOLTAGE_1_10V" : 103 coreBuckParam eq "0.9V Low Power" ? "CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V" : 104 "CY_SYSPM_CORE_BUCK_VOLTAGE_1_16V"}`" visible="false" editable="false" desc="Core Buck Voltage Macro." /> 105 106 <ParamString id="coreBuckModeMacro" name="Core Buck Mode Macro" group="Internal" default="`${coreBuckParam eq "1.16V High Power" ? "CY_SYSPM_CORE_BUCK_MODE_HP" : 107 coreBuckParam eq "1.1V Low Power" ? "CY_SYSPM_CORE_BUCK_MODE_LP" : 108 coreBuckParam eq "0.9V Low Power" ? "CY_SYSPM_CORE_BUCK_MODE_LP" : 109 "CY_SYSPM_CORE_BUCK_MODE_HP"}`" visible="false" editable="false" desc="Core Buck Mode Macro." /> 110 111 <ParamString id="coreBuckVoltagemode" name="Core Buck Voltage and Mode" group="Operating Conditions" default="`${coreBuckParam}`" visible="true" editable="false" desc="Core Buck Voltage and Mode.." /> 112 113 <!-- SDR0 Regulator --> 114 <ParamString id="sdr0Param" name="SDR0 Parameters" group="Internal" default="`${actPwrMode eq POWER_PROFILE_0 ? "1.1V Regulated" : 115 actPwrMode eq POWER_PROFILE_1 ? "0.9V Regulated" : 116 actPwrMode eq POWER_PROFILE_2A ? "1.1V Regulated" : 117 actPwrMode eq POWER_PROFILE_2B ? "1.1V Bypassed" : 118 actPwrMode eq POWER_PROFILE_3 ? "0.9V Bypassed" : 119 "1.1V Regulated"}`" visible="false" editable="false" desc="SDR0 Regulator Voltage and Mode." /> 120 121 <ParamString id="sdr0VoltMacro" name="SDR0 Voltage Macro" group="Internal" default="`${sdr0Param eq "1.1V Regulated" ? "CY_SYSPM_SDR_VOLTAGE_1_100V" : 122 sdr0Param eq "1.1V Bypassed" ? "CY_SYSPM_SDR_VOLTAGE_1_100V" : 123 sdr0Param eq "0.9V Regulated" ? "CY_SYSPM_SDR_VOLTAGE_0_900V" : 124 sdr0Param eq "0.9V Bypassed" ? "CY_SYSPM_SDR_VOLTAGE_0_900V" : 125 "CY_SYSPM_SDR_VOLTAGE_1_100V"}`" visible="false" editable="false" desc="SDR0 Voltage Macro." /> 126 127 <ParamString id="sdr0Voltagemode" name="SDR0 Regulator Voltage and Mode" group="Operating Conditions" default="`${sdr0Param}`" visible="true" editable="false" desc="SDR0 Regulator Voltage and Mode.." /> 128 129 <ParamString id="sdr0DpSlpVoltage" name="SDR0 Regulator Deep Sleep Voltage" group="Operating Conditions" default="0.9V" visible="true" editable="false" desc="SDR0 Deep Sleep Regulator Voltage " /> 130 131 <ParamBool id="sdr0BypassModeMacro" name="SDR0 Bypass Mode Enable" group="Operating Conditions" default="true" visible="true" editable="true" desc="SDR0 bypass Mode Selection" /> 132 133 <!-- SDR1 Regulator --> 134 <ParamString id="sdr1Param" name="SDR1 Parameters" group="Internal" default="`${actPwrMode eq POWER_PROFILE_0 ? "1.1V Regulated" : 135 actPwrMode eq POWER_PROFILE_1 ? "1.1V Regulated" : 136 actPwrMode eq POWER_PROFILE_2A ? "Off" : 137 actPwrMode eq POWER_PROFILE_2B ? "Off" : 138 actPwrMode eq POWER_PROFILE_3 ? "Off" : 139 "Off"}`" visible="false" editable="false" desc="SDR1 Regulator Voltage and Mode." /> 140 141 <ParamString id="sdr1VoltMacro" name="SDR1 Voltage Macro" group="Internal" default="`${sdr1Param eq "1.1V Regulated" ? "CY_SYSPM_SDR_VOLTAGE_1_100V" : 142 sdr1Param eq "Off" ? "0" : 143 "0"}`" visible="false" editable="false" desc="SDR1 Voltage Macro." /> 144 145 <ParamString id="sdr1Voltagemode" name="SDR1 Regulator Voltage and Mode" group="Operating Conditions" default="`${sdr1Param}`" visible="true" editable="false" desc="SDR1 Regulator Voltage and Mode.." /> 146 147 <ParamRange id="vddaMv" name="VDDA Voltage (mV)" group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDA voltage in millivolts." /> 148 <ParamRange id="vdddMv" name="VDDD Voltage (mV)" group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDD voltage in millivolts." /> 149 <ParamRange id="vddbuckMv" name="VDDBUCK Voltage (mV)" group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDBUCK voltage in millivolts." /> 150 <ParamRange id="vddio0Mv" name="VDDIO0 Voltage (mV)" group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDIO0 voltage in millivolts." /> 151 <ParamRange id="vddio1Mv" name="VDDIO1 Voltage (mV)" group="Operating Conditions" default="3300" min="1700" max="3600" resolution="1" visible="true" editable="true" desc="VDDIO1 voltage in millivolts." /> 152 153 <!-- Wakeup pins --> 154 <ParamSignal port="hibernate_wakeup[0]" name="Hibernate Wakeup (0)" group="Wakeup Pins" visible="`${hasVisibleOption("hibernate_wakeup[0]")}`" 155 desc="Reserve the hibernate_wakeup[0] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" > 156 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 157 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 158 <Fixed value="CY_GPIO_DM_PULLUP" /> 159 </Parameter> 160 </Constraint> 161 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 162 </ParamSignal> 163 164 <ParamSignal port="hibernate_wakeup[1]" name="Hibernate Wakeup (1)" group="Wakeup Pins" visible="`${hasVisibleOption("hibernate_wakeup[1]")}`" 165 desc="Reserve the hibernate_wakeup[1] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" > 166 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 167 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 168 <Fixed value="CY_GPIO_DM_PULLUP" /> 169 </Parameter> 170 </Constraint> 171 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 172 </ParamSignal> 173 174 <ParamSignal port="hibernate_wakeup[2]" name="Hibernate Wakeup (2)" group="Wakeup Pins" visible="`${hasVisibleOption("hibernate_wakeup[2]")}`" 175 desc="Reserve the hibernate_wakeup[2] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" > 176 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 177 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 178 <Fixed value="CY_GPIO_DM_PULLUP" /> 179 </Parameter> 180 </Constraint> 181 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 182 </ParamSignal> 183 184 <ParamSignal port="hibernate_wakeup[3]" name="Hibernate Wakeup (3)" group="Wakeup Pins" visible="`${hasVisibleOption("hibernate_wakeup[3]")}`" 185 desc="Reserve the hibernate_wakeup[3] pin to use it as the wakeup source from Hibernate power mode." canBeEmpty="true" > 186 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 187 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 188 <Fixed value="CY_GPIO_DM_PULLUP" /> 189 </Parameter> 190 </Constraint> 191 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 192 </ParamSignal> 193 194 <ParamSignal port="pmic_wakeup_in[0]" name="PMIC Wakeup Input" group="Wakeup Pins" visible="`${pmicEnable}`" 195 desc="Reserve the pmic_wakeup_in pin" canBeEmpty="true" > 196 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${pmicEnable}`" > 197 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 198 <Fixed value="CY_GPIO_DM_PULLUP" /> 199 </Parameter> 200 </Constraint> 201 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 202 </ParamSignal> 203 204 <ParamSignal port="pmic_wakeup_out[0]" name="PMIC Wakeup Output" group="Wakeup Pins" visible="`${pmicEnable}`" 205 desc="Reserve the pmic_wakeup_out pin" canBeEmpty="`${!pmicEnable}`" > 206 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="`${pmicEnable}`" > 207 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 208 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 209 </Parameter> 210 </Constraint> 211 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 212 </ParamSignal> 213 <ParamBool id="usingUlp" name="usingUlp" group="Internal" default="`${activePowerMode eq "ULP"}`" visible="false" editable="false" desc="" /> 214 <ParamBool id="deepsleepWhenIdle" name="deepsleepWhenIdle" group="Internal" default="`${idlePwrMode eq CY_CFG_PWR_MODE_DEEPSLEEP}`" visible="false" editable="false" desc="" /> 215 216 </Parameters> 217 218 <!-- Error checking --> 219 <DRCs> 220 <DRC type="ERROR" text="The input voltage of VDDD is set to `${vdddMv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vdddMv > vddaMv)}`" /> 221 <DRC type="ERROR" text="The input voltage of VDDBUCK is set to `${vddbuckMv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vddbuckMv > vddaMv)}`" /> 222 <DRC type="ERROR" text="The input voltage of VDDIO0 is set to `${vddio0Mv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vddio0Mv > vddaMv)}`" /> 223 <DRC type="ERROR" text="The input voltage of VDDIO1 is set to `${vddio1Mv}` which is out of range. The value must be between 1700 and VDDA (`${vddaMv}`)." condition="`${(vddio1Mv > vddaMv)}`" /> 224 <DRC type="WARNING" text="SMIF Config should not be in FLASH when DS-RAM is selected as System Idle Power Mode" condition="`${isBlockUsed("smif[0]") ? (((idlePwrMode eq CY_CFG_PWR_MODE_DEEPSLEEP_RAM) && (getExposedMember("smif[0]", "inFlash")) eq true)) : false}`" /> 225 </DRCs> 226 227 <!-- Generated firmware --> 228 <ConfigFirmware> 229 <ConfigInclude value="cy_syspm.h" include="true" /> 230 <ConfigDefine name="CY_CFG_PWR_MODE_LP" public="true" value="0x01UL" include="true" /> 231 <ConfigDefine name="CY_CFG_PWR_MODE_ULP" public="true" value="0x02UL" include="true" /> 232 <ConfigDefine name="CY_CFG_PWR_MODE_ACTIVE" public="true" value="0x04UL" include="true" /> 233 <ConfigDefine name="CY_CFG_PWR_MODE_SLEEP" public="true" value="0x08UL" include="true" /> 234 <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP" public="true" value="0x10UL" include="true" /> 235 <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP_RAM" public="true" value="0x11UL" include="true" /> 236 <ConfigDefine name="CY_CFG_PWR_MODE_DEEPSLEEP_OFF" public="true" value="0x12UL" include="true" /> 237 <ConfigDefine name="CY_CFG_PWR_SYS_IDLE_MODE" public="true" value="`${idlePwrMode}`" include="true" /> 238 <ConfigDefine name="CY_CFG_PWR_DEEPSLEEP_LATENCY" public="true" value="`${deepsleepLatency}`UL" include="true" /> 239 <ConfigDefine name="CY_CFG_PWR_SYS_ACTIVE_MODE" public="true" value="CY_CFG_PWR_MODE_`${activePowerMode}`" include="true" /> 240 <ConfigDefine name="CY_CFG_PWR_SYS_ACTIVE_PROFILE" public="true" value="CY_CFG_PWR_MODE_`${actPwrMode}`" include="true" /> 241 <ConfigDefine name="CY_CFG_PWR_SYS_LP_PROFILE_MODE" public="true" value="`${enableLowPowerProfileMode ? 1 : 0}`" include="true" /> 242 <ConfigDefine name="CY_CFG_PWR_ENABLED" public="false" value="1" include="true" /> 243 <ConfigDefine name="CY_CFG_PWR_INIT" public="false" value="1" include="true" /> 244 <ConfigDefine name="CY_CFG_PWR_USING_PMIC" public="false" value="`${pmicEnable ? 1 : 0}`" include="true" /> 245 <ConfigDefine name="CY_CFG_PWR_VBACKUP_USING_VDDD" public="false" value="`${(backupSrc eq VDDD) ? 1 : 0}`" include="true" /> 246 <ConfigDefine name="CY_CFG_PWR_REGULATOR_MODE_MIN" public="false" value="`${((minCurrRegulator eq CY_SYSPM_LDO_MODE_MIN)) ? true : false}`" include="true" /> 247 <ConfigDefine name="CY_CFG_PWR_USING_ULP" public="false" value="`${usingUlp ? 1 : 0}`" include="true" /> 248 <!-- Operating conditions --> 249 <ConfigDefine name="CY_CFG_PWR_VDDA_MV" public="true" value="`${vddaMv}`" include="true" /> 250 <ConfigDefine name="CY_CFG_PWR_VDDD_MV" public="true" value="`${vdddMv}`" include="true" /> 251 <ConfigDefine name="CY_CFG_PWR_VDDBUCK" public="true" value="`${vddbuckMv}`" include="true" /> 252 <ConfigDefine name="CY_CFG_PWR_VDDIO0_MV" public="true" value="`${vddio0Mv}`" include="true" /> 253 <ConfigDefine name="CY_CFG_PWR_VDDIO1_MV" public="true" value="`${vddio1Mv}`" include="true" /> 254 <ConfigDefine name="CY_CFG_PWR_CBUCK_VOLT" public="true" value="`${coreBuckVoltMacro}`" include="true" /> 255 <ConfigDefine name="CY_CFG_PWR_CBUCK_MODE" public="true" value="`${coreBuckModeMacro}`" include="true" /> 256 <ConfigDefine name="CY_CFG_PWR_SDR0_VOLT" public="true" value="`${sdr0VoltMacro}`" include="true" /> 257 <ConfigDefine name="CY_CFG_PWR_SDR0_MODE_BYPASS" public="true" value="`${sdr0BypassModeMacro}`" include="true" /> 258 <ConfigDefine name="CY_CFG_PWR_SDR1_VOLT" public="true" value="`${sdr1VoltMacro}`" include="true" /> 259 <ConfigDefine name="CY_CFG_PWR_SDR1_ENABLE" public="true" value="`${sdr1VoltMacro ? true : false}`" include="true" /> 260 261 <ConfigStruct name="coreBuckConfigParam" type="cy_stc_syspm_core_buck_params_t" const="false" public="false" include="true"> 262 <Member name="voltageSel" value="CY_CFG_PWR_CBUCK_VOLT" /> 263 <Member name="mode" value="CY_CFG_PWR_CBUCK_MODE" /> 264 <Member name="override" value="false" /> 265 <Member name="copySettings" value="false" /> 266 <Member name="useSettings" value="false" /> 267 <Member name="inRushLimitSel" value="0" /> 268 </ConfigStruct> 269 270 <ConfigStruct name="sdr0ConfigParam" type="cy_stc_syspm_sdr_params_t" const="false" public="false" include="true"> 271 <Member name="coreBuckVoltSel" value="CY_CFG_PWR_CBUCK_VOLT" /> 272 <Member name="coreBuckMode" value="CY_CFG_PWR_CBUCK_MODE" /> 273 <Member name="coreBuckDpSlpVoltSel" value="CY_SYSPM_CORE_BUCK_VOLTAGE_0_90V" /> 274 <Member name="coreBuckDpSlpMode" value="CY_SYSPM_CORE_BUCK_MODE_LP" /> 275 <Member name="sdr0DpSlpVoltSel" value="CY_SYSPM_SDR_VOLTAGE_0_900V" /> 276 <Member name="sdrVoltSel" value="CY_CFG_PWR_SDR0_VOLT" /> 277 <Member name="sdr0Allowbypass" value="CY_CFG_PWR_SDR0_MODE_BYPASS" /> 278 </ConfigStruct> 279 280 <ConfigStruct name="sdr1ConfigParam" type="cy_stc_syspm_sdr_params_t" const="false" public="false" include="true"> 281 <Member name="coreBuckVoltSel" value="CY_CFG_PWR_CBUCK_VOLT" /> 282 <Member name="coreBuckMode" value="CY_CFG_PWR_CBUCK_MODE" /> 283 <Member name="sdrVoltSel" value="CY_CFG_PWR_SDR1_VOLT" /> 284 <Member name="sdr1HwControl" value="true" /> 285 <Member name="sdr1Enable" value="true" /> 286 </ConfigStruct> 287 288 <ConfigFunction signature="__STATIC_INLINE void init_cycfg_power(void)" body=" 289 CY_UNUSED_PARAMETER(sdr1ConfigParam); /* Suppress a compiler warning about unused variables */

 290 Cy_SysPm_Init();
 291 /* **Reset the Backup domain on POR, XRES, BOD only if Backup domain is supplied by VDDD** */
 292 #if (CY_CFG_PWR_VBACKUP_USING_VDDD)
 293 #ifdef CY_CFG_SYSCLK_ILO_ENABLED
 294 if (0u == Cy_SysLib_GetResetReason() /* POR, XRES, or BOD */)
 295 {
 296 Cy_SysLib_ResetBackupDomain();
 297 Cy_SysClk_IloDisable();
 298 Cy_SysClk_IloInit();
 299 }
 300 #endif /* CY_CFG_SYSCLK_ILO_ENABLED */
 301 #endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */

 302 /* **System Active Power Mode Profile Configuration** */
 303 /* Core Buck Regulator Configuration */
 304 Cy_SysPm_CoreBuckConfig(&coreBuckConfigParam);

 305 /* SDR0 Regulator Configuration */
 306 Cy_SysPm_SdrConfigure(CY_SYSPM_SDR_0, &sdr0ConfigParam);

 307 /* SDR1 Regulator Configuration */
 308 #if (CY_CFG_PWR_SDR1_ENABLE)
 309 Cy_SysPm_SdrConfigure(CY_SYSPM_SDR_1, &sdr1ConfigParam);
 310 #endif /* CY_CFG_PWR_SDR1_VOLT */

 311 /* **System Active Low Power Profile(LPACTIVE/LPSLEEP) Configuration** */
 312 #if (CY_CFG_PWR_SYS_LP_PROFILE_MODE)
 313 Cy_SysPm_SystemLpActiveEnter();
 314 #endif /* CY_CFG_PWR_SYS_ACTIVE_MODE */

 315 /* **System Regulators Low Current Configuration** */
 316 #if (CY_CFG_PWR_REGULATOR_MODE_MIN)
 317 Cy_SysPm_SystemSetMinRegulatorCurrent();
 318 #endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */

 319 /* **System Idle Power Mode Configuration** */
 320 #if (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP)
 321 Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP);
 322 #elif (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP_RAM)
 323 Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP_RAM);
 324 #elif (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP_OFF)
 325 Cy_SysPm_SetDeepSleepMode(CY_SYSPM_MODE_DEEPSLEEP_OFF);
 326 #endif /* CY_CFG_PWR_SYS_IDLE_MODE */" 327 public="false" include="true" /> 328 </ConfigFirmware> 329</Personality> 330
